1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Sunxi ohci glue
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on code from
7*4882a593Smuzhiyun * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <asm/arch/clock.h>
14*4882a593Smuzhiyun #include <asm/arch/usb_phy.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun #include <dm.h>
17*4882a593Smuzhiyun #include <usb.h>
18*4882a593Smuzhiyun #include "ohci.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN4I
21*4882a593Smuzhiyun #define BASE_DIST 0x8000
22*4882a593Smuzhiyun #define AHB_CLK_DIST 2
23*4882a593Smuzhiyun #else
24*4882a593Smuzhiyun #define BASE_DIST 0x1000
25*4882a593Smuzhiyun #define AHB_CLK_DIST 1
26*4882a593Smuzhiyun #endif
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct ohci_sunxi_priv {
29*4882a593Smuzhiyun struct sunxi_ccm_reg *ccm;
30*4882a593Smuzhiyun ohci_t ohci;
31*4882a593Smuzhiyun int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
32*4882a593Smuzhiyun int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */
33*4882a593Smuzhiyun int phy_index; /* Index of the usb-phy attached to this hcd */
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
ohci_usb_probe(struct udevice * dev)36*4882a593Smuzhiyun static int ohci_usb_probe(struct udevice *dev)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
39*4882a593Smuzhiyun struct ohci_sunxi_priv *priv = dev_get_priv(dev);
40*4882a593Smuzhiyun struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
41*4882a593Smuzhiyun int extra_ahb_gate_mask = 0;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
44*4882a593Smuzhiyun if (IS_ERR(priv->ccm))
45*4882a593Smuzhiyun return PTR_ERR(priv->ccm);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun bus_priv->companion = true;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun * This should go away once we've moved to the driver model for
51*4882a593Smuzhiyun * clocks resp. phys.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
54*4882a593Smuzhiyun #ifdef CONFIG_MACH_SUN8I_H3
55*4882a593Smuzhiyun extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
56*4882a593Smuzhiyun #endif
57*4882a593Smuzhiyun priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
58*4882a593Smuzhiyun priv->phy_index = ((uintptr_t)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
59*4882a593Smuzhiyun priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
60*4882a593Smuzhiyun extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
61*4882a593Smuzhiyun priv->usb_gate_mask <<= priv->phy_index;
62*4882a593Smuzhiyun priv->phy_index++; /* Non otg phys start at 1 */
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun setbits_le32(&priv->ccm->ahb_gate0,
65*4882a593Smuzhiyun priv->ahb_gate_mask | extra_ahb_gate_mask);
66*4882a593Smuzhiyun setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
67*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
68*4882a593Smuzhiyun setbits_le32(&priv->ccm->ahb_reset0_cfg,
69*4882a593Smuzhiyun priv->ahb_gate_mask | extra_ahb_gate_mask);
70*4882a593Smuzhiyun #endif
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun sunxi_usb_phy_init(priv->phy_index);
73*4882a593Smuzhiyun sunxi_usb_phy_power_on(priv->phy_index);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return ohci_register(dev, regs);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
ohci_usb_remove(struct udevice * dev)78*4882a593Smuzhiyun static int ohci_usb_remove(struct udevice *dev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct ohci_sunxi_priv *priv = dev_get_priv(dev);
81*4882a593Smuzhiyun int ret;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun ret = ohci_deregister(dev);
84*4882a593Smuzhiyun if (ret)
85*4882a593Smuzhiyun return ret;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun sunxi_usb_phy_exit(priv->phy_index);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
90*4882a593Smuzhiyun clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
93*4882a593Smuzhiyun clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static const struct udevice_id ohci_usb_ids[] = {
99*4882a593Smuzhiyun { .compatible = "allwinner,sun4i-a10-ohci", },
100*4882a593Smuzhiyun { .compatible = "allwinner,sun5i-a13-ohci", },
101*4882a593Smuzhiyun { .compatible = "allwinner,sun6i-a31-ohci", },
102*4882a593Smuzhiyun { .compatible = "allwinner,sun7i-a20-ohci", },
103*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a23-ohci", },
104*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a83t-ohci", },
105*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-h3-ohci", },
106*4882a593Smuzhiyun { .compatible = "allwinner,sun9i-a80-ohci", },
107*4882a593Smuzhiyun { .compatible = "allwinner,sun50i-a64-ohci", },
108*4882a593Smuzhiyun { }
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun U_BOOT_DRIVER(usb_ohci) = {
112*4882a593Smuzhiyun .name = "ohci_sunxi",
113*4882a593Smuzhiyun .id = UCLASS_USB,
114*4882a593Smuzhiyun .of_match = ohci_usb_ids,
115*4882a593Smuzhiyun .probe = ohci_usb_probe,
116*4882a593Smuzhiyun .remove = ohci_usb_remove,
117*4882a593Smuzhiyun .ops = &ohci_usb_ops,
118*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct usb_platdata),
119*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct ohci_sunxi_priv),
120*4882a593Smuzhiyun .flags = DM_FLAG_ALLOC_PRIV_DMA,
121*4882a593Smuzhiyun };
122