1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Sunxi ehci glue
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5*4882a593Smuzhiyun * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on code from
8*4882a593Smuzhiyun * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <asm/arch/clock.h>
15*4882a593Smuzhiyun #include <asm/arch/usb_phy.h>
16*4882a593Smuzhiyun #include <asm/io.h>
17*4882a593Smuzhiyun #include <dm.h>
18*4882a593Smuzhiyun #include "ehci.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN4I
21*4882a593Smuzhiyun #define BASE_DIST 0x8000
22*4882a593Smuzhiyun #define AHB_CLK_DIST 2
23*4882a593Smuzhiyun #else
24*4882a593Smuzhiyun #define BASE_DIST 0x1000
25*4882a593Smuzhiyun #define AHB_CLK_DIST 1
26*4882a593Smuzhiyun #endif
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct ehci_sunxi_priv {
29*4882a593Smuzhiyun struct ehci_ctrl ehci;
30*4882a593Smuzhiyun struct sunxi_ccm_reg *ccm;
31*4882a593Smuzhiyun int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
32*4882a593Smuzhiyun int phy_index; /* Index of the usb-phy attached to this hcd */
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
ehci_usb_probe(struct udevice * dev)35*4882a593Smuzhiyun static int ehci_usb_probe(struct udevice *dev)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun struct usb_platdata *plat = dev_get_platdata(dev);
38*4882a593Smuzhiyun struct ehci_sunxi_priv *priv = dev_get_priv(dev);
39*4882a593Smuzhiyun struct ehci_hccr *hccr = (struct ehci_hccr *)devfdt_get_addr(dev);
40*4882a593Smuzhiyun struct ehci_hcor *hcor;
41*4882a593Smuzhiyun int extra_ahb_gate_mask = 0;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
44*4882a593Smuzhiyun if (IS_ERR(priv->ccm))
45*4882a593Smuzhiyun return PTR_ERR(priv->ccm);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * This should go away once we've moved to the driver model for
49*4882a593Smuzhiyun * clocks resp. phys.
50*4882a593Smuzhiyun */
51*4882a593Smuzhiyun priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
52*4882a593Smuzhiyun #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
53*4882a593Smuzhiyun extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;
56*4882a593Smuzhiyun priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
57*4882a593Smuzhiyun extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
58*4882a593Smuzhiyun priv->phy_index++; /* Non otg phys start at 1 */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun setbits_le32(&priv->ccm->ahb_gate0,
61*4882a593Smuzhiyun priv->ahb_gate_mask | extra_ahb_gate_mask);
62*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
63*4882a593Smuzhiyun setbits_le32(&priv->ccm->ahb_reset0_cfg,
64*4882a593Smuzhiyun priv->ahb_gate_mask | extra_ahb_gate_mask);
65*4882a593Smuzhiyun #endif
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun sunxi_usb_phy_init(priv->phy_index);
68*4882a593Smuzhiyun sunxi_usb_phy_power_on(priv->phy_index);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun hcor = (struct ehci_hcor *)((uintptr_t)hccr +
71*4882a593Smuzhiyun HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
ehci_usb_remove(struct udevice * dev)76*4882a593Smuzhiyun static int ehci_usb_remove(struct udevice *dev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct ehci_sunxi_priv *priv = dev_get_priv(dev);
79*4882a593Smuzhiyun int ret;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ret = ehci_deregister(dev);
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun sunxi_usb_phy_exit(priv->phy_index);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
88*4882a593Smuzhiyun clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
89*4882a593Smuzhiyun #endif
90*4882a593Smuzhiyun clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct udevice_id ehci_usb_ids[] = {
96*4882a593Smuzhiyun { .compatible = "allwinner,sun4i-a10-ehci", },
97*4882a593Smuzhiyun { .compatible = "allwinner,sun5i-a13-ehci", },
98*4882a593Smuzhiyun { .compatible = "allwinner,sun6i-a31-ehci", },
99*4882a593Smuzhiyun { .compatible = "allwinner,sun7i-a20-ehci", },
100*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a23-ehci", },
101*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a83t-ehci", },
102*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-h3-ehci", },
103*4882a593Smuzhiyun { .compatible = "allwinner,sun9i-a80-ehci", },
104*4882a593Smuzhiyun { .compatible = "allwinner,sun50i-a64-ehci", },
105*4882a593Smuzhiyun { }
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun U_BOOT_DRIVER(ehci_sunxi) = {
109*4882a593Smuzhiyun .name = "ehci_sunxi",
110*4882a593Smuzhiyun .id = UCLASS_USB,
111*4882a593Smuzhiyun .of_match = ehci_usb_ids,
112*4882a593Smuzhiyun .probe = ehci_usb_probe,
113*4882a593Smuzhiyun .remove = ehci_usb_remove,
114*4882a593Smuzhiyun .ops = &ehci_usb_ops,
115*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct usb_platdata),
116*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv),
117*4882a593Smuzhiyun .flags = DM_FLAG_ALLOC_PRIV_DMA,
118*4882a593Smuzhiyun };
119