1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2010
3*4882a593Smuzhiyun * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2009
6*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com>
7*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <usb.h>
15*4882a593Smuzhiyun #include "ehci.h"
16*4882a593Smuzhiyun #include <asm/arch/hardware.h>
17*4882a593Smuzhiyun #include <asm/arch/spr_misc.h>
18*4882a593Smuzhiyun
spear6xx_usbh_stop(void)19*4882a593Smuzhiyun static void spear6xx_usbh_stop(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct misc_regs *const misc_p =
22*4882a593Smuzhiyun (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
23*4882a593Smuzhiyun u32 periph1_rst = readl(misc_p->periph1_rst);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
26*4882a593Smuzhiyun writel(periph1_rst, misc_p->periph1_rst);
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun udelay(1000);
29*4882a593Smuzhiyun periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
30*4882a593Smuzhiyun writel(periph1_rst, misc_p->periph1_rst);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun * Create the appropriate control structures to manage
35*4882a593Smuzhiyun * a new EHCI host controller.
36*4882a593Smuzhiyun */
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)37*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
38*4882a593Smuzhiyun struct ehci_hccr **hccr, struct ehci_hcor **hcor)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun u32 ehci = 0;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun switch (index) {
43*4882a593Smuzhiyun case 0:
44*4882a593Smuzhiyun ehci = CONFIG_SYS_UHC0_EHCI_BASE;
45*4882a593Smuzhiyun break;
46*4882a593Smuzhiyun case 1:
47*4882a593Smuzhiyun ehci = CONFIG_SYS_UHC1_EHCI_BASE;
48*4882a593Smuzhiyun break;
49*4882a593Smuzhiyun default:
50*4882a593Smuzhiyun printf("ERROR: wrong controller index!\n");
51*4882a593Smuzhiyun break;
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun *hccr = (struct ehci_hccr *)(ehci + 0x100);
55*4882a593Smuzhiyun *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
56*4882a593Smuzhiyun HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
59*4882a593Smuzhiyun (uint32_t)*hccr, (uint32_t)*hcor,
60*4882a593Smuzhiyun (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return 0;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /*
66*4882a593Smuzhiyun * Destroy the appropriate control structures corresponding
67*4882a593Smuzhiyun * the the EHCI host controller.
68*4882a593Smuzhiyun */
ehci_hcd_stop(int index)69*4882a593Smuzhiyun int ehci_hcd_stop(int index)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun #if defined(CONFIG_SPEAR600)
72*4882a593Smuzhiyun spear6xx_usbh_stop();
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77