1*4882a593Smuzhiyun /*-
2*4882a593Smuzhiyun * Copyright (c) 2007-2008, Juniper Networks, Inc.
3*4882a593Smuzhiyun * All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <pci.h>
12*4882a593Smuzhiyun #include <usb.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "ehci.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* Information about a USB port */
18*4882a593Smuzhiyun struct ehci_pci_priv {
19*4882a593Smuzhiyun struct ehci_ctrl ehci;
20*4882a593Smuzhiyun struct phy phy;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(DM_USB)
ehci_pci_init(struct udevice * dev,struct ehci_hccr ** ret_hccr,struct ehci_hcor ** ret_hcor)24*4882a593Smuzhiyun static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
25*4882a593Smuzhiyun struct ehci_hcor **ret_hcor)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun struct ehci_pci_priv *priv = dev_get_priv(dev);
28*4882a593Smuzhiyun struct ehci_hccr *hccr;
29*4882a593Smuzhiyun struct ehci_hcor *hcor;
30*4882a593Smuzhiyun int ret;
31*4882a593Smuzhiyun u32 cmd;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun ret = ehci_setup_phy(dev, &priv->phy, 0);
34*4882a593Smuzhiyun if (ret)
35*4882a593Smuzhiyun return ret;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun hccr = (struct ehci_hccr *)dm_pci_map_bar(dev,
38*4882a593Smuzhiyun PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
39*4882a593Smuzhiyun hcor = (struct ehci_hcor *)((uintptr_t) hccr +
40*4882a593Smuzhiyun HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun debug("EHCI-PCI init hccr %#lx and hcor %#lx hc_length %d\n",
43*4882a593Smuzhiyun (ulong)hccr, (ulong)hcor,
44*4882a593Smuzhiyun (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun *ret_hccr = hccr;
47*4882a593Smuzhiyun *ret_hcor = hcor;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* enable busmaster */
50*4882a593Smuzhiyun dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
51*4882a593Smuzhiyun cmd |= PCI_COMMAND_MASTER;
52*4882a593Smuzhiyun dm_pci_write_config32(dev, PCI_COMMAND, cmd);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #else
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun #ifdef CONFIG_PCI_EHCI_DEVICE
60*4882a593Smuzhiyun static struct pci_device_id ehci_pci_ids[] = {
61*4882a593Smuzhiyun /* Please add supported PCI EHCI controller ids here */
62*4882a593Smuzhiyun {0x1033, 0x00E0}, /* NEC */
63*4882a593Smuzhiyun {0x10B9, 0x5239}, /* ULI1575 PCI EHCI module ids */
64*4882a593Smuzhiyun {0x12D8, 0x400F}, /* Pericom */
65*4882a593Smuzhiyun {0, 0}
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun #endif
68*4882a593Smuzhiyun
ehci_pci_legacy_init(pci_dev_t pdev,struct ehci_hccr ** ret_hccr,struct ehci_hcor ** ret_hcor)69*4882a593Smuzhiyun static void ehci_pci_legacy_init(pci_dev_t pdev, struct ehci_hccr **ret_hccr,
70*4882a593Smuzhiyun struct ehci_hcor **ret_hcor)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct ehci_hccr *hccr;
73*4882a593Smuzhiyun struct ehci_hcor *hcor;
74*4882a593Smuzhiyun u32 cmd;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun hccr = (struct ehci_hccr *)pci_map_bar(pdev,
77*4882a593Smuzhiyun PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
78*4882a593Smuzhiyun hcor = (struct ehci_hcor *)((uintptr_t) hccr +
79*4882a593Smuzhiyun HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
82*4882a593Smuzhiyun (u32)hccr, (u32)hcor,
83*4882a593Smuzhiyun (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun *ret_hccr = hccr;
86*4882a593Smuzhiyun *ret_hcor = hcor;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* enable busmaster */
89*4882a593Smuzhiyun pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
90*4882a593Smuzhiyun cmd |= PCI_COMMAND_MASTER;
91*4882a593Smuzhiyun pci_write_config_dword(pdev, PCI_COMMAND, cmd);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /*
95*4882a593Smuzhiyun * Create the appropriate control structures to manage
96*4882a593Smuzhiyun * a new EHCI host controller.
97*4882a593Smuzhiyun */
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** ret_hccr,struct ehci_hcor ** ret_hcor)98*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
99*4882a593Smuzhiyun struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun pci_dev_t pdev;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #ifdef CONFIG_PCI_EHCI_DEVICE
104*4882a593Smuzhiyun pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
105*4882a593Smuzhiyun #else
106*4882a593Smuzhiyun pdev = pci_find_class(PCI_CLASS_SERIAL_USB_EHCI, index);
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun if (pdev < 0) {
109*4882a593Smuzhiyun printf("EHCI host controller not found\n");
110*4882a593Smuzhiyun return -1;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun ehci_pci_legacy_init(pdev, ret_hccr, ret_hcor);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun * Destroy the appropriate control structures corresponding
119*4882a593Smuzhiyun * the the EHCI host controller.
120*4882a593Smuzhiyun */
ehci_hcd_stop(int index)121*4882a593Smuzhiyun int ehci_hcd_stop(int index)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun #endif /* !CONFIG_IS_ENABLED(DM_USB) */
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(DM_USB)
ehci_pci_probe(struct udevice * dev)128*4882a593Smuzhiyun static int ehci_pci_probe(struct udevice *dev)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct ehci_hccr *hccr;
131*4882a593Smuzhiyun struct ehci_hcor *hcor;
132*4882a593Smuzhiyun int ret;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun ret = ehci_pci_init(dev, &hccr, &hcor);
135*4882a593Smuzhiyun if (ret)
136*4882a593Smuzhiyun return ret;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
ehci_pci_remove(struct udevice * dev)141*4882a593Smuzhiyun static int ehci_pci_remove(struct udevice *dev)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun struct ehci_pci_priv *priv = dev_get_priv(dev);
144*4882a593Smuzhiyun int ret;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun ret = ehci_deregister(dev);
147*4882a593Smuzhiyun if (ret)
148*4882a593Smuzhiyun return ret;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun return ehci_shutdown_phy(dev, &priv->phy);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun static const struct udevice_id ehci_pci_ids[] = {
154*4882a593Smuzhiyun { .compatible = "ehci-pci" },
155*4882a593Smuzhiyun { }
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun U_BOOT_DRIVER(ehci_pci) = {
159*4882a593Smuzhiyun .name = "ehci_pci",
160*4882a593Smuzhiyun .id = UCLASS_USB,
161*4882a593Smuzhiyun .probe = ehci_pci_probe,
162*4882a593Smuzhiyun .remove = ehci_pci_remove,
163*4882a593Smuzhiyun .of_match = ehci_pci_ids,
164*4882a593Smuzhiyun .ops = &ehci_usb_ops,
165*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct usb_platdata),
166*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct ehci_pci_priv),
167*4882a593Smuzhiyun .flags = DM_FLAG_ALLOC_PRIV_DMA,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun static struct pci_device_id ehci_pci_supported[] = {
171*4882a593Smuzhiyun { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI, ~0) },
172*4882a593Smuzhiyun {},
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun U_BOOT_PCI_DEVICE(ehci_pci, ehci_pci_supported);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #endif /* CONFIG_IS_ENABLED(DM_USB) */
178