xref: /OK3568_Linux_fs/u-boot/drivers/usb/gadget/pxa27x_udc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * PXA27x USB device driver for u-boot.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
5*4882a593Smuzhiyun  * Copyright (C) 2007 Eurotech S.p.A.  <info@eurotech.it>
6*4882a593Smuzhiyun  * Copyright (C) 2008 Vivek Kutal      <vivek.kutal@azingo.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <asm/arch/hardware.h>
14*4882a593Smuzhiyun #include <asm/byteorder.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun #include <usbdevice.h>
17*4882a593Smuzhiyun #include <usb/pxa27x_udc.h>
18*4882a593Smuzhiyun #include <usb/udc.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "ep0.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* number of endpoints on this UDC */
23*4882a593Smuzhiyun #define UDC_MAX_ENDPOINTS	24
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static struct urb *ep0_urb;
26*4882a593Smuzhiyun static struct usb_device_instance *udc_device;
27*4882a593Smuzhiyun static int ep0state = EP0_IDLE;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #ifdef USBDDBG
udc_dump_buffer(char * name,u8 * buf,int len)30*4882a593Smuzhiyun static void udc_dump_buffer(char *name, u8 *buf, int len)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	usbdbg("%s - buf %p, len %d", name, buf, len);
33*4882a593Smuzhiyun 	print_buffer(0, buf, 1, len, 0);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun #else
36*4882a593Smuzhiyun #define udc_dump_buffer(name, buf, len)		/* void */
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun 
udc_ack_int_UDCCR(int mask)39*4882a593Smuzhiyun static inline void udc_ack_int_UDCCR(int mask)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	writel(readl(USIR1) | mask, USIR1);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /*
45*4882a593Smuzhiyun  * If the endpoint has an active tx_urb, then the next packet of data from the
46*4882a593Smuzhiyun  * URB is written to the tx FIFO.
47*4882a593Smuzhiyun  * The total amount of data in the urb is given by urb->actual_length.
48*4882a593Smuzhiyun  * The maximum amount of data that can be sent in any one packet is given by
49*4882a593Smuzhiyun  * endpoint->tx_packetSize.
50*4882a593Smuzhiyun  * The number of data bytes from this URB that have already been transmitted
51*4882a593Smuzhiyun  * is given by endpoint->sent.
52*4882a593Smuzhiyun  * endpoint->last is updated by this routine with the number of data bytes
53*4882a593Smuzhiyun  * transmitted in this packet.
54*4882a593Smuzhiyun  */
udc_write_urb(struct usb_endpoint_instance * endpoint)55*4882a593Smuzhiyun static int udc_write_urb(struct usb_endpoint_instance *endpoint)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	struct urb *urb = endpoint->tx_urb;
58*4882a593Smuzhiyun 	int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
59*4882a593Smuzhiyun 	u32 *data32 = (u32 *) urb->buffer;
60*4882a593Smuzhiyun 	u8  *data8 = (u8 *) urb->buffer;
61*4882a593Smuzhiyun 	unsigned int i, n, w, b, is_short;
62*4882a593Smuzhiyun 	int timeout = 2000;	/* 2ms */
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	if (!urb || !urb->actual_length)
65*4882a593Smuzhiyun 		return -1;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	n = min_t(unsigned int, urb->actual_length - endpoint->sent,
68*4882a593Smuzhiyun 		  endpoint->tx_packetSize);
69*4882a593Smuzhiyun 	if (n <= 0)
70*4882a593Smuzhiyun 		return -1;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	usbdbg("write urb on ep %d", ep_num);
73*4882a593Smuzhiyun #if defined(USBDDBG) && defined(USBDPARANOIA)
74*4882a593Smuzhiyun 	usbdbg("urb: buf %p, buf_len %d, actual_len %d",
75*4882a593Smuzhiyun 		urb->buffer, urb->buffer_length, urb->actual_length);
76*4882a593Smuzhiyun 	usbdbg("endpoint: sent %d, tx_packetSize %d, last %d",
77*4882a593Smuzhiyun 		endpoint->sent, endpoint->tx_packetSize, endpoint->last);
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	is_short = n != endpoint->tx_packetSize;
81*4882a593Smuzhiyun 	w = n / 4;
82*4882a593Smuzhiyun 	b = n % 4;
83*4882a593Smuzhiyun 	usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b);
84*4882a593Smuzhiyun 	udc_dump_buffer("urb write", data8 + endpoint->sent, n);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* Prepare for data send */
87*4882a593Smuzhiyun 	if (ep_num)
88*4882a593Smuzhiyun 		writel(UDCCSR_PC ,UDCCSN(ep_num));
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	for (i = 0; i < w; i++)
91*4882a593Smuzhiyun 		  writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num));
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	for (i = 0; i < b; i++)
94*4882a593Smuzhiyun 		  writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num));
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	/* Set "Packet Complete" if less data then tx_packetSize */
97*4882a593Smuzhiyun 	if (is_short)
98*4882a593Smuzhiyun 		writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num));
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	/* Wait for data sent */
101*4882a593Smuzhiyun 	if (ep_num) {
102*4882a593Smuzhiyun 		while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) {
103*4882a593Smuzhiyun 			if (timeout-- == 0)
104*4882a593Smuzhiyun 				return -1;
105*4882a593Smuzhiyun 			else
106*4882a593Smuzhiyun 				udelay(1);
107*4882a593Smuzhiyun 		}
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	endpoint->last = n;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	if (ep_num) {
113*4882a593Smuzhiyun 		usbd_tx_complete(endpoint);
114*4882a593Smuzhiyun 	} else {
115*4882a593Smuzhiyun 		endpoint->sent += n;
116*4882a593Smuzhiyun 		endpoint->last -= n;
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	if (endpoint->sent >= urb->actual_length) {
120*4882a593Smuzhiyun 		urb->actual_length = 0;
121*4882a593Smuzhiyun 		endpoint->sent = 0;
122*4882a593Smuzhiyun 		endpoint->last = 0;
123*4882a593Smuzhiyun 	}
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	if ((endpoint->sent >= urb->actual_length) && (!ep_num)) {
126*4882a593Smuzhiyun 		usbdbg("ep0 IN stage done");
127*4882a593Smuzhiyun 		if (is_short)
128*4882a593Smuzhiyun 			ep0state = EP0_IDLE;
129*4882a593Smuzhiyun 		else
130*4882a593Smuzhiyun 			ep0state = EP0_XFER_COMPLETE;
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
udc_read_urb(struct usb_endpoint_instance * endpoint)136*4882a593Smuzhiyun static int udc_read_urb(struct usb_endpoint_instance *endpoint)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct urb *urb = endpoint->rcv_urb;
139*4882a593Smuzhiyun 	int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
140*4882a593Smuzhiyun 	u32 *data32 = (u32 *) urb->buffer;
141*4882a593Smuzhiyun 	unsigned int i, n;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	usbdbg("read urb on ep %d", ep_num);
144*4882a593Smuzhiyun #if defined(USBDDBG) && defined(USBDPARANOIA)
145*4882a593Smuzhiyun 	usbdbg("urb: buf %p, buf_len %d, actual_len %d",
146*4882a593Smuzhiyun 		urb->buffer, urb->buffer_length, urb->actual_length);
147*4882a593Smuzhiyun 	usbdbg("endpoint: rcv_packetSize %d",
148*4882a593Smuzhiyun 		endpoint->rcv_packetSize);
149*4882a593Smuzhiyun #endif
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	if (readl(UDCCSN(ep_num)) & UDCCSR_BNE)
152*4882a593Smuzhiyun 		n = readl(UDCBCN(ep_num)) & 0x3ff;
153*4882a593Smuzhiyun 	else /* zlp */
154*4882a593Smuzhiyun 		n = 0;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : "");
157*4882a593Smuzhiyun 	for (i = 0; i < n; i += 4)
158*4882a593Smuzhiyun 		data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num));
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n);
161*4882a593Smuzhiyun 	usbd_rcv_complete(endpoint, n, 0);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
udc_read_urb_ep0(void)166*4882a593Smuzhiyun static int udc_read_urb_ep0(void)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	u32 *data32 = (u32 *) ep0_urb->buffer;
169*4882a593Smuzhiyun 	u8 *data8 = (u8 *) ep0_urb->buffer;
170*4882a593Smuzhiyun 	unsigned int i, n, w, b;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	usbdbg("read urb on ep 0");
173*4882a593Smuzhiyun #if defined(USBDDBG) && defined(USBDPARANOIA)
174*4882a593Smuzhiyun 	usbdbg("urb: buf %p, buf_len %d, actual_len %d",
175*4882a593Smuzhiyun 		ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length);
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	n = readl(UDCBCR0);
179*4882a593Smuzhiyun 	w = n / 4;
180*4882a593Smuzhiyun 	b = n % 4;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	for (i = 0; i < w; i++) {
183*4882a593Smuzhiyun 		data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0));
184*4882a593Smuzhiyun 		/* ep0_urb->actual_length += 4; */
185*4882a593Smuzhiyun 	}
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	for (i = 0; i < b; i++) {
188*4882a593Smuzhiyun 		data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0));
189*4882a593Smuzhiyun 		/* ep0_urb->actual_length++; */
190*4882a593Smuzhiyun 	}
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	ep0_urb->actual_length += n;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length);
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0);
197*4882a593Smuzhiyun 	if (ep0_urb->actual_length == ep0_urb->device_request.wLength)
198*4882a593Smuzhiyun 		return 1;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
udc_handle_ep0(struct usb_endpoint_instance * endpoint)203*4882a593Smuzhiyun static void udc_handle_ep0(struct usb_endpoint_instance *endpoint)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	u32 udccsr0 = readl(UDCCSR0);
206*4882a593Smuzhiyun 	u32 *data = (u32 *) &ep0_urb->device_request;
207*4882a593Smuzhiyun 	int i;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	usbdbg("udccsr0 %x", udccsr0);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* Clear stall status */
212*4882a593Smuzhiyun 	if (udccsr0 & UDCCSR0_SST) {
213*4882a593Smuzhiyun 		usberr("clear stall status");
214*4882a593Smuzhiyun 		writel(UDCCSR0_SST, UDCCSR0);
215*4882a593Smuzhiyun 		ep0state = EP0_IDLE;
216*4882a593Smuzhiyun 	}
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/* previous request unfinished?  non-error iff back-to-back ... */
219*4882a593Smuzhiyun 	if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE)
220*4882a593Smuzhiyun 		ep0state = EP0_IDLE;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	switch (ep0state) {
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	case EP0_IDLE:
225*4882a593Smuzhiyun 		udccsr0 = readl(UDCCSR0);
226*4882a593Smuzhiyun 		/* Start control request? */
227*4882a593Smuzhiyun 		if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE))
228*4882a593Smuzhiyun 			== (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) {
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 			/* Read SETUP packet.
231*4882a593Smuzhiyun 			 * SETUP packet size is 8 bytes (aka 2 words)
232*4882a593Smuzhiyun 			 */
233*4882a593Smuzhiyun 			usbdbg("try reading SETUP packet");
234*4882a593Smuzhiyun 			for (i = 0; i < 2; i++) {
235*4882a593Smuzhiyun 				if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) {
236*4882a593Smuzhiyun 					usberr("setup packet too short:%d", i);
237*4882a593Smuzhiyun 					goto stall;
238*4882a593Smuzhiyun 				}
239*4882a593Smuzhiyun 				data[i] = readl(UDCDR0);
240*4882a593Smuzhiyun 			}
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 			writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0);
243*4882a593Smuzhiyun 			if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) {
244*4882a593Smuzhiyun 				usberr("setup packet too long");
245*4882a593Smuzhiyun 				goto stall;
246*4882a593Smuzhiyun 			}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 			udc_dump_buffer("ep0 setup read", (u8 *) data, 8);
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 			if (ep0_urb->device_request.wLength == 0) {
251*4882a593Smuzhiyun 				usbdbg("Zero Data control Packet\n");
252*4882a593Smuzhiyun 				if (ep0_recv_setup(ep0_urb)) {
253*4882a593Smuzhiyun 					usberr("Invalid Setup Packet\n");
254*4882a593Smuzhiyun 					udc_dump_buffer("ep0 setup read",
255*4882a593Smuzhiyun 								(u8 *)data, 8);
256*4882a593Smuzhiyun 					goto stall;
257*4882a593Smuzhiyun 				}
258*4882a593Smuzhiyun 				writel(UDCCSR0_IPR, UDCCSR0);
259*4882a593Smuzhiyun 				ep0state = EP0_IDLE;
260*4882a593Smuzhiyun 			} else {
261*4882a593Smuzhiyun 				/* Check direction */
262*4882a593Smuzhiyun 				if ((ep0_urb->device_request.bmRequestType &
263*4882a593Smuzhiyun 						USB_REQ_DIRECTION_MASK)
264*4882a593Smuzhiyun 						== USB_REQ_HOST2DEVICE) {
265*4882a593Smuzhiyun 					ep0state = EP0_OUT_DATA;
266*4882a593Smuzhiyun 					ep0_urb->buffer =
267*4882a593Smuzhiyun 						(u8 *)ep0_urb->buffer_data;
268*4882a593Smuzhiyun 					ep0_urb->buffer_length =
269*4882a593Smuzhiyun 						sizeof(ep0_urb->buffer_data);
270*4882a593Smuzhiyun 					ep0_urb->actual_length = 0;
271*4882a593Smuzhiyun 					writel(UDCCSR0_IPR, UDCCSR0);
272*4882a593Smuzhiyun 				} else {
273*4882a593Smuzhiyun 					/* The ep0_recv_setup function has
274*4882a593Smuzhiyun 					 * already placed our response packet
275*4882a593Smuzhiyun 					 * data in ep0_urb->buffer and the
276*4882a593Smuzhiyun 					 * packet length in
277*4882a593Smuzhiyun 					 * ep0_urb->actual_length.
278*4882a593Smuzhiyun 					 */
279*4882a593Smuzhiyun 					if (ep0_recv_setup(ep0_urb)) {
280*4882a593Smuzhiyun stall:
281*4882a593Smuzhiyun 						usberr("Invalid setup packet");
282*4882a593Smuzhiyun 						udc_dump_buffer("ep0 setup read"
283*4882a593Smuzhiyun 							, (u8 *) data, 8);
284*4882a593Smuzhiyun 						ep0state = EP0_IDLE;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 						writel(UDCCSR0_SA |
287*4882a593Smuzhiyun 						UDCCSR0_OPC | UDCCSR0_FST |
288*4882a593Smuzhiyun 						UDCCS0_FTF, UDCCSR0);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 						return;
291*4882a593Smuzhiyun 					}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 					endpoint->tx_urb = ep0_urb;
294*4882a593Smuzhiyun 					endpoint->sent = 0;
295*4882a593Smuzhiyun 					usbdbg("EP0_IN_DATA");
296*4882a593Smuzhiyun 					ep0state = EP0_IN_DATA;
297*4882a593Smuzhiyun 					if (udc_write_urb(endpoint) < 0)
298*4882a593Smuzhiyun 						goto stall;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 				}
301*4882a593Smuzhiyun 			}
302*4882a593Smuzhiyun 			return;
303*4882a593Smuzhiyun 		} else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA))
304*4882a593Smuzhiyun 			== (UDCCSR0_OPC|UDCCSR0_SA)) {
305*4882a593Smuzhiyun 			usberr("Setup Active but no data. Stalling ....\n");
306*4882a593Smuzhiyun 			goto stall;
307*4882a593Smuzhiyun 		} else {
308*4882a593Smuzhiyun 			usbdbg("random early IRQs");
309*4882a593Smuzhiyun 			/* Some random early IRQs:
310*4882a593Smuzhiyun 			 * - we acked FST
311*4882a593Smuzhiyun 			 * - IPR cleared
312*4882a593Smuzhiyun 			 * - OPC got set, without SA (likely status stage)
313*4882a593Smuzhiyun 			 */
314*4882a593Smuzhiyun 			writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0);
315*4882a593Smuzhiyun 		}
316*4882a593Smuzhiyun 		break;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	case EP0_OUT_DATA:
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 		if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) {
321*4882a593Smuzhiyun 			if (udc_read_urb_ep0()) {
322*4882a593Smuzhiyun read_complete:
323*4882a593Smuzhiyun 				ep0state = EP0_IDLE;
324*4882a593Smuzhiyun 				if (ep0_recv_setup(ep0_urb)) {
325*4882a593Smuzhiyun 					/* Not a setup packet, stall next
326*4882a593Smuzhiyun 					 * EP0 transaction
327*4882a593Smuzhiyun 					 */
328*4882a593Smuzhiyun 					udc_dump_buffer("ep0 setup read",
329*4882a593Smuzhiyun 							(u8 *) data, 8);
330*4882a593Smuzhiyun 					usberr("can't parse setup packet\n");
331*4882a593Smuzhiyun 					goto stall;
332*4882a593Smuzhiyun 				}
333*4882a593Smuzhiyun 			}
334*4882a593Smuzhiyun 		} else if (!(udccsr0 & UDCCSR0_OPC) &&
335*4882a593Smuzhiyun 				!(udccsr0 & UDCCSR0_IPR)) {
336*4882a593Smuzhiyun 			if (ep0_urb->device_request.wLength ==
337*4882a593Smuzhiyun 				ep0_urb->actual_length)
338*4882a593Smuzhiyun 				goto read_complete;
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 			usberr("Premature Status\n");
341*4882a593Smuzhiyun 			ep0state = EP0_IDLE;
342*4882a593Smuzhiyun 		}
343*4882a593Smuzhiyun 		break;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	case EP0_IN_DATA:
346*4882a593Smuzhiyun 		/* GET_DESCRIPTOR etc */
347*4882a593Smuzhiyun 		if (udccsr0 & UDCCSR0_OPC) {
348*4882a593Smuzhiyun 			writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0);
349*4882a593Smuzhiyun 			usberr("ep0in premature status");
350*4882a593Smuzhiyun 			ep0state = EP0_IDLE;
351*4882a593Smuzhiyun 		} else {
352*4882a593Smuzhiyun 			/* irq was IPR clearing */
353*4882a593Smuzhiyun 			if (udc_write_urb(endpoint) < 0) {
354*4882a593Smuzhiyun 				usberr("ep0_write_error\n");
355*4882a593Smuzhiyun 				goto stall;
356*4882a593Smuzhiyun 			}
357*4882a593Smuzhiyun 		}
358*4882a593Smuzhiyun 		break;
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	case EP0_XFER_COMPLETE:
361*4882a593Smuzhiyun 		writel(UDCCSR0_IPR, UDCCSR0);
362*4882a593Smuzhiyun 		ep0state = EP0_IDLE;
363*4882a593Smuzhiyun 		break;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	default:
366*4882a593Smuzhiyun 		usbdbg("Default\n");
367*4882a593Smuzhiyun 	}
368*4882a593Smuzhiyun 	writel(USIR0_IR0, USIR0);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
udc_handle_ep(struct usb_endpoint_instance * endpoint)371*4882a593Smuzhiyun static void udc_handle_ep(struct usb_endpoint_instance *endpoint)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun 	int ep_addr = endpoint->endpoint_address;
374*4882a593Smuzhiyun 	int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
375*4882a593Smuzhiyun 	int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN);
378*4882a593Smuzhiyun 	if (flags)
379*4882a593Smuzhiyun 		writel(flags, UDCCSN(ep_num));
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (ep_isout)
382*4882a593Smuzhiyun 		udc_read_urb(endpoint);
383*4882a593Smuzhiyun 	else
384*4882a593Smuzhiyun 		udc_write_urb(endpoint);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	writel(UDCCSR_PC, UDCCSN(ep_num));
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun 
udc_state_changed(void)389*4882a593Smuzhiyun static void udc_state_changed(void)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	writel(readl(UDCCR) | UDCCR_SMAC, UDCCR);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	usbdbg("New UDC settings are: conf %d - inter %d - alter %d",
395*4882a593Smuzhiyun 	       (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S,
396*4882a593Smuzhiyun 	       (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S,
397*4882a593Smuzhiyun 	       (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0);
400*4882a593Smuzhiyun 	writel(UDCISR1_IRCC, UDCISR1);
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun 
udc_irq(void)403*4882a593Smuzhiyun void udc_irq(void)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun 	int handled;
406*4882a593Smuzhiyun 	struct usb_endpoint_instance *endpoint;
407*4882a593Smuzhiyun 	int ep_num, i;
408*4882a593Smuzhiyun 	u32 udcisr0;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	do {
411*4882a593Smuzhiyun 		handled = 0;
412*4882a593Smuzhiyun 		/* Suspend Interrupt Request */
413*4882a593Smuzhiyun 		if (readl(USIR1) & UDCCR_SUSIR) {
414*4882a593Smuzhiyun 			usbdbg("Suspend\n");
415*4882a593Smuzhiyun 			udc_ack_int_UDCCR(UDCCR_SUSIR);
416*4882a593Smuzhiyun 			handled = 1;
417*4882a593Smuzhiyun 			ep0state = EP0_IDLE;
418*4882a593Smuzhiyun 		}
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 		/* Resume Interrupt Request */
421*4882a593Smuzhiyun 		if (readl(USIR1) & UDCCR_RESIR) {
422*4882a593Smuzhiyun 			udc_ack_int_UDCCR(UDCCR_RESIR);
423*4882a593Smuzhiyun 			handled = 1;
424*4882a593Smuzhiyun 			usbdbg("USB resume\n");
425*4882a593Smuzhiyun 		}
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 		if (readl(USIR1) & (1<<31)) {
428*4882a593Smuzhiyun 			handled = 1;
429*4882a593Smuzhiyun 			udc_state_changed();
430*4882a593Smuzhiyun 		}
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 		/* Reset Interrupt Request */
433*4882a593Smuzhiyun 		if (readl(USIR1) & UDCCR_RSTIR) {
434*4882a593Smuzhiyun 			udc_ack_int_UDCCR(UDCCR_RSTIR);
435*4882a593Smuzhiyun 			handled = 1;
436*4882a593Smuzhiyun 			usbdbg("Reset\n");
437*4882a593Smuzhiyun 			usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
438*4882a593Smuzhiyun 		} else {
439*4882a593Smuzhiyun 			if (readl(USIR0))
440*4882a593Smuzhiyun 				usbdbg("UISR0: %x \n", readl(USIR0));
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 			if (readl(USIR0) & 0x2)
443*4882a593Smuzhiyun 				writel(0x2, USIR0);
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 			/* Control traffic */
446*4882a593Smuzhiyun 			if (readl(USIR0)  & USIR0_IR0) {
447*4882a593Smuzhiyun 				handled = 1;
448*4882a593Smuzhiyun 				writel(USIR0_IR0, USIR0);
449*4882a593Smuzhiyun 				udc_handle_ep0(udc_device->bus->endpoint_array);
450*4882a593Smuzhiyun 			}
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 			endpoint = udc_device->bus->endpoint_array;
453*4882a593Smuzhiyun 			for (i = 0; i < udc_device->bus->max_endpoints; i++) {
454*4882a593Smuzhiyun 				ep_num = (endpoint[i].endpoint_address) &
455*4882a593Smuzhiyun 						USB_ENDPOINT_NUMBER_MASK;
456*4882a593Smuzhiyun 				if (!ep_num)
457*4882a593Smuzhiyun 					continue;
458*4882a593Smuzhiyun 				udcisr0 = readl(UDCISR0);
459*4882a593Smuzhiyun 				if (udcisr0 &
460*4882a593Smuzhiyun 					UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) {
461*4882a593Smuzhiyun 					writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP),
462*4882a593Smuzhiyun 					       UDCISR0);
463*4882a593Smuzhiyun 					udc_handle_ep(&endpoint[i]);
464*4882a593Smuzhiyun 				}
465*4882a593Smuzhiyun 			}
466*4882a593Smuzhiyun 		}
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	} while (handled);
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun /* The UDCCR reg contains mask and interrupt status bits,
472*4882a593Smuzhiyun  * so using '|=' isn't safe as it may ack an interrupt.
473*4882a593Smuzhiyun  */
474*4882a593Smuzhiyun #define UDCCR_OEN		(1 << 31)   /* On-the-Go Enable */
475*4882a593Smuzhiyun #define UDCCR_MASK_BITS     	(UDCCR_OEN | UDCCR_UDE)
476*4882a593Smuzhiyun 
udc_set_mask_UDCCR(int mask)477*4882a593Smuzhiyun static inline void udc_set_mask_UDCCR(int mask)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun     writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun 
udc_clear_mask_UDCCR(int mask)482*4882a593Smuzhiyun static inline void udc_clear_mask_UDCCR(int mask)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun     writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
pio_irq_enable(int ep_num)487*4882a593Smuzhiyun static void pio_irq_enable(int ep_num)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun 	if (ep_num < 16)
490*4882a593Smuzhiyun 		writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0);
491*4882a593Smuzhiyun 	else {
492*4882a593Smuzhiyun 		ep_num -= 16;
493*4882a593Smuzhiyun 		writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1);
494*4882a593Smuzhiyun 	}
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun /*
498*4882a593Smuzhiyun  * udc_set_nak
499*4882a593Smuzhiyun  *
500*4882a593Smuzhiyun  * Allow upper layers to signal lower layers should not accept more RX data
501*4882a593Smuzhiyun  */
udc_set_nak(int ep_num)502*4882a593Smuzhiyun void udc_set_nak(int ep_num)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	/* TODO */
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun /*
508*4882a593Smuzhiyun  * udc_unset_nak
509*4882a593Smuzhiyun  *
510*4882a593Smuzhiyun  * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
511*4882a593Smuzhiyun  * Switch off NAKing on this endpoint to accept more data output from host.
512*4882a593Smuzhiyun  */
udc_unset_nak(int ep_num)513*4882a593Smuzhiyun void udc_unset_nak(int ep_num)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	/* TODO */
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun 
udc_endpoint_write(struct usb_endpoint_instance * endpoint)518*4882a593Smuzhiyun int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun 	return udc_write_urb(endpoint);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun /* Associate a physical endpoint with endpoint instance */
udc_setup_ep(struct usb_device_instance * device,unsigned int id,struct usb_endpoint_instance * endpoint)524*4882a593Smuzhiyun void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
525*4882a593Smuzhiyun 				struct usb_endpoint_instance *endpoint)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun 	int ep_num, ep_addr, ep_isout, ep_type, ep_size;
528*4882a593Smuzhiyun 	int config, interface, alternate;
529*4882a593Smuzhiyun 	u32 tmp;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	usbdbg("setting up endpoint id %d", id);
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (!endpoint) {
534*4882a593Smuzhiyun 		usberr("endpoint void!");
535*4882a593Smuzhiyun 		return;
536*4882a593Smuzhiyun 	}
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
539*4882a593Smuzhiyun 	if (ep_num >= UDC_MAX_ENDPOINTS) {
540*4882a593Smuzhiyun 		usberr("unable to setup ep %d!", ep_num);
541*4882a593Smuzhiyun 		return;
542*4882a593Smuzhiyun 	}
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	pio_irq_enable(ep_num);
545*4882a593Smuzhiyun 	if (ep_num == 0) {
546*4882a593Smuzhiyun 		/* Done for ep0 */
547*4882a593Smuzhiyun 		return;
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	config = 1;
551*4882a593Smuzhiyun 	interface = 0;
552*4882a593Smuzhiyun 	alternate = 0;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	usbdbg("config %d - interface %d - alternate %d",
555*4882a593Smuzhiyun 		config, interface, alternate);
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	ep_addr = endpoint->endpoint_address;
558*4882a593Smuzhiyun 	ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
559*4882a593Smuzhiyun 	ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
560*4882a593Smuzhiyun 	ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes;
561*4882a593Smuzhiyun 	ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	usbdbg("addr %x, num %d, dir %s, type %s, packet size %d",
564*4882a593Smuzhiyun 		ep_addr, ep_num,
565*4882a593Smuzhiyun 		ep_isout ? "out" : "in",
566*4882a593Smuzhiyun 		ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" :
567*4882a593Smuzhiyun 		ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" :
568*4882a593Smuzhiyun 		ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???",
569*4882a593Smuzhiyun 		ep_size
570*4882a593Smuzhiyun 		);
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	/* Configure UDCCRx */
573*4882a593Smuzhiyun 	tmp = 0;
574*4882a593Smuzhiyun 	tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN;
575*4882a593Smuzhiyun 	tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN;
576*4882a593Smuzhiyun 	tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN;
577*4882a593Smuzhiyun 	tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN;
578*4882a593Smuzhiyun 	tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET;
579*4882a593Smuzhiyun 	tmp |= ep_isout ? 0 : UDCCONR_ED;
580*4882a593Smuzhiyun 	tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS;
581*4882a593Smuzhiyun 	tmp |= UDCCONR_EE;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	writel(tmp, UDCCN(ep_num));
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 	usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num)));
586*4882a593Smuzhiyun 	usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num)));
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun /* Connect the USB device to the bus */
udc_connect(void)590*4882a593Smuzhiyun void udc_connect(void)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	usbdbg("UDC connect");
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun #ifdef CONFIG_USB_DEV_PULLUP_GPIO
595*4882a593Smuzhiyun 	/* Turn on the USB connection by enabling the pullup resistor */
596*4882a593Smuzhiyun 	writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO))
597*4882a593Smuzhiyun 		     | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO),
598*4882a593Smuzhiyun 	       GPDR(CONFIG_USB_DEV_PULLUP_GPIO));
599*4882a593Smuzhiyun 	writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO));
600*4882a593Smuzhiyun #else
601*4882a593Smuzhiyun 	/* Host port 2 transceiver D+ pull up enable */
602*4882a593Smuzhiyun 	writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR);
603*4882a593Smuzhiyun #endif
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun /* Disconnect the USB device to the bus */
udc_disconnect(void)607*4882a593Smuzhiyun void udc_disconnect(void)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun 	usbdbg("UDC disconnect");
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun #ifdef CONFIG_USB_DEV_PULLUP_GPIO
612*4882a593Smuzhiyun 	/* Turn off the USB connection by disabling the pullup resistor */
613*4882a593Smuzhiyun 	writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO));
614*4882a593Smuzhiyun #else
615*4882a593Smuzhiyun 	/* Host port 2 transceiver D+ pull up disable */
616*4882a593Smuzhiyun 	writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR);
617*4882a593Smuzhiyun #endif
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun /* Switch on the UDC */
udc_enable(struct usb_device_instance * device)621*4882a593Smuzhiyun void udc_enable(struct usb_device_instance *device)
622*4882a593Smuzhiyun {
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	ep0state = EP0_IDLE;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/* enable endpoint 0, A, B's Packet Complete Interrupt. */
627*4882a593Smuzhiyun 	writel(0xffffffff, UDCICR0);
628*4882a593Smuzhiyun 	writel(0xa8000000, UDCICR1);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	/* clear the interrupt status/control registers */
631*4882a593Smuzhiyun 	writel(0xffffffff, UDCISR0);
632*4882a593Smuzhiyun 	writel(0xffffffff, UDCISR1);
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	/* set UDC-enable */
635*4882a593Smuzhiyun 	udc_set_mask_UDCCR(UDCCR_UDE);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	udc_device = device;
638*4882a593Smuzhiyun 	if (!ep0_urb)
639*4882a593Smuzhiyun 		ep0_urb = usbd_alloc_urb(udc_device,
640*4882a593Smuzhiyun 				udc_device->bus->endpoint_array);
641*4882a593Smuzhiyun 	else
642*4882a593Smuzhiyun 		usbinfo("ep0_urb %p already allocated", ep0_urb);
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	usbdbg("UDC Enabled\n");
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun /* Need to check this again */
udc_disable(void)648*4882a593Smuzhiyun void udc_disable(void)
649*4882a593Smuzhiyun {
650*4882a593Smuzhiyun 	usbdbg("disable UDC");
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	udc_clear_mask_UDCCR(UDCCR_UDE);
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	/* Disable clock for USB device */
655*4882a593Smuzhiyun 	writel(readl(CKEN) & ~CKEN11_USB, CKEN);
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	/* Free ep0 URB */
658*4882a593Smuzhiyun 	if (ep0_urb) {
659*4882a593Smuzhiyun 		usbd_dealloc_urb(ep0_urb);
660*4882a593Smuzhiyun 		ep0_urb = NULL;
661*4882a593Smuzhiyun 	}
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 	/* Reset device pointer */
664*4882a593Smuzhiyun 	udc_device = NULL;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun /* Allow udc code to do any additional startup */
udc_startup_events(struct usb_device_instance * device)668*4882a593Smuzhiyun void udc_startup_events(struct usb_device_instance *device)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	/* The DEVICE_INIT event puts the USB device in the state STATE_INIT */
671*4882a593Smuzhiyun 	usbd_device_event_irq(device, DEVICE_INIT, 0);
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	/* The DEVICE_CREATE event puts the USB device in the state
674*4882a593Smuzhiyun 	 * STATE_ATTACHED */
675*4882a593Smuzhiyun 	usbd_device_event_irq(device, DEVICE_CREATE, 0);
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	/* Some USB controller driver implementations signal
678*4882a593Smuzhiyun 	 * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
679*4882a593Smuzhiyun 	 * DEVICE_HUB_CONFIGURED causes a transition to the state
680*4882a593Smuzhiyun 	 * STATE_POWERED, and DEVICE_RESET causes a transition to
681*4882a593Smuzhiyun 	 * the state STATE_DEFAULT.
682*4882a593Smuzhiyun 	 */
683*4882a593Smuzhiyun 	udc_enable(device);
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun /* Initialize h/w stuff */
udc_init(void)687*4882a593Smuzhiyun int udc_init(void)
688*4882a593Smuzhiyun {
689*4882a593Smuzhiyun 	udc_device = NULL;
690*4882a593Smuzhiyun 	usbdbg("PXA27x usbd start");
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	/* Enable clock for USB device */
693*4882a593Smuzhiyun 	writel(readl(CKEN) | CKEN11_USB, CKEN);
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	/* Disable the UDC */
696*4882a593Smuzhiyun 	udc_clear_mask_UDCCR(UDCCR_UDE);
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	/* Disable IRQs: we don't use them */
699*4882a593Smuzhiyun 	writel(0, UDCICR0);
700*4882a593Smuzhiyun 	writel(0, UDCICR1);
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun 	return 0;
703*4882a593Smuzhiyun }
704