1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * from linux:
3*4882a593Smuzhiyun * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * at91_udc -- driver for at91-series USB peripheral controller
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2004 by Thomas Rathbone
8*4882a593Smuzhiyun * Copyright (C) 2005 by HP Labs
9*4882a593Smuzhiyun * Copyright (C) 2005 by David Brownell
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #undef VERBOSE_DEBUG
15*4882a593Smuzhiyun #undef PACKET_TRACE
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <common.h>
18*4882a593Smuzhiyun #include <linux/errno.h>
19*4882a593Smuzhiyun #include <asm/io.h>
20*4882a593Smuzhiyun #include <asm/gpio.h>
21*4882a593Smuzhiyun #include <asm/hardware.h>
22*4882a593Smuzhiyun #include <mach/at91_matrix.h>
23*4882a593Smuzhiyun #include <linux/list.h>
24*4882a593Smuzhiyun #include <linux/usb/ch9.h>
25*4882a593Smuzhiyun #include <linux/usb/gadget.h>
26*4882a593Smuzhiyun #include <linux/usb/at91_udc.h>
27*4882a593Smuzhiyun #include <malloc.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include "at91_udc.h"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * This controller is simple and PIO-only. It's used in many AT91-series
33*4882a593Smuzhiyun * full speed USB controllers, including the at91rm9200 (arm920T, with MMU),
34*4882a593Smuzhiyun * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * This driver expects the board has been wired with two GPIOs supporting
37*4882a593Smuzhiyun * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the
38*4882a593Smuzhiyun * testing hasn't covered such cases.)
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * The pullup is most important (so it's integrated on sam926x parts). It
41*4882a593Smuzhiyun * provides software control over whether the host enumerates the device.
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * The VBUS sensing helps during enumeration, and allows both USB clocks
44*4882a593Smuzhiyun * (and the transceiver) to stay gated off until they're necessary, saving
45*4882a593Smuzhiyun * power. During USB suspend, the 48 MHz clock is gated off in hardware;
46*4882a593Smuzhiyun * it may also be gated off by software during some Linux sleep states.
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define DRIVER_VERSION "3 May 2006"
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static const char driver_name [] = "at91_udc";
52*4882a593Smuzhiyun static const char * const ep_names[] = {
53*4882a593Smuzhiyun "ep0",
54*4882a593Smuzhiyun "ep1",
55*4882a593Smuzhiyun "ep2",
56*4882a593Smuzhiyun "ep3-int",
57*4882a593Smuzhiyun "ep4",
58*4882a593Smuzhiyun "ep5",
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun #define ep0name ep_names[0]
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define at91_udp_read(udc, reg) \
63*4882a593Smuzhiyun __raw_readl((udc)->udp_baseaddr + (reg))
64*4882a593Smuzhiyun #define at91_udp_write(udc, reg, val) \
65*4882a593Smuzhiyun __raw_writel((val), (udc)->udp_baseaddr + (reg))
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static struct at91_udc *controller;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
70*4882a593Smuzhiyun
done(struct at91_ep * ep,struct at91_request * req,int status)71*4882a593Smuzhiyun static void done(struct at91_ep *ep, struct at91_request *req, int status)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun unsigned stopped = ep->stopped;
74*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun list_del_init(&req->queue);
77*4882a593Smuzhiyun if (req->req.status == -EINPROGRESS)
78*4882a593Smuzhiyun req->req.status = status;
79*4882a593Smuzhiyun else
80*4882a593Smuzhiyun status = req->req.status;
81*4882a593Smuzhiyun if (status && status != -ESHUTDOWN)
82*4882a593Smuzhiyun VDBG("%s done %p, status %d\n", ep->ep.name, req, status);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun ep->stopped = 1;
85*4882a593Smuzhiyun spin_unlock(&udc->lock);
86*4882a593Smuzhiyun req->req.complete(&ep->ep, &req->req);
87*4882a593Smuzhiyun spin_lock(&udc->lock);
88*4882a593Smuzhiyun ep->stopped = stopped;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* ep0 is always ready; other endpoints need a non-empty queue */
91*4882a593Smuzhiyun if (list_empty(&ep->queue) && ep->int_mask != (1 << 0))
92*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* bits indicating OUT fifo has data ready */
98*4882a593Smuzhiyun #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1)
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write
102*4882a593Smuzhiyun * back most of the value you just read (because of side effects, including
103*4882a593Smuzhiyun * bits that may change after reading and before writing).
104*4882a593Smuzhiyun *
105*4882a593Smuzhiyun * Except when changing a specific bit, always write values which:
106*4882a593Smuzhiyun * - clear SET_FX bits (setting them could change something)
107*4882a593Smuzhiyun * - set CLR_FX bits (clearing them could change something)
108*4882a593Smuzhiyun *
109*4882a593Smuzhiyun * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE
110*4882a593Smuzhiyun * that shouldn't normally be changed.
111*4882a593Smuzhiyun *
112*4882a593Smuzhiyun * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains,
113*4882a593Smuzhiyun * implying a need to wait for one write to complete (test relevant bits)
114*4882a593Smuzhiyun * before starting the next write. This shouldn't be an issue given how
115*4882a593Smuzhiyun * infrequently we write, except maybe for write-then-read idioms.
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun #define SET_FX (AT91_UDP_TXPKTRDY)
118*4882a593Smuzhiyun #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \
119*4882a593Smuzhiyun | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* pull OUT packet data from the endpoint's fifo */
read_fifo(struct at91_ep * ep,struct at91_request * req)122*4882a593Smuzhiyun static int read_fifo (struct at91_ep *ep, struct at91_request *req)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
125*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
126*4882a593Smuzhiyun u32 csr;
127*4882a593Smuzhiyun u8 *buf;
128*4882a593Smuzhiyun unsigned int count, bufferspace, is_done;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun buf = req->req.buf + req->req.actual;
131*4882a593Smuzhiyun bufferspace = req->req.length - req->req.actual;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun * there might be nothing to read if ep_queue() calls us,
135*4882a593Smuzhiyun * or if we already emptied both pingpong buffers
136*4882a593Smuzhiyun */
137*4882a593Smuzhiyun rescan:
138*4882a593Smuzhiyun csr = __raw_readl(creg);
139*4882a593Smuzhiyun if ((csr & RX_DATA_READY) == 0)
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun count = (csr & AT91_UDP_RXBYTECNT) >> 16;
143*4882a593Smuzhiyun if (count > ep->ep.maxpacket)
144*4882a593Smuzhiyun count = ep->ep.maxpacket;
145*4882a593Smuzhiyun if (count > bufferspace) {
146*4882a593Smuzhiyun DBG("%s buffer overflow\n", ep->ep.name);
147*4882a593Smuzhiyun req->req.status = -EOVERFLOW;
148*4882a593Smuzhiyun count = bufferspace;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun __raw_readsb((unsigned long)dreg, buf, count);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* release and swap pingpong mem bank */
153*4882a593Smuzhiyun csr |= CLR_FX;
154*4882a593Smuzhiyun if (ep->is_pingpong) {
155*4882a593Smuzhiyun if (ep->fifo_bank == 0) {
156*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
157*4882a593Smuzhiyun ep->fifo_bank = 1;
158*4882a593Smuzhiyun } else {
159*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1);
160*4882a593Smuzhiyun ep->fifo_bank = 0;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun } else
163*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
164*4882a593Smuzhiyun __raw_writel(csr, creg);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun req->req.actual += count;
167*4882a593Smuzhiyun is_done = (count < ep->ep.maxpacket);
168*4882a593Smuzhiyun if (count == bufferspace)
169*4882a593Smuzhiyun is_done = 1;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count,
172*4882a593Smuzhiyun is_done ? " (done)" : "");
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /*
175*4882a593Smuzhiyun * avoid extra trips through IRQ logic for packets already in
176*4882a593Smuzhiyun * the fifo ... maybe preventing an extra (expensive) OUT-NAK
177*4882a593Smuzhiyun */
178*4882a593Smuzhiyun if (is_done)
179*4882a593Smuzhiyun done(ep, req, 0);
180*4882a593Smuzhiyun else if (ep->is_pingpong) {
181*4882a593Smuzhiyun /*
182*4882a593Smuzhiyun * One dummy read to delay the code because of a HW glitch:
183*4882a593Smuzhiyun * CSR returns bad RXCOUNT when read too soon after updating
184*4882a593Smuzhiyun * RX_DATA_BK flags.
185*4882a593Smuzhiyun */
186*4882a593Smuzhiyun csr = __raw_readl(creg);
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun bufferspace -= count;
189*4882a593Smuzhiyun buf += count;
190*4882a593Smuzhiyun goto rescan;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return is_done;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* load fifo for an IN packet */
write_fifo(struct at91_ep * ep,struct at91_request * req)197*4882a593Smuzhiyun static int write_fifo(struct at91_ep *ep, struct at91_request *req)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
200*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
201*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
202*4882a593Smuzhiyun unsigned total, count, is_last;
203*4882a593Smuzhiyun u8 *buf;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /*
206*4882a593Smuzhiyun * TODO: allow for writing two packets to the fifo ... that'll
207*4882a593Smuzhiyun * reduce the amount of IN-NAKing, but probably won't affect
208*4882a593Smuzhiyun * throughput much. (Unlike preventing OUT-NAKing!)
209*4882a593Smuzhiyun */
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /*
212*4882a593Smuzhiyun * If ep_queue() calls us, the queue is empty and possibly in
213*4882a593Smuzhiyun * odd states like TXCOMP not yet cleared (we do it, saving at
214*4882a593Smuzhiyun * least one IRQ) or the fifo not yet being free. Those aren't
215*4882a593Smuzhiyun * issues normally (IRQ handler fast path).
216*4882a593Smuzhiyun */
217*4882a593Smuzhiyun if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) {
218*4882a593Smuzhiyun if (csr & AT91_UDP_TXCOMP) {
219*4882a593Smuzhiyun csr |= CLR_FX;
220*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_TXCOMP);
221*4882a593Smuzhiyun __raw_writel(csr, creg);
222*4882a593Smuzhiyun csr = __raw_readl(creg);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun if (csr & AT91_UDP_TXPKTRDY)
225*4882a593Smuzhiyun return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun buf = req->req.buf + req->req.actual;
229*4882a593Smuzhiyun prefetch(buf);
230*4882a593Smuzhiyun total = req->req.length - req->req.actual;
231*4882a593Smuzhiyun if (ep->ep.maxpacket < total) {
232*4882a593Smuzhiyun count = ep->ep.maxpacket;
233*4882a593Smuzhiyun is_last = 0;
234*4882a593Smuzhiyun } else {
235*4882a593Smuzhiyun count = total;
236*4882a593Smuzhiyun is_last = (count < ep->ep.maxpacket) || !req->req.zero;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun * Write the packet, maybe it's a ZLP.
241*4882a593Smuzhiyun *
242*4882a593Smuzhiyun * NOTE: incrementing req->actual before we receive the ACK means
243*4882a593Smuzhiyun * gadget driver IN bytecounts can be wrong in fault cases. That's
244*4882a593Smuzhiyun * fixable with PIO drivers like this one (save "count" here, and
245*4882a593Smuzhiyun * do the increment later on TX irq), but not for most DMA hardware.
246*4882a593Smuzhiyun *
247*4882a593Smuzhiyun * So all gadget drivers must accept that potential error. Some
248*4882a593Smuzhiyun * hardware supports precise fifo status reporting, letting them
249*4882a593Smuzhiyun * recover when the actual bytecount matters (e.g. for USB Test
250*4882a593Smuzhiyun * and Measurement Class devices).
251*4882a593Smuzhiyun */
252*4882a593Smuzhiyun __raw_writesb((unsigned long)dreg, buf, count);
253*4882a593Smuzhiyun csr &= ~SET_FX;
254*4882a593Smuzhiyun csr |= CLR_FX | AT91_UDP_TXPKTRDY;
255*4882a593Smuzhiyun __raw_writel(csr, creg);
256*4882a593Smuzhiyun req->req.actual += count;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count,
259*4882a593Smuzhiyun is_last ? " (done)" : "");
260*4882a593Smuzhiyun if (is_last)
261*4882a593Smuzhiyun done(ep, req, 0);
262*4882a593Smuzhiyun return is_last;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
nuke(struct at91_ep * ep,int status)265*4882a593Smuzhiyun static void nuke(struct at91_ep *ep, int status)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct at91_request *req;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* terminate any request in the queue */
270*4882a593Smuzhiyun ep->stopped = 1;
271*4882a593Smuzhiyun if (list_empty(&ep->queue))
272*4882a593Smuzhiyun return;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun VDBG("%s %s\n", __func__, ep->ep.name);
275*4882a593Smuzhiyun while (!list_empty(&ep->queue)) {
276*4882a593Smuzhiyun req = list_entry(ep->queue.next, struct at91_request, queue);
277*4882a593Smuzhiyun done(ep, req, status);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
282*4882a593Smuzhiyun
at91_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)283*4882a593Smuzhiyun static int at91_ep_enable(struct usb_ep *_ep,
284*4882a593Smuzhiyun const struct usb_endpoint_descriptor *desc)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
287*4882a593Smuzhiyun struct at91_udc *udc;
288*4882a593Smuzhiyun u16 maxpacket;
289*4882a593Smuzhiyun u32 tmp;
290*4882a593Smuzhiyun unsigned long flags;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (!_ep || !ep
293*4882a593Smuzhiyun || !desc || _ep->name == ep0name
294*4882a593Smuzhiyun || desc->bDescriptorType != USB_DT_ENDPOINT
295*4882a593Smuzhiyun || (maxpacket = usb_endpoint_maxp(desc)) == 0
296*4882a593Smuzhiyun || maxpacket > ep->maxpacket) {
297*4882a593Smuzhiyun DBG("bad ep or descriptor\n");
298*4882a593Smuzhiyun return -EINVAL;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun udc = ep->udc;
302*4882a593Smuzhiyun if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
303*4882a593Smuzhiyun DBG("bogus device state\n");
304*4882a593Smuzhiyun return -ESHUTDOWN;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun tmp = usb_endpoint_type(desc);
308*4882a593Smuzhiyun switch (tmp) {
309*4882a593Smuzhiyun case USB_ENDPOINT_XFER_CONTROL:
310*4882a593Smuzhiyun DBG("only one control endpoint\n");
311*4882a593Smuzhiyun return -EINVAL;
312*4882a593Smuzhiyun case USB_ENDPOINT_XFER_INT:
313*4882a593Smuzhiyun if (maxpacket > 64)
314*4882a593Smuzhiyun goto bogus_max;
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun case USB_ENDPOINT_XFER_BULK:
317*4882a593Smuzhiyun switch (maxpacket) {
318*4882a593Smuzhiyun case 8:
319*4882a593Smuzhiyun case 16:
320*4882a593Smuzhiyun case 32:
321*4882a593Smuzhiyun case 64:
322*4882a593Smuzhiyun goto ok;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun bogus_max:
325*4882a593Smuzhiyun DBG("bogus maxpacket %d\n", maxpacket);
326*4882a593Smuzhiyun return -EINVAL;
327*4882a593Smuzhiyun case USB_ENDPOINT_XFER_ISOC:
328*4882a593Smuzhiyun if (!ep->is_pingpong) {
329*4882a593Smuzhiyun DBG("iso requires double buffering\n");
330*4882a593Smuzhiyun return -EINVAL;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun break;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun ok:
336*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* initialize endpoint to match this descriptor */
339*4882a593Smuzhiyun ep->is_in = usb_endpoint_dir_in(desc);
340*4882a593Smuzhiyun ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
341*4882a593Smuzhiyun ep->stopped = 0;
342*4882a593Smuzhiyun if (ep->is_in)
343*4882a593Smuzhiyun tmp |= 0x04;
344*4882a593Smuzhiyun tmp <<= 8;
345*4882a593Smuzhiyun tmp |= AT91_UDP_EPEDS;
346*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun ep->ep.maxpacket = maxpacket;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun /*
351*4882a593Smuzhiyun * reset/init endpoint fifo. NOTE: leaves fifo_bank alone,
352*4882a593Smuzhiyun * since endpoint resets don't reset hw pingpong state.
353*4882a593Smuzhiyun */
354*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
355*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
358*4882a593Smuzhiyun return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
at91_ep_disable(struct usb_ep * _ep)361*4882a593Smuzhiyun static int at91_ep_disable (struct usb_ep * _ep)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
364*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
365*4882a593Smuzhiyun unsigned long flags;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun if (ep == &ep->udc->ep[0])
368*4882a593Smuzhiyun return -EINVAL;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun /* restore the endpoint's pristine config */
375*4882a593Smuzhiyun ep->ep.desc = NULL;
376*4882a593Smuzhiyun ep->ep.maxpacket = ep->maxpacket;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /* reset fifos and endpoint */
379*4882a593Smuzhiyun if (ep->udc->clocked) {
380*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
381*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
382*4882a593Smuzhiyun __raw_writel(0, ep->creg);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
386*4882a593Smuzhiyun return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /*
390*4882a593Smuzhiyun * this is a PIO-only driver, so there's nothing
391*4882a593Smuzhiyun * interesting for request or buffer allocation.
392*4882a593Smuzhiyun */
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static struct usb_request *
at91_ep_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)395*4882a593Smuzhiyun at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun struct at91_request *req;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun req = kzalloc(sizeof (struct at91_request), gfp_flags);
400*4882a593Smuzhiyun if (!req)
401*4882a593Smuzhiyun return NULL;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun INIT_LIST_HEAD(&req->queue);
404*4882a593Smuzhiyun return &req->req;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
at91_ep_free_request(struct usb_ep * _ep,struct usb_request * _req)407*4882a593Smuzhiyun static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun struct at91_request *req;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun req = container_of(_req, struct at91_request, req);
412*4882a593Smuzhiyun BUG_ON(!list_empty(&req->queue));
413*4882a593Smuzhiyun kfree(req);
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
at91_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)416*4882a593Smuzhiyun static int at91_ep_queue(struct usb_ep *_ep,
417*4882a593Smuzhiyun struct usb_request *_req, gfp_t gfp_flags)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct at91_request *req;
420*4882a593Smuzhiyun struct at91_ep *ep;
421*4882a593Smuzhiyun struct at91_udc *udc;
422*4882a593Smuzhiyun int status;
423*4882a593Smuzhiyun unsigned long flags;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun req = container_of(_req, struct at91_request, req);
426*4882a593Smuzhiyun ep = container_of(_ep, struct at91_ep, ep);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun if (!_req || !_req->complete
429*4882a593Smuzhiyun || !_req->buf || !list_empty(&req->queue)) {
430*4882a593Smuzhiyun DBG("invalid request\n");
431*4882a593Smuzhiyun return -EINVAL;
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) {
435*4882a593Smuzhiyun DBG("invalid ep\n");
436*4882a593Smuzhiyun return -EINVAL;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun udc = ep->udc;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
442*4882a593Smuzhiyun DBG("invalid device\n");
443*4882a593Smuzhiyun return -EINVAL;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun _req->status = -EINPROGRESS;
447*4882a593Smuzhiyun _req->actual = 0;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* try to kickstart any empty and idle queue */
452*4882a593Smuzhiyun if (list_empty(&ep->queue) && !ep->stopped) {
453*4882a593Smuzhiyun int is_ep0;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun /*
456*4882a593Smuzhiyun * If this control request has a non-empty DATA stage, this
457*4882a593Smuzhiyun * will start that stage. It works just like a non-control
458*4882a593Smuzhiyun * request (until the status stage starts, maybe early).
459*4882a593Smuzhiyun *
460*4882a593Smuzhiyun * If the data stage is empty, then this starts a successful
461*4882a593Smuzhiyun * IN/STATUS stage. (Unsuccessful ones use set_halt.)
462*4882a593Smuzhiyun */
463*4882a593Smuzhiyun is_ep0 = (ep->ep.name == ep0name);
464*4882a593Smuzhiyun if (is_ep0) {
465*4882a593Smuzhiyun u32 tmp;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun if (!udc->req_pending) {
468*4882a593Smuzhiyun status = -EINVAL;
469*4882a593Smuzhiyun goto done;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun /*
473*4882a593Smuzhiyun * defer changing CONFG until after the gadget driver
474*4882a593Smuzhiyun * reconfigures the endpoints.
475*4882a593Smuzhiyun */
476*4882a593Smuzhiyun if (udc->wait_for_config_ack) {
477*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
478*4882a593Smuzhiyun tmp ^= AT91_UDP_CONFG;
479*4882a593Smuzhiyun VDBG("toggle config\n");
480*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun if (req->req.length == 0) {
483*4882a593Smuzhiyun ep0_in_status:
484*4882a593Smuzhiyun PACKET("ep0 in/status\n");
485*4882a593Smuzhiyun status = 0;
486*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
487*4882a593Smuzhiyun tmp &= ~SET_FX;
488*4882a593Smuzhiyun tmp |= CLR_FX | AT91_UDP_TXPKTRDY;
489*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
490*4882a593Smuzhiyun udc->req_pending = 0;
491*4882a593Smuzhiyun goto done;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun if (ep->is_in)
496*4882a593Smuzhiyun status = write_fifo(ep, req);
497*4882a593Smuzhiyun else {
498*4882a593Smuzhiyun status = read_fifo(ep, req);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun /* IN/STATUS stage is otherwise triggered by irq */
501*4882a593Smuzhiyun if (status && is_ep0)
502*4882a593Smuzhiyun goto ep0_in_status;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun } else
505*4882a593Smuzhiyun status = 0;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun if (req && !status) {
508*4882a593Smuzhiyun list_add_tail (&req->queue, &ep->queue);
509*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, ep->int_mask);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun done:
512*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
513*4882a593Smuzhiyun return (status < 0) ? status : 0;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
at91_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)516*4882a593Smuzhiyun static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun struct at91_ep *ep;
519*4882a593Smuzhiyun struct at91_request *req;
520*4882a593Smuzhiyun unsigned long flags;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun ep = container_of(_ep, struct at91_ep, ep);
523*4882a593Smuzhiyun if (!_ep || ep->ep.name == ep0name)
524*4882a593Smuzhiyun return -EINVAL;
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun /* make sure it's actually queued on this endpoint */
529*4882a593Smuzhiyun list_for_each_entry (req, &ep->queue, queue) {
530*4882a593Smuzhiyun if (&req->req == _req)
531*4882a593Smuzhiyun break;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun if (&req->req != _req) {
534*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
535*4882a593Smuzhiyun return -EINVAL;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun done(ep, req, -ECONNRESET);
539*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
540*4882a593Smuzhiyun return 0;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun
at91_ep_set_halt(struct usb_ep * _ep,int value)543*4882a593Smuzhiyun static int at91_ep_set_halt(struct usb_ep *_ep, int value)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun struct at91_ep *ep = container_of(_ep, struct at91_ep, ep);
546*4882a593Smuzhiyun struct at91_udc *udc = ep->udc;
547*4882a593Smuzhiyun u32 __iomem *creg;
548*4882a593Smuzhiyun u32 csr;
549*4882a593Smuzhiyun unsigned long flags;
550*4882a593Smuzhiyun int status = 0;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun if (!_ep || ep->is_iso || !ep->udc->clocked)
553*4882a593Smuzhiyun return -EINVAL;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun creg = ep->creg;
556*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun csr = __raw_readl(creg);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /*
561*4882a593Smuzhiyun * fail with still-busy IN endpoints, ensuring correct sequencing
562*4882a593Smuzhiyun * of data tx then stall. note that the fifo rx bytecount isn't
563*4882a593Smuzhiyun * completely accurate as a tx bytecount.
564*4882a593Smuzhiyun */
565*4882a593Smuzhiyun if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0))
566*4882a593Smuzhiyun status = -EAGAIN;
567*4882a593Smuzhiyun else {
568*4882a593Smuzhiyun csr |= CLR_FX;
569*4882a593Smuzhiyun csr &= ~SET_FX;
570*4882a593Smuzhiyun if (value) {
571*4882a593Smuzhiyun csr |= AT91_UDP_FORCESTALL;
572*4882a593Smuzhiyun VDBG("halt %s\n", ep->ep.name);
573*4882a593Smuzhiyun } else {
574*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
575*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
576*4882a593Smuzhiyun csr &= ~AT91_UDP_FORCESTALL;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun __raw_writel(csr, creg);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
582*4882a593Smuzhiyun return status;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun static const struct usb_ep_ops at91_ep_ops = {
586*4882a593Smuzhiyun .enable = at91_ep_enable,
587*4882a593Smuzhiyun .disable = at91_ep_disable,
588*4882a593Smuzhiyun .alloc_request = at91_ep_alloc_request,
589*4882a593Smuzhiyun .free_request = at91_ep_free_request,
590*4882a593Smuzhiyun .queue = at91_ep_queue,
591*4882a593Smuzhiyun .dequeue = at91_ep_dequeue,
592*4882a593Smuzhiyun .set_halt = at91_ep_set_halt,
593*4882a593Smuzhiyun /* there's only imprecise fifo status reporting */
594*4882a593Smuzhiyun };
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
597*4882a593Smuzhiyun
at91_get_frame(struct usb_gadget * gadget)598*4882a593Smuzhiyun static int at91_get_frame(struct usb_gadget *gadget)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun if (!to_udc(gadget)->clocked)
603*4882a593Smuzhiyun return -EINVAL;
604*4882a593Smuzhiyun return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
at91_wakeup(struct usb_gadget * gadget)607*4882a593Smuzhiyun static int at91_wakeup(struct usb_gadget *gadget)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
610*4882a593Smuzhiyun u32 glbstate;
611*4882a593Smuzhiyun int status = -EINVAL;
612*4882a593Smuzhiyun unsigned long flags;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun DBG("%s\n", __func__ );
615*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun if (!udc->clocked || !udc->suspended)
618*4882a593Smuzhiyun goto done;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun /* NOTE: some "early versions" handle ESR differently ... */
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT);
623*4882a593Smuzhiyun if (!(glbstate & AT91_UDP_ESR))
624*4882a593Smuzhiyun goto done;
625*4882a593Smuzhiyun glbstate |= AT91_UDP_ESR;
626*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate);
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun done:
629*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
630*4882a593Smuzhiyun return status;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun /* reinit == restore initial software state */
udc_reinit(struct at91_udc * udc)634*4882a593Smuzhiyun static void udc_reinit(struct at91_udc *udc)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun u32 i;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun INIT_LIST_HEAD(&udc->gadget.ep_list);
639*4882a593Smuzhiyun INIT_LIST_HEAD(&udc->gadget.ep0->ep_list);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
642*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun if (i != 0)
645*4882a593Smuzhiyun list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
646*4882a593Smuzhiyun ep->ep.desc = NULL;
647*4882a593Smuzhiyun ep->stopped = 0;
648*4882a593Smuzhiyun ep->fifo_bank = 0;
649*4882a593Smuzhiyun usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket);
650*4882a593Smuzhiyun ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i);
651*4882a593Smuzhiyun /* initialize one queue per endpoint */
652*4882a593Smuzhiyun INIT_LIST_HEAD(&ep->queue);
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
reset_gadget(struct at91_udc * udc)656*4882a593Smuzhiyun static void reset_gadget(struct at91_udc *udc)
657*4882a593Smuzhiyun {
658*4882a593Smuzhiyun struct usb_gadget_driver *driver = udc->driver;
659*4882a593Smuzhiyun int i;
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun if (udc->gadget.speed == USB_SPEED_UNKNOWN)
662*4882a593Smuzhiyun driver = NULL;
663*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
664*4882a593Smuzhiyun udc->suspended = 0;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
667*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun ep->stopped = 1;
670*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun if (driver) {
673*4882a593Smuzhiyun spin_unlock(&udc->lock);
674*4882a593Smuzhiyun udc->driver->disconnect(&udc->gadget);
675*4882a593Smuzhiyun spin_lock(&udc->lock);
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun udc_reinit(udc);
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun
stop_activity(struct at91_udc * udc)681*4882a593Smuzhiyun static void stop_activity(struct at91_udc *udc)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun struct usb_gadget_driver *driver = udc->driver;
684*4882a593Smuzhiyun int i;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun if (udc->gadget.speed == USB_SPEED_UNKNOWN)
687*4882a593Smuzhiyun driver = NULL;
688*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
689*4882a593Smuzhiyun udc->suspended = 0;
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
692*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[i];
693*4882a593Smuzhiyun ep->stopped = 1;
694*4882a593Smuzhiyun nuke(ep, -ESHUTDOWN);
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun if (driver) {
697*4882a593Smuzhiyun spin_unlock(&udc->lock);
698*4882a593Smuzhiyun driver->disconnect(&udc->gadget);
699*4882a593Smuzhiyun spin_lock(&udc->lock);
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun udc_reinit(udc);
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun
clk_on(struct at91_udc * udc)705*4882a593Smuzhiyun static void clk_on(struct at91_udc *udc)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun if (udc->clocked)
708*4882a593Smuzhiyun return;
709*4882a593Smuzhiyun udc->clocked = 1;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
clk_off(struct at91_udc * udc)712*4882a593Smuzhiyun static void clk_off(struct at91_udc *udc)
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun if (!udc->clocked)
715*4882a593Smuzhiyun return;
716*4882a593Smuzhiyun udc->clocked = 0;
717*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_UNKNOWN;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun /*
721*4882a593Smuzhiyun * activate/deactivate link with host; minimize power usage for
722*4882a593Smuzhiyun * inactive links by cutting clocks and transceiver power.
723*4882a593Smuzhiyun */
pullup(struct at91_udc * udc,int is_on)724*4882a593Smuzhiyun static void pullup(struct at91_udc *udc, int is_on)
725*4882a593Smuzhiyun {
726*4882a593Smuzhiyun if (!udc->enabled || !udc->vbus)
727*4882a593Smuzhiyun is_on = 0;
728*4882a593Smuzhiyun DBG("%sactive\n", is_on ? "" : "in");
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun if (is_on) {
731*4882a593Smuzhiyun clk_on(udc);
732*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
733*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, 0);
734*4882a593Smuzhiyun } else {
735*4882a593Smuzhiyun stop_activity(udc);
736*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
737*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
738*4882a593Smuzhiyun clk_off(udc);
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun if (udc->caps && udc->caps->pullup)
742*4882a593Smuzhiyun udc->caps->pullup(udc, is_on);
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun /* vbus is here! turn everything on that's ready */
at91_vbus_session(struct usb_gadget * gadget,int is_active)746*4882a593Smuzhiyun static int at91_vbus_session(struct usb_gadget *gadget, int is_active)
747*4882a593Smuzhiyun {
748*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
749*4882a593Smuzhiyun unsigned long flags;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun /* VDBG("vbus %s\n", is_active ? "on" : "off"); */
752*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
753*4882a593Smuzhiyun udc->vbus = (is_active != 0);
754*4882a593Smuzhiyun if (udc->driver)
755*4882a593Smuzhiyun pullup(udc, is_active);
756*4882a593Smuzhiyun else
757*4882a593Smuzhiyun pullup(udc, 0);
758*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
759*4882a593Smuzhiyun return 0;
760*4882a593Smuzhiyun }
761*4882a593Smuzhiyun
at91_pullup(struct usb_gadget * gadget,int is_on)762*4882a593Smuzhiyun static int at91_pullup(struct usb_gadget *gadget, int is_on)
763*4882a593Smuzhiyun {
764*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
765*4882a593Smuzhiyun unsigned long flags;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
768*4882a593Smuzhiyun udc->enabled = is_on = !!is_on;
769*4882a593Smuzhiyun pullup(udc, is_on);
770*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
771*4882a593Smuzhiyun return 0;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun
at91_set_selfpowered(struct usb_gadget * gadget,int is_on)774*4882a593Smuzhiyun static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun struct at91_udc *udc = to_udc(gadget);
777*4882a593Smuzhiyun unsigned long flags;
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
780*4882a593Smuzhiyun udc->selfpowered = (is_on != 0);
781*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
782*4882a593Smuzhiyun return 0;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun static int at91_start(struct usb_gadget *gadget,
786*4882a593Smuzhiyun struct usb_gadget_driver *driver);
787*4882a593Smuzhiyun static int at91_stop(struct usb_gadget *gadget);
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun static const struct usb_gadget_ops at91_udc_ops = {
790*4882a593Smuzhiyun .get_frame = at91_get_frame,
791*4882a593Smuzhiyun .wakeup = at91_wakeup,
792*4882a593Smuzhiyun .set_selfpowered = at91_set_selfpowered,
793*4882a593Smuzhiyun .vbus_session = at91_vbus_session,
794*4882a593Smuzhiyun .pullup = at91_pullup,
795*4882a593Smuzhiyun .udc_start = at91_start,
796*4882a593Smuzhiyun .udc_stop = at91_stop,
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun /*
799*4882a593Smuzhiyun * VBUS-powered devices may also also want to support bigger
800*4882a593Smuzhiyun * power budgets after an appropriate SET_CONFIGURATION.
801*4882a593Smuzhiyun */
802*4882a593Smuzhiyun /* .vbus_power = at91_vbus_power, */
803*4882a593Smuzhiyun };
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
806*4882a593Smuzhiyun
handle_ep(struct at91_ep * ep)807*4882a593Smuzhiyun static int handle_ep(struct at91_ep *ep)
808*4882a593Smuzhiyun {
809*4882a593Smuzhiyun struct at91_request *req;
810*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
811*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun if (!list_empty(&ep->queue))
814*4882a593Smuzhiyun req = list_entry(ep->queue.next,
815*4882a593Smuzhiyun struct at91_request, queue);
816*4882a593Smuzhiyun else
817*4882a593Smuzhiyun req = NULL;
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun if (ep->is_in) {
820*4882a593Smuzhiyun if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) {
821*4882a593Smuzhiyun csr |= CLR_FX;
822*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP);
823*4882a593Smuzhiyun __raw_writel(csr, creg);
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun if (req)
826*4882a593Smuzhiyun return write_fifo(ep, req);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun } else {
829*4882a593Smuzhiyun if (csr & AT91_UDP_STALLSENT) {
830*4882a593Smuzhiyun /* STALLSENT bit == ISOERR */
831*4882a593Smuzhiyun if (ep->is_iso && req)
832*4882a593Smuzhiyun req->req.status = -EILSEQ;
833*4882a593Smuzhiyun csr |= CLR_FX;
834*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT);
835*4882a593Smuzhiyun __raw_writel(csr, creg);
836*4882a593Smuzhiyun csr = __raw_readl(creg);
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun if (req && (csr & RX_DATA_READY))
839*4882a593Smuzhiyun return read_fifo(ep, req);
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun return 0;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun union setup {
845*4882a593Smuzhiyun u8 raw[8];
846*4882a593Smuzhiyun struct usb_ctrlrequest r;
847*4882a593Smuzhiyun };
848*4882a593Smuzhiyun
handle_setup(struct at91_udc * udc,struct at91_ep * ep,u32 csr)849*4882a593Smuzhiyun static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun u32 __iomem *creg = ep->creg;
852*4882a593Smuzhiyun u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0));
853*4882a593Smuzhiyun unsigned rxcount, i = 0;
854*4882a593Smuzhiyun u32 tmp;
855*4882a593Smuzhiyun union setup pkt;
856*4882a593Smuzhiyun int status = 0;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun /* read and ack SETUP; hard-fail for bogus packets */
859*4882a593Smuzhiyun rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16;
860*4882a593Smuzhiyun if (likely(rxcount == 8)) {
861*4882a593Smuzhiyun while (rxcount--)
862*4882a593Smuzhiyun pkt.raw[i++] = __raw_readb(dreg);
863*4882a593Smuzhiyun if (pkt.r.bRequestType & USB_DIR_IN) {
864*4882a593Smuzhiyun csr |= AT91_UDP_DIR;
865*4882a593Smuzhiyun ep->is_in = 1;
866*4882a593Smuzhiyun } else {
867*4882a593Smuzhiyun csr &= ~AT91_UDP_DIR;
868*4882a593Smuzhiyun ep->is_in = 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun } else {
871*4882a593Smuzhiyun /* REVISIT this happens sometimes under load; why?? */
872*4882a593Smuzhiyun ERR("SETUP len %d, csr %08x\n", rxcount, csr);
873*4882a593Smuzhiyun status = -EINVAL;
874*4882a593Smuzhiyun }
875*4882a593Smuzhiyun csr |= CLR_FX;
876*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RXSETUP);
877*4882a593Smuzhiyun __raw_writel(csr, creg);
878*4882a593Smuzhiyun udc->wait_for_addr_ack = 0;
879*4882a593Smuzhiyun udc->wait_for_config_ack = 0;
880*4882a593Smuzhiyun ep->stopped = 0;
881*4882a593Smuzhiyun if (unlikely(status != 0))
882*4882a593Smuzhiyun goto stall;
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun #define w_index le16_to_cpu(pkt.r.wIndex)
885*4882a593Smuzhiyun #define w_value le16_to_cpu(pkt.r.wValue)
886*4882a593Smuzhiyun #define w_length le16_to_cpu(pkt.r.wLength)
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
889*4882a593Smuzhiyun pkt.r.bRequestType, pkt.r.bRequest,
890*4882a593Smuzhiyun w_value, w_index, w_length);
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun /*
893*4882a593Smuzhiyun * A few standard requests get handled here, ones that touch
894*4882a593Smuzhiyun * hardware ... notably for device and endpoint features.
895*4882a593Smuzhiyun */
896*4882a593Smuzhiyun udc->req_pending = 1;
897*4882a593Smuzhiyun csr = __raw_readl(creg);
898*4882a593Smuzhiyun csr |= CLR_FX;
899*4882a593Smuzhiyun csr &= ~SET_FX;
900*4882a593Smuzhiyun switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) {
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
903*4882a593Smuzhiyun | USB_REQ_SET_ADDRESS:
904*4882a593Smuzhiyun __raw_writel(csr | AT91_UDP_TXPKTRDY, creg);
905*4882a593Smuzhiyun udc->addr = w_value;
906*4882a593Smuzhiyun udc->wait_for_addr_ack = 1;
907*4882a593Smuzhiyun udc->req_pending = 0;
908*4882a593Smuzhiyun /* FADDR is set later, when we ack host STATUS */
909*4882a593Smuzhiyun return;
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
912*4882a593Smuzhiyun | USB_REQ_SET_CONFIGURATION:
913*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG;
914*4882a593Smuzhiyun if (pkt.r.wValue)
915*4882a593Smuzhiyun udc->wait_for_config_ack = (tmp == 0);
916*4882a593Smuzhiyun else
917*4882a593Smuzhiyun udc->wait_for_config_ack = (tmp != 0);
918*4882a593Smuzhiyun if (udc->wait_for_config_ack)
919*4882a593Smuzhiyun VDBG("wait for config\n");
920*4882a593Smuzhiyun /* CONFG is toggled later, if gadget driver succeeds */
921*4882a593Smuzhiyun break;
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun /*
924*4882a593Smuzhiyun * Hosts may set or clear remote wakeup status, and
925*4882a593Smuzhiyun * devices may report they're VBUS powered.
926*4882a593Smuzhiyun */
927*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
928*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
929*4882a593Smuzhiyun tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED);
930*4882a593Smuzhiyun if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR)
931*4882a593Smuzhiyun tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP);
932*4882a593Smuzhiyun PACKET("get device status\n");
933*4882a593Smuzhiyun __raw_writeb(tmp, dreg);
934*4882a593Smuzhiyun __raw_writeb(0, dreg);
935*4882a593Smuzhiyun goto write_in;
936*4882a593Smuzhiyun /* then STATUS starts later, automatically */
937*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
938*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
939*4882a593Smuzhiyun if (w_value != USB_DEVICE_REMOTE_WAKEUP)
940*4882a593Smuzhiyun goto stall;
941*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
942*4882a593Smuzhiyun tmp |= AT91_UDP_ESR;
943*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
944*4882a593Smuzhiyun goto succeed;
945*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8)
946*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
947*4882a593Smuzhiyun if (w_value != USB_DEVICE_REMOTE_WAKEUP)
948*4882a593Smuzhiyun goto stall;
949*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
950*4882a593Smuzhiyun tmp &= ~AT91_UDP_ESR;
951*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
952*4882a593Smuzhiyun goto succeed;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun /*
955*4882a593Smuzhiyun * Interfaces have no feature settings; this is pretty useless.
956*4882a593Smuzhiyun * we won't even insist the interface exists...
957*4882a593Smuzhiyun */
958*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
959*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
960*4882a593Smuzhiyun PACKET("get interface status\n");
961*4882a593Smuzhiyun __raw_writeb(0, dreg);
962*4882a593Smuzhiyun __raw_writeb(0, dreg);
963*4882a593Smuzhiyun goto write_in;
964*4882a593Smuzhiyun /* then STATUS starts later, automatically */
965*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
966*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
967*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8)
968*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
969*4882a593Smuzhiyun goto stall;
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun /*
972*4882a593Smuzhiyun * Hosts may clear bulk/intr endpoint halt after the gadget
973*4882a593Smuzhiyun * driver sets it (not widely used); or set it (for testing)
974*4882a593Smuzhiyun */
975*4882a593Smuzhiyun case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
976*4882a593Smuzhiyun | USB_REQ_GET_STATUS:
977*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
978*4882a593Smuzhiyun ep = &udc->ep[tmp];
979*4882a593Smuzhiyun if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc))
980*4882a593Smuzhiyun goto stall;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun if (tmp) {
983*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
984*4882a593Smuzhiyun if (!ep->is_in)
985*4882a593Smuzhiyun goto stall;
986*4882a593Smuzhiyun } else if (ep->is_in)
987*4882a593Smuzhiyun goto stall;
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun PACKET("get %s status\n", ep->ep.name);
990*4882a593Smuzhiyun if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL)
991*4882a593Smuzhiyun tmp = (1 << USB_ENDPOINT_HALT);
992*4882a593Smuzhiyun else
993*4882a593Smuzhiyun tmp = 0;
994*4882a593Smuzhiyun __raw_writeb(tmp, dreg);
995*4882a593Smuzhiyun __raw_writeb(0, dreg);
996*4882a593Smuzhiyun goto write_in;
997*4882a593Smuzhiyun /* then STATUS starts later, automatically */
998*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
999*4882a593Smuzhiyun | USB_REQ_SET_FEATURE:
1000*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1001*4882a593Smuzhiyun ep = &udc->ep[tmp];
1002*4882a593Smuzhiyun if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
1003*4882a593Smuzhiyun goto stall;
1004*4882a593Smuzhiyun if (!ep->ep.desc || ep->is_iso)
1005*4882a593Smuzhiyun goto stall;
1006*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
1007*4882a593Smuzhiyun if (!ep->is_in)
1008*4882a593Smuzhiyun goto stall;
1009*4882a593Smuzhiyun } else if (ep->is_in)
1010*4882a593Smuzhiyun goto stall;
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
1013*4882a593Smuzhiyun tmp &= ~SET_FX;
1014*4882a593Smuzhiyun tmp |= CLR_FX | AT91_UDP_FORCESTALL;
1015*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
1016*4882a593Smuzhiyun goto succeed;
1017*4882a593Smuzhiyun case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8)
1018*4882a593Smuzhiyun | USB_REQ_CLEAR_FEATURE:
1019*4882a593Smuzhiyun tmp = w_index & USB_ENDPOINT_NUMBER_MASK;
1020*4882a593Smuzhiyun ep = &udc->ep[tmp];
1021*4882a593Smuzhiyun if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS)
1022*4882a593Smuzhiyun goto stall;
1023*4882a593Smuzhiyun if (tmp == 0)
1024*4882a593Smuzhiyun goto succeed;
1025*4882a593Smuzhiyun if (!ep->ep.desc || ep->is_iso)
1026*4882a593Smuzhiyun goto stall;
1027*4882a593Smuzhiyun if ((w_index & USB_DIR_IN)) {
1028*4882a593Smuzhiyun if (!ep->is_in)
1029*4882a593Smuzhiyun goto stall;
1030*4882a593Smuzhiyun } else if (ep->is_in)
1031*4882a593Smuzhiyun goto stall;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
1034*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_RST_EP, 0);
1035*4882a593Smuzhiyun tmp = __raw_readl(ep->creg);
1036*4882a593Smuzhiyun tmp |= CLR_FX;
1037*4882a593Smuzhiyun tmp &= ~(SET_FX | AT91_UDP_FORCESTALL);
1038*4882a593Smuzhiyun __raw_writel(tmp, ep->creg);
1039*4882a593Smuzhiyun if (!list_empty(&ep->queue))
1040*4882a593Smuzhiyun handle_ep(ep);
1041*4882a593Smuzhiyun goto succeed;
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun #undef w_value
1045*4882a593Smuzhiyun #undef w_index
1046*4882a593Smuzhiyun #undef w_length
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun /* pass request up to the gadget driver */
1049*4882a593Smuzhiyun if (udc->driver) {
1050*4882a593Smuzhiyun spin_unlock(&udc->lock);
1051*4882a593Smuzhiyun status = udc->driver->setup(&udc->gadget, &pkt.r);
1052*4882a593Smuzhiyun spin_lock(&udc->lock);
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun else
1055*4882a593Smuzhiyun status = -ENODEV;
1056*4882a593Smuzhiyun if (status < 0) {
1057*4882a593Smuzhiyun stall:
1058*4882a593Smuzhiyun VDBG("req %02x.%02x protocol STALL; stat %d\n",
1059*4882a593Smuzhiyun pkt.r.bRequestType, pkt.r.bRequest, status);
1060*4882a593Smuzhiyun csr |= AT91_UDP_FORCESTALL;
1061*4882a593Smuzhiyun __raw_writel(csr, creg);
1062*4882a593Smuzhiyun udc->req_pending = 0;
1063*4882a593Smuzhiyun }
1064*4882a593Smuzhiyun return;
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun succeed:
1067*4882a593Smuzhiyun /* immediate successful (IN) STATUS after zero length DATA */
1068*4882a593Smuzhiyun PACKET("ep0 in/status\n");
1069*4882a593Smuzhiyun write_in:
1070*4882a593Smuzhiyun csr |= AT91_UDP_TXPKTRDY;
1071*4882a593Smuzhiyun __raw_writel(csr, creg);
1072*4882a593Smuzhiyun udc->req_pending = 0;
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun
handle_ep0(struct at91_udc * udc)1075*4882a593Smuzhiyun static void handle_ep0(struct at91_udc *udc)
1076*4882a593Smuzhiyun {
1077*4882a593Smuzhiyun struct at91_ep *ep0 = &udc->ep[0];
1078*4882a593Smuzhiyun u32 __iomem *creg = ep0->creg;
1079*4882a593Smuzhiyun u32 csr = __raw_readl(creg);
1080*4882a593Smuzhiyun struct at91_request *req;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun if (unlikely(csr & AT91_UDP_STALLSENT)) {
1083*4882a593Smuzhiyun nuke(ep0, -EPROTO);
1084*4882a593Smuzhiyun udc->req_pending = 0;
1085*4882a593Smuzhiyun csr |= CLR_FX;
1086*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL);
1087*4882a593Smuzhiyun __raw_writel(csr, creg);
1088*4882a593Smuzhiyun VDBG("ep0 stalled\n");
1089*4882a593Smuzhiyun csr = __raw_readl(creg);
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun if (csr & AT91_UDP_RXSETUP) {
1092*4882a593Smuzhiyun nuke(ep0, 0);
1093*4882a593Smuzhiyun udc->req_pending = 0;
1094*4882a593Smuzhiyun handle_setup(udc, ep0, csr);
1095*4882a593Smuzhiyun return;
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun if (list_empty(&ep0->queue))
1099*4882a593Smuzhiyun req = NULL;
1100*4882a593Smuzhiyun else
1101*4882a593Smuzhiyun req = list_entry(ep0->queue.next, struct at91_request, queue);
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /* host ACKed an IN packet that we sent */
1104*4882a593Smuzhiyun if (csr & AT91_UDP_TXCOMP) {
1105*4882a593Smuzhiyun csr |= CLR_FX;
1106*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_TXCOMP);
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun /* write more IN DATA? */
1109*4882a593Smuzhiyun if (req && ep0->is_in) {
1110*4882a593Smuzhiyun if (handle_ep(ep0))
1111*4882a593Smuzhiyun udc->req_pending = 0;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun /*
1114*4882a593Smuzhiyun * Ack after:
1115*4882a593Smuzhiyun * - last IN DATA packet (including GET_STATUS)
1116*4882a593Smuzhiyun * - IN/STATUS for OUT DATA
1117*4882a593Smuzhiyun * - IN/STATUS for any zero-length DATA stage
1118*4882a593Smuzhiyun * except for the IN DATA case, the host should send
1119*4882a593Smuzhiyun * an OUT status later, which we'll ack.
1120*4882a593Smuzhiyun */
1121*4882a593Smuzhiyun } else {
1122*4882a593Smuzhiyun udc->req_pending = 0;
1123*4882a593Smuzhiyun __raw_writel(csr, creg);
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun /*
1126*4882a593Smuzhiyun * SET_ADDRESS takes effect only after the STATUS
1127*4882a593Smuzhiyun * (to the original address) gets acked.
1128*4882a593Smuzhiyun */
1129*4882a593Smuzhiyun if (udc->wait_for_addr_ack) {
1130*4882a593Smuzhiyun u32 tmp;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_FADDR,
1133*4882a593Smuzhiyun AT91_UDP_FEN | udc->addr);
1134*4882a593Smuzhiyun tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT);
1135*4882a593Smuzhiyun tmp &= ~AT91_UDP_FADDEN;
1136*4882a593Smuzhiyun if (udc->addr)
1137*4882a593Smuzhiyun tmp |= AT91_UDP_FADDEN;
1138*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp);
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun udc->wait_for_addr_ack = 0;
1141*4882a593Smuzhiyun VDBG("address %d\n", udc->addr);
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun /* OUT packet arrived ... */
1147*4882a593Smuzhiyun else if (csr & AT91_UDP_RX_DATA_BK0) {
1148*4882a593Smuzhiyun csr |= CLR_FX;
1149*4882a593Smuzhiyun csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0);
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun /* OUT DATA stage */
1152*4882a593Smuzhiyun if (!ep0->is_in) {
1153*4882a593Smuzhiyun if (req) {
1154*4882a593Smuzhiyun if (handle_ep(ep0)) {
1155*4882a593Smuzhiyun /* send IN/STATUS */
1156*4882a593Smuzhiyun PACKET("ep0 in/status\n");
1157*4882a593Smuzhiyun csr = __raw_readl(creg);
1158*4882a593Smuzhiyun csr &= ~SET_FX;
1159*4882a593Smuzhiyun csr |= CLR_FX | AT91_UDP_TXPKTRDY;
1160*4882a593Smuzhiyun __raw_writel(csr, creg);
1161*4882a593Smuzhiyun udc->req_pending = 0;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun } else if (udc->req_pending) {
1164*4882a593Smuzhiyun /*
1165*4882a593Smuzhiyun * AT91 hardware has a hard time with this
1166*4882a593Smuzhiyun * "deferred response" mode for control-OUT
1167*4882a593Smuzhiyun * transfers. (For control-IN it's fine.)
1168*4882a593Smuzhiyun *
1169*4882a593Smuzhiyun * The normal solution leaves OUT data in the
1170*4882a593Smuzhiyun * fifo until the gadget driver is ready.
1171*4882a593Smuzhiyun * We couldn't do that here without disabling
1172*4882a593Smuzhiyun * the IRQ that tells about SETUP packets,
1173*4882a593Smuzhiyun * e.g. when the host gets impatient...
1174*4882a593Smuzhiyun *
1175*4882a593Smuzhiyun * Working around it by copying into a buffer
1176*4882a593Smuzhiyun * would almost be a non-deferred response,
1177*4882a593Smuzhiyun * except that it wouldn't permit reliable
1178*4882a593Smuzhiyun * stalling of the request. Instead, demand
1179*4882a593Smuzhiyun * that gadget drivers not use this mode.
1180*4882a593Smuzhiyun */
1181*4882a593Smuzhiyun DBG("no control-OUT deferred responses!\n");
1182*4882a593Smuzhiyun __raw_writel(csr | AT91_UDP_FORCESTALL, creg);
1183*4882a593Smuzhiyun udc->req_pending = 0;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun /* STATUS stage for control-IN; ack. */
1187*4882a593Smuzhiyun } else {
1188*4882a593Smuzhiyun PACKET("ep0 out/status ACK\n");
1189*4882a593Smuzhiyun __raw_writel(csr, creg);
1190*4882a593Smuzhiyun
1191*4882a593Smuzhiyun /* "early" status stage */
1192*4882a593Smuzhiyun if (req)
1193*4882a593Smuzhiyun done(ep0, req, 0);
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun }
1197*4882a593Smuzhiyun
at91_udc_irq(struct at91_udc * udc)1198*4882a593Smuzhiyun static irqreturn_t at91_udc_irq(struct at91_udc *udc)
1199*4882a593Smuzhiyun {
1200*4882a593Smuzhiyun u32 rescans = 5;
1201*4882a593Smuzhiyun int disable_clock = 0;
1202*4882a593Smuzhiyun unsigned long flags;
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun if (!udc->clocked) {
1207*4882a593Smuzhiyun clk_on(udc);
1208*4882a593Smuzhiyun disable_clock = 1;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun while (rescans--) {
1212*4882a593Smuzhiyun u32 status;
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun status = at91_udp_read(udc, AT91_UDP_ISR)
1215*4882a593Smuzhiyun & at91_udp_read(udc, AT91_UDP_IMR);
1216*4882a593Smuzhiyun if (!status)
1217*4882a593Smuzhiyun break;
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun /* USB reset irq: not maskable */
1220*4882a593Smuzhiyun if (status & AT91_UDP_ENDBUSRES) {
1221*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS);
1222*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS);
1223*4882a593Smuzhiyun /* Atmel code clears this irq twice */
1224*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
1225*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES);
1226*4882a593Smuzhiyun VDBG("end bus reset\n");
1227*4882a593Smuzhiyun udc->addr = 0;
1228*4882a593Smuzhiyun reset_gadget(udc);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun /* enable ep0 */
1231*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_CSR(0),
1232*4882a593Smuzhiyun AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL);
1233*4882a593Smuzhiyun udc->gadget.speed = USB_SPEED_FULL;
1234*4882a593Smuzhiyun udc->suspended = 0;
1235*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0));
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun /*
1238*4882a593Smuzhiyun * NOTE: this driver keeps clocks off unless the
1239*4882a593Smuzhiyun * USB host is present. That saves power, but for
1240*4882a593Smuzhiyun * boards that don't support VBUS detection, both
1241*4882a593Smuzhiyun * clocks need to be active most of the time.
1242*4882a593Smuzhiyun */
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun /* host initiated suspend (3+ms bus idle) */
1245*4882a593Smuzhiyun } else if (status & AT91_UDP_RXSUSP) {
1246*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP);
1247*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM);
1248*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP);
1249*4882a593Smuzhiyun /* VDBG("bus suspend\n"); */
1250*4882a593Smuzhiyun if (udc->suspended)
1251*4882a593Smuzhiyun continue;
1252*4882a593Smuzhiyun udc->suspended = 1;
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun /*
1255*4882a593Smuzhiyun * NOTE: when suspending a VBUS-powered device, the
1256*4882a593Smuzhiyun * gadget driver should switch into slow clock mode
1257*4882a593Smuzhiyun * and then into standby to avoid drawing more than
1258*4882a593Smuzhiyun * 500uA power (2500uA for some high-power configs).
1259*4882a593Smuzhiyun */
1260*4882a593Smuzhiyun if (udc->driver && udc->driver->suspend) {
1261*4882a593Smuzhiyun spin_unlock(&udc->lock);
1262*4882a593Smuzhiyun udc->driver->suspend(&udc->gadget);
1263*4882a593Smuzhiyun spin_lock(&udc->lock);
1264*4882a593Smuzhiyun }
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun /* host initiated resume */
1267*4882a593Smuzhiyun } else if (status & AT91_UDP_RXRSM) {
1268*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM);
1269*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP);
1270*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM);
1271*4882a593Smuzhiyun /* VDBG("bus resume\n"); */
1272*4882a593Smuzhiyun if (!udc->suspended)
1273*4882a593Smuzhiyun continue;
1274*4882a593Smuzhiyun udc->suspended = 0;
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun /*
1277*4882a593Smuzhiyun * NOTE: for a VBUS-powered device, the gadget driver
1278*4882a593Smuzhiyun * would normally want to switch out of slow clock
1279*4882a593Smuzhiyun * mode into normal mode.
1280*4882a593Smuzhiyun */
1281*4882a593Smuzhiyun if (udc->driver && udc->driver->resume) {
1282*4882a593Smuzhiyun spin_unlock(&udc->lock);
1283*4882a593Smuzhiyun udc->driver->resume(&udc->gadget);
1284*4882a593Smuzhiyun spin_lock(&udc->lock);
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun /* endpoint IRQs are cleared by handling them */
1288*4882a593Smuzhiyun } else {
1289*4882a593Smuzhiyun int i;
1290*4882a593Smuzhiyun unsigned mask = 1;
1291*4882a593Smuzhiyun struct at91_ep *ep = &udc->ep[1];
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun if (status & mask)
1294*4882a593Smuzhiyun handle_ep0(udc);
1295*4882a593Smuzhiyun for (i = 1; i < NUM_ENDPOINTS; i++) {
1296*4882a593Smuzhiyun mask <<= 1;
1297*4882a593Smuzhiyun if (status & mask)
1298*4882a593Smuzhiyun handle_ep(ep);
1299*4882a593Smuzhiyun ep++;
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun }
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun if (disable_clock)
1305*4882a593Smuzhiyun clk_off(udc);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun return IRQ_HANDLED;
1310*4882a593Smuzhiyun }
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1313*4882a593Smuzhiyun
at91_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1314*4882a593Smuzhiyun static int at91_start(struct usb_gadget *gadget,
1315*4882a593Smuzhiyun struct usb_gadget_driver *driver)
1316*4882a593Smuzhiyun {
1317*4882a593Smuzhiyun struct at91_udc *udc = controller;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun udc->driver = driver;
1320*4882a593Smuzhiyun udc->enabled = 1;
1321*4882a593Smuzhiyun udc->selfpowered = 1;
1322*4882a593Smuzhiyun
1323*4882a593Smuzhiyun return 0;
1324*4882a593Smuzhiyun }
1325*4882a593Smuzhiyun
at91_stop(struct usb_gadget * gadget)1326*4882a593Smuzhiyun static int at91_stop(struct usb_gadget *gadget)
1327*4882a593Smuzhiyun {
1328*4882a593Smuzhiyun struct at91_udc *udc = controller;
1329*4882a593Smuzhiyun unsigned long flags;
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun spin_lock_irqsave(&udc->lock, flags);
1332*4882a593Smuzhiyun udc->enabled = 0;
1333*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, ~0);
1334*4882a593Smuzhiyun spin_unlock_irqrestore(&udc->lock, flags);
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun udc->driver = NULL;
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun return 0;
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
at91sam9260_udc_init(struct at91_udc * udc)1344*4882a593Smuzhiyun static int at91sam9260_udc_init(struct at91_udc *udc)
1345*4882a593Smuzhiyun {
1346*4882a593Smuzhiyun struct at91_ep *ep;
1347*4882a593Smuzhiyun int i;
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1350*4882a593Smuzhiyun ep = &udc->ep[i];
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun switch (i) {
1353*4882a593Smuzhiyun case 0 ... 3:
1354*4882a593Smuzhiyun ep->maxpacket = 64;
1355*4882a593Smuzhiyun break;
1356*4882a593Smuzhiyun case 4 ... 5:
1357*4882a593Smuzhiyun ep->maxpacket = 512;
1358*4882a593Smuzhiyun break;
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun return 0;
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun
at91sam9260_udc_pullup(struct at91_udc * udc,int is_on)1365*4882a593Smuzhiyun static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on)
1366*4882a593Smuzhiyun {
1367*4882a593Smuzhiyun u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC);
1368*4882a593Smuzhiyun
1369*4882a593Smuzhiyun if (is_on)
1370*4882a593Smuzhiyun txvc |= AT91_UDP_TXVC_PUON;
1371*4882a593Smuzhiyun else
1372*4882a593Smuzhiyun txvc &= ~AT91_UDP_TXVC_PUON;
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, txvc);
1375*4882a593Smuzhiyun }
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun static const struct at91_udc_caps at91sam9260_udc_caps = {
1378*4882a593Smuzhiyun .init = at91sam9260_udc_init,
1379*4882a593Smuzhiyun .pullup = at91sam9260_udc_pullup,
1380*4882a593Smuzhiyun };
1381*4882a593Smuzhiyun #endif
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun #if defined(CONFIG_AT91SAM9261)
at91sam9261_udc_init(struct at91_udc * udc)1384*4882a593Smuzhiyun static int at91sam9261_udc_init(struct at91_udc *udc)
1385*4882a593Smuzhiyun {
1386*4882a593Smuzhiyun struct at91_ep *ep;
1387*4882a593Smuzhiyun int i;
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1390*4882a593Smuzhiyun ep = &udc->ep[i];
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun switch (i) {
1393*4882a593Smuzhiyun case 0:
1394*4882a593Smuzhiyun ep->maxpacket = 8;
1395*4882a593Smuzhiyun break;
1396*4882a593Smuzhiyun case 1 ... 3:
1397*4882a593Smuzhiyun ep->maxpacket = 64;
1398*4882a593Smuzhiyun break;
1399*4882a593Smuzhiyun case 4 ... 5:
1400*4882a593Smuzhiyun ep->maxpacket = 256;
1401*4882a593Smuzhiyun break;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun }
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun udc->matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun if (IS_ERR(udc->matrix))
1408*4882a593Smuzhiyun return PTR_ERR(udc->matrix);
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun return 0;
1411*4882a593Smuzhiyun }
1412*4882a593Smuzhiyun
at91sam9261_udc_pullup(struct at91_udc * udc,int is_on)1413*4882a593Smuzhiyun static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on)
1414*4882a593Smuzhiyun {
1415*4882a593Smuzhiyun u32 usbpucr = 0;
1416*4882a593Smuzhiyun
1417*4882a593Smuzhiyun usbpucr = readl(&udc->matrix->pucr);
1418*4882a593Smuzhiyun if (is_on)
1419*4882a593Smuzhiyun usbpucr |= AT91_MATRIX_USBPUCR_PUON;
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun writel(usbpucr, &udc->matrix->pucr);
1422*4882a593Smuzhiyun }
1423*4882a593Smuzhiyun
1424*4882a593Smuzhiyun static const struct at91_udc_caps at91sam9261_udc_caps = {
1425*4882a593Smuzhiyun .init = at91sam9261_udc_init,
1426*4882a593Smuzhiyun .pullup = at91sam9261_udc_pullup,
1427*4882a593Smuzhiyun };
1428*4882a593Smuzhiyun #endif
1429*4882a593Smuzhiyun
usb_gadget_handle_interrupts(int index)1430*4882a593Smuzhiyun int usb_gadget_handle_interrupts(int index)
1431*4882a593Smuzhiyun {
1432*4882a593Smuzhiyun struct at91_udc *udc = controller;
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun return at91_udc_irq(udc);
1435*4882a593Smuzhiyun }
1436*4882a593Smuzhiyun
usb_gadget_register_driver(struct usb_gadget_driver * driver)1437*4882a593Smuzhiyun int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1438*4882a593Smuzhiyun {
1439*4882a593Smuzhiyun struct at91_udc *udc = controller;
1440*4882a593Smuzhiyun int ret;
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun if (!driver || !driver->bind || !driver->setup) {
1443*4882a593Smuzhiyun printf("bad paramter\n");
1444*4882a593Smuzhiyun return -EINVAL;
1445*4882a593Smuzhiyun }
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun if (udc->driver) {
1448*4882a593Smuzhiyun printf("UDC already has a gadget driver\n");
1449*4882a593Smuzhiyun return -EBUSY;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun at91_start(&udc->gadget, driver);
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun udc->driver = driver;
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun ret = driver->bind(&udc->gadget);
1457*4882a593Smuzhiyun if (ret) {
1458*4882a593Smuzhiyun pr_err("driver->bind() returned %d\n", ret);
1459*4882a593Smuzhiyun udc->driver = NULL;
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun return ret;
1463*4882a593Smuzhiyun }
1464*4882a593Smuzhiyun
usb_gadget_unregister_driver(struct usb_gadget_driver * driver)1465*4882a593Smuzhiyun int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1466*4882a593Smuzhiyun {
1467*4882a593Smuzhiyun struct at91_udc *udc = controller;
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun if (!driver || !driver->unbind || !driver->disconnect) {
1470*4882a593Smuzhiyun pr_err("bad paramter\n");
1471*4882a593Smuzhiyun return -EINVAL;
1472*4882a593Smuzhiyun }
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun driver->disconnect(&udc->gadget);
1475*4882a593Smuzhiyun driver->unbind(&udc->gadget);
1476*4882a593Smuzhiyun udc->driver = NULL;
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun at91_stop(&udc->gadget);
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun return 0;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun
at91_udc_probe(struct at91_udc_data * pdata)1483*4882a593Smuzhiyun int at91_udc_probe(struct at91_udc_data *pdata)
1484*4882a593Smuzhiyun {
1485*4882a593Smuzhiyun struct at91_udc *udc;
1486*4882a593Smuzhiyun int retval;
1487*4882a593Smuzhiyun struct at91_ep *ep;
1488*4882a593Smuzhiyun int i;
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun udc = kzalloc(sizeof(*udc), GFP_KERNEL);
1491*4882a593Smuzhiyun if (!udc)
1492*4882a593Smuzhiyun return -ENOMEM;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun controller = udc;
1495*4882a593Smuzhiyun memcpy(&udc->board, pdata, sizeof(struct at91_udc_data));
1496*4882a593Smuzhiyun if (udc->board.vbus_pin) {
1497*4882a593Smuzhiyun printf("%s: gpio vbus pin not supported yet.\n", __func__);
1498*4882a593Smuzhiyun return -ENXIO;
1499*4882a593Smuzhiyun } else {
1500*4882a593Smuzhiyun DBG("no VBUS detection, assuming always-on\n");
1501*4882a593Smuzhiyun udc->vbus = 1;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun
1504*4882a593Smuzhiyun #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
1505*4882a593Smuzhiyun udc->caps = &at91sam9260_udc_caps;
1506*4882a593Smuzhiyun #endif
1507*4882a593Smuzhiyun
1508*4882a593Smuzhiyun udc->enabled = 0;
1509*4882a593Smuzhiyun spin_lock_init(&udc->lock);
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun udc->gadget.ops = &at91_udc_ops;
1512*4882a593Smuzhiyun udc->gadget.ep0 = &udc->ep[0].ep;
1513*4882a593Smuzhiyun udc->gadget.name = driver_name;
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun for (i = 0; i < NUM_ENDPOINTS; i++) {
1516*4882a593Smuzhiyun ep = &udc->ep[i];
1517*4882a593Smuzhiyun ep->ep.name = ep_names[i];
1518*4882a593Smuzhiyun ep->ep.ops = &at91_ep_ops;
1519*4882a593Smuzhiyun ep->udc = udc;
1520*4882a593Smuzhiyun ep->int_mask = (1 << i);
1521*4882a593Smuzhiyun if (i != 0 && i != 3)
1522*4882a593Smuzhiyun ep->is_pingpong = 1;
1523*4882a593Smuzhiyun }
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun udc->udp_baseaddr = (void *)udc->board.baseaddr;
1526*4882a593Smuzhiyun if (IS_ERR(udc->udp_baseaddr))
1527*4882a593Smuzhiyun return PTR_ERR(udc->udp_baseaddr);
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun if (udc->caps && udc->caps->init) {
1530*4882a593Smuzhiyun retval = udc->caps->init(udc);
1531*4882a593Smuzhiyun if (retval)
1532*4882a593Smuzhiyun return retval;
1533*4882a593Smuzhiyun }
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun udc_reinit(udc);
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
1538*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff);
1539*4882a593Smuzhiyun /* Clear all pending interrupts - UDP may be used by bootloader. */
1540*4882a593Smuzhiyun at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff);
1541*4882a593Smuzhiyun
1542*4882a593Smuzhiyun INFO("%s version %s\n", driver_name, DRIVER_VERSION);
1543*4882a593Smuzhiyun return 0;
1544*4882a593Smuzhiyun }
1545