1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
3*4882a593Smuzhiyun * based on the U-Boot Asix driver as well as information
4*4882a593Smuzhiyun * from the Linux AX88179_178a driver
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <usb.h>
12*4882a593Smuzhiyun #include <net.h>
13*4882a593Smuzhiyun #include <linux/mii.h>
14*4882a593Smuzhiyun #include "usb_ether.h"
15*4882a593Smuzhiyun #include <malloc.h>
16*4882a593Smuzhiyun #include <memalign.h>
17*4882a593Smuzhiyun #include <errno.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* ASIX AX88179 based USB 3.0 Ethernet Devices */
20*4882a593Smuzhiyun #define AX88179_PHY_ID 0x03
21*4882a593Smuzhiyun #define AX_EEPROM_LEN 0x100
22*4882a593Smuzhiyun #define AX88179_EEPROM_MAGIC 0x17900b95
23*4882a593Smuzhiyun #define AX_MCAST_FLTSIZE 8
24*4882a593Smuzhiyun #define AX_MAX_MCAST 64
25*4882a593Smuzhiyun #define AX_INT_PPLS_LINK (1 << 16)
26*4882a593Smuzhiyun #define AX_RXHDR_L4_TYPE_MASK 0x1c
27*4882a593Smuzhiyun #define AX_RXHDR_L4_TYPE_UDP 4
28*4882a593Smuzhiyun #define AX_RXHDR_L4_TYPE_TCP 16
29*4882a593Smuzhiyun #define AX_RXHDR_L3CSUM_ERR 2
30*4882a593Smuzhiyun #define AX_RXHDR_L4CSUM_ERR 1
31*4882a593Smuzhiyun #define AX_RXHDR_CRC_ERR (1 << 29)
32*4882a593Smuzhiyun #define AX_RXHDR_DROP_ERR (1 << 31)
33*4882a593Smuzhiyun #define AX_ENDPOINT_INT 0x01
34*4882a593Smuzhiyun #define AX_ENDPOINT_IN 0x02
35*4882a593Smuzhiyun #define AX_ENDPOINT_OUT 0x03
36*4882a593Smuzhiyun #define AX_ACCESS_MAC 0x01
37*4882a593Smuzhiyun #define AX_ACCESS_PHY 0x02
38*4882a593Smuzhiyun #define AX_ACCESS_EEPROM 0x04
39*4882a593Smuzhiyun #define AX_ACCESS_EFUS 0x05
40*4882a593Smuzhiyun #define AX_PAUSE_WATERLVL_HIGH 0x54
41*4882a593Smuzhiyun #define AX_PAUSE_WATERLVL_LOW 0x55
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define PHYSICAL_LINK_STATUS 0x02
44*4882a593Smuzhiyun #define AX_USB_SS (1 << 2)
45*4882a593Smuzhiyun #define AX_USB_HS (1 << 1)
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define GENERAL_STATUS 0x03
48*4882a593Smuzhiyun #define AX_SECLD (1 << 2)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #define AX_SROM_ADDR 0x07
51*4882a593Smuzhiyun #define AX_SROM_CMD 0x0a
52*4882a593Smuzhiyun #define EEP_RD (1 << 2)
53*4882a593Smuzhiyun #define EEP_BUSY (1 << 4)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define AX_SROM_DATA_LOW 0x08
56*4882a593Smuzhiyun #define AX_SROM_DATA_HIGH 0x09
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define AX_RX_CTL 0x0b
59*4882a593Smuzhiyun #define AX_RX_CTL_DROPCRCERR (1 << 8)
60*4882a593Smuzhiyun #define AX_RX_CTL_IPE (1 << 9)
61*4882a593Smuzhiyun #define AX_RX_CTL_START (1 << 7)
62*4882a593Smuzhiyun #define AX_RX_CTL_AP (1 << 5)
63*4882a593Smuzhiyun #define AX_RX_CTL_AM (1 << 4)
64*4882a593Smuzhiyun #define AX_RX_CTL_AB (1 << 3)
65*4882a593Smuzhiyun #define AX_RX_CTL_AMALL (1 << 1)
66*4882a593Smuzhiyun #define AX_RX_CTL_PRO (1 << 0)
67*4882a593Smuzhiyun #define AX_RX_CTL_STOP 0
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define AX_NODE_ID 0x10
70*4882a593Smuzhiyun #define AX_MULFLTARY 0x16
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define AX_MEDIUM_STATUS_MODE 0x22
73*4882a593Smuzhiyun #define AX_MEDIUM_GIGAMODE (1 << 0)
74*4882a593Smuzhiyun #define AX_MEDIUM_FULL_DUPLEX (1 << 1)
75*4882a593Smuzhiyun #define AX_MEDIUM_EN_125MHZ (1 << 3)
76*4882a593Smuzhiyun #define AX_MEDIUM_RXFLOW_CTRLEN (1 << 4)
77*4882a593Smuzhiyun #define AX_MEDIUM_TXFLOW_CTRLEN (1 << 5)
78*4882a593Smuzhiyun #define AX_MEDIUM_RECEIVE_EN (1 << 8)
79*4882a593Smuzhiyun #define AX_MEDIUM_PS (1 << 9)
80*4882a593Smuzhiyun #define AX_MEDIUM_JUMBO_EN 0x8040
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #define AX_MONITOR_MOD 0x24
83*4882a593Smuzhiyun #define AX_MONITOR_MODE_RWLC (1 << 1)
84*4882a593Smuzhiyun #define AX_MONITOR_MODE_RWMP (1 << 2)
85*4882a593Smuzhiyun #define AX_MONITOR_MODE_PMEPOL (1 << 5)
86*4882a593Smuzhiyun #define AX_MONITOR_MODE_PMETYPE (1 << 6)
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define AX_GPIO_CTRL 0x25
89*4882a593Smuzhiyun #define AX_GPIO_CTRL_GPIO3EN (1 << 7)
90*4882a593Smuzhiyun #define AX_GPIO_CTRL_GPIO2EN (1 << 6)
91*4882a593Smuzhiyun #define AX_GPIO_CTRL_GPIO1EN (1 << 5)
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #define AX_PHYPWR_RSTCTL 0x26
94*4882a593Smuzhiyun #define AX_PHYPWR_RSTCTL_BZ (1 << 4)
95*4882a593Smuzhiyun #define AX_PHYPWR_RSTCTL_IPRL (1 << 5)
96*4882a593Smuzhiyun #define AX_PHYPWR_RSTCTL_AT (1 << 12)
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #define AX_RX_BULKIN_QCTRL 0x2e
99*4882a593Smuzhiyun #define AX_CLK_SELECT 0x33
100*4882a593Smuzhiyun #define AX_CLK_SELECT_BCS (1 << 0)
101*4882a593Smuzhiyun #define AX_CLK_SELECT_ACS (1 << 1)
102*4882a593Smuzhiyun #define AX_CLK_SELECT_ULR (1 << 3)
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #define AX_RXCOE_CTL 0x34
105*4882a593Smuzhiyun #define AX_RXCOE_IP (1 << 0)
106*4882a593Smuzhiyun #define AX_RXCOE_TCP (1 << 1)
107*4882a593Smuzhiyun #define AX_RXCOE_UDP (1 << 2)
108*4882a593Smuzhiyun #define AX_RXCOE_TCPV6 (1 << 5)
109*4882a593Smuzhiyun #define AX_RXCOE_UDPV6 (1 << 6)
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun #define AX_TXCOE_CTL 0x35
112*4882a593Smuzhiyun #define AX_TXCOE_IP (1 << 0)
113*4882a593Smuzhiyun #define AX_TXCOE_TCP (1 << 1)
114*4882a593Smuzhiyun #define AX_TXCOE_UDP (1 << 2)
115*4882a593Smuzhiyun #define AX_TXCOE_TCPV6 (1 << 5)
116*4882a593Smuzhiyun #define AX_TXCOE_UDPV6 (1 << 6)
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #define AX_LEDCTRL 0x73
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #define GMII_PHY_PHYSR 0x11
121*4882a593Smuzhiyun #define GMII_PHY_PHYSR_SMASK 0xc000
122*4882a593Smuzhiyun #define GMII_PHY_PHYSR_GIGA (1 << 15)
123*4882a593Smuzhiyun #define GMII_PHY_PHYSR_100 (1 << 14)
124*4882a593Smuzhiyun #define GMII_PHY_PHYSR_FULL (1 << 13)
125*4882a593Smuzhiyun #define GMII_PHY_PHYSR_LINK (1 << 10)
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define GMII_LED_ACT 0x1a
128*4882a593Smuzhiyun #define GMII_LED_ACTIVE_MASK 0xff8f
129*4882a593Smuzhiyun #define GMII_LED0_ACTIVE (1 << 4)
130*4882a593Smuzhiyun #define GMII_LED1_ACTIVE (1 << 5)
131*4882a593Smuzhiyun #define GMII_LED2_ACTIVE (1 << 6)
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun #define GMII_LED_LINK 0x1c
134*4882a593Smuzhiyun #define GMII_LED_LINK_MASK 0xf888
135*4882a593Smuzhiyun #define GMII_LED0_LINK_10 (1 << 0)
136*4882a593Smuzhiyun #define GMII_LED0_LINK_100 (1 << 1)
137*4882a593Smuzhiyun #define GMII_LED0_LINK_1000 (1 << 2)
138*4882a593Smuzhiyun #define GMII_LED1_LINK_10 (1 << 4)
139*4882a593Smuzhiyun #define GMII_LED1_LINK_100 (1 << 5)
140*4882a593Smuzhiyun #define GMII_LED1_LINK_1000 (1 << 6)
141*4882a593Smuzhiyun #define GMII_LED2_LINK_10 (1 << 8)
142*4882a593Smuzhiyun #define GMII_LED2_LINK_100 (1 << 9)
143*4882a593Smuzhiyun #define GMII_LED2_LINK_1000 (1 << 10)
144*4882a593Smuzhiyun #define LED0_ACTIVE (1 << 0)
145*4882a593Smuzhiyun #define LED0_LINK_10 (1 << 1)
146*4882a593Smuzhiyun #define LED0_LINK_100 (1 << 2)
147*4882a593Smuzhiyun #define LED0_LINK_1000 (1 << 3)
148*4882a593Smuzhiyun #define LED0_FD (1 << 4)
149*4882a593Smuzhiyun #define LED0_USB3_MASK 0x001f
150*4882a593Smuzhiyun #define LED1_ACTIVE (1 << 5)
151*4882a593Smuzhiyun #define LED1_LINK_10 (1 << 6)
152*4882a593Smuzhiyun #define LED1_LINK_100 (1 << 7)
153*4882a593Smuzhiyun #define LED1_LINK_1000 (1 << 8)
154*4882a593Smuzhiyun #define LED1_FD (1 << 9)
155*4882a593Smuzhiyun #define LED1_USB3_MASK 0x03e0
156*4882a593Smuzhiyun #define LED2_ACTIVE (1 << 10)
157*4882a593Smuzhiyun #define LED2_LINK_1000 (1 << 13)
158*4882a593Smuzhiyun #define LED2_LINK_100 (1 << 12)
159*4882a593Smuzhiyun #define LED2_LINK_10 (1 << 11)
160*4882a593Smuzhiyun #define LED2_FD (1 << 14)
161*4882a593Smuzhiyun #define LED_VALID (1 << 15)
162*4882a593Smuzhiyun #define LED2_USB3_MASK 0x7c00
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun #define GMII_PHYPAGE 0x1e
165*4882a593Smuzhiyun #define GMII_PHY_PAGE_SELECT 0x1f
166*4882a593Smuzhiyun #define GMII_PHY_PGSEL_EXT 0x0007
167*4882a593Smuzhiyun #define GMII_PHY_PGSEL_PAGE0 0x0000
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* local defines */
170*4882a593Smuzhiyun #define ASIX_BASE_NAME "axg"
171*4882a593Smuzhiyun #define USB_CTRL_SET_TIMEOUT 5000
172*4882a593Smuzhiyun #define USB_CTRL_GET_TIMEOUT 5000
173*4882a593Smuzhiyun #define USB_BULK_SEND_TIMEOUT 5000
174*4882a593Smuzhiyun #define USB_BULK_RECV_TIMEOUT 5000
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun #define AX_RX_URB_SIZE 1024 * 0x12
177*4882a593Smuzhiyun #define BLK_FRAME_SIZE 0x200
178*4882a593Smuzhiyun #define PHY_CONNECT_TIMEOUT 5000
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun #define TIMEOUT_RESOLUTION 50 /* ms */
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun #define FLAG_NONE 0
183*4882a593Smuzhiyun #define FLAG_TYPE_AX88179 (1U << 0)
184*4882a593Smuzhiyun #define FLAG_TYPE_AX88178a (1U << 1)
185*4882a593Smuzhiyun #define FLAG_TYPE_DLINK_DUB1312 (1U << 2)
186*4882a593Smuzhiyun #define FLAG_TYPE_SITECOM (1U << 3)
187*4882a593Smuzhiyun #define FLAG_TYPE_SAMSUNG (1U << 4)
188*4882a593Smuzhiyun #define FLAG_TYPE_LENOVO (1U << 5)
189*4882a593Smuzhiyun #define FLAG_TYPE_GX3 (1U << 6)
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* local vars */
192*4882a593Smuzhiyun static const struct {
193*4882a593Smuzhiyun unsigned char ctrl, timer_l, timer_h, size, ifg;
194*4882a593Smuzhiyun } AX88179_BULKIN_SIZE[] = {
195*4882a593Smuzhiyun {7, 0x4f, 0, 0x02, 0xff},
196*4882a593Smuzhiyun {7, 0x20, 3, 0x03, 0xff},
197*4882a593Smuzhiyun {7, 0xae, 7, 0x04, 0xff},
198*4882a593Smuzhiyun {7, 0xcc, 0x4c, 0x04, 8},
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun #ifndef CONFIG_DM_ETH
202*4882a593Smuzhiyun static int curr_eth_dev; /* index for name of next device detected */
203*4882a593Smuzhiyun #endif
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* driver private */
206*4882a593Smuzhiyun struct asix_private {
207*4882a593Smuzhiyun #ifdef CONFIG_DM_ETH
208*4882a593Smuzhiyun struct ueth_data ueth;
209*4882a593Smuzhiyun unsigned pkt_cnt;
210*4882a593Smuzhiyun uint8_t *pkt_data;
211*4882a593Smuzhiyun uint32_t *pkt_hdr;
212*4882a593Smuzhiyun #endif
213*4882a593Smuzhiyun int flags;
214*4882a593Smuzhiyun int rx_urb_size;
215*4882a593Smuzhiyun int maxpacketsize;
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /*
219*4882a593Smuzhiyun * Asix infrastructure commands
220*4882a593Smuzhiyun */
asix_write_cmd(struct ueth_data * dev,u8 cmd,u16 value,u16 index,u16 size,void * data)221*4882a593Smuzhiyun static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
222*4882a593Smuzhiyun u16 size, void *data)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun int len;
225*4882a593Smuzhiyun ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
228*4882a593Smuzhiyun cmd, value, index, size);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun memcpy(buf, data, size);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun len = usb_control_msg(
233*4882a593Smuzhiyun dev->pusb_dev,
234*4882a593Smuzhiyun usb_sndctrlpipe(dev->pusb_dev, 0),
235*4882a593Smuzhiyun cmd,
236*4882a593Smuzhiyun USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
237*4882a593Smuzhiyun value,
238*4882a593Smuzhiyun index,
239*4882a593Smuzhiyun buf,
240*4882a593Smuzhiyun size,
241*4882a593Smuzhiyun USB_CTRL_SET_TIMEOUT);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun return len == size ? 0 : ECOMM;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
asix_read_cmd(struct ueth_data * dev,u8 cmd,u16 value,u16 index,u16 size,void * data)246*4882a593Smuzhiyun static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
247*4882a593Smuzhiyun u16 size, void *data)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun int len;
250*4882a593Smuzhiyun ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
253*4882a593Smuzhiyun cmd, value, index, size);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun len = usb_control_msg(
256*4882a593Smuzhiyun dev->pusb_dev,
257*4882a593Smuzhiyun usb_rcvctrlpipe(dev->pusb_dev, 0),
258*4882a593Smuzhiyun cmd,
259*4882a593Smuzhiyun USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
260*4882a593Smuzhiyun value,
261*4882a593Smuzhiyun index,
262*4882a593Smuzhiyun buf,
263*4882a593Smuzhiyun size,
264*4882a593Smuzhiyun USB_CTRL_GET_TIMEOUT);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun memcpy(data, buf, size);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun return len == size ? 0 : ECOMM;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
asix_read_mac(struct ueth_data * dev,uint8_t * enetaddr)271*4882a593Smuzhiyun static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun int ret;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr);
276*4882a593Smuzhiyun if (ret < 0)
277*4882a593Smuzhiyun debug("Failed to read MAC address: %02x\n", ret);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun return ret;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
asix_write_mac(struct ueth_data * dev,uint8_t * enetaddr)282*4882a593Smuzhiyun static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun int ret;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
287*4882a593Smuzhiyun ETH_ALEN, enetaddr);
288*4882a593Smuzhiyun if (ret < 0)
289*4882a593Smuzhiyun debug("Failed to set MAC address: %02x\n", ret);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun return ret;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
asix_basic_reset(struct ueth_data * dev,struct asix_private * dev_priv)294*4882a593Smuzhiyun static int asix_basic_reset(struct ueth_data *dev,
295*4882a593Smuzhiyun struct asix_private *dev_priv)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun u8 buf[5];
298*4882a593Smuzhiyun u16 *tmp16;
299*4882a593Smuzhiyun u8 *tmp;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun tmp16 = (u16 *)buf;
302*4882a593Smuzhiyun tmp = (u8 *)buf;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* Power up ethernet PHY */
305*4882a593Smuzhiyun *tmp16 = 0;
306*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
309*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
310*4882a593Smuzhiyun mdelay(200);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
313*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
314*4882a593Smuzhiyun mdelay(200);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* RX bulk configuration */
317*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
318*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun dev_priv->rx_urb_size = 128 * 20;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* Water Level configuration */
323*4882a593Smuzhiyun *tmp = 0x34;
324*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun *tmp = 0x52;
327*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun /* Enable checksum offload */
330*4882a593Smuzhiyun *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
331*4882a593Smuzhiyun AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
332*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
335*4882a593Smuzhiyun AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
336*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun /* Configure RX control register => start operation */
339*4882a593Smuzhiyun *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
340*4882a593Smuzhiyun AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
341*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
344*4882a593Smuzhiyun AX_MONITOR_MODE_RWMP;
345*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /* Configure default medium type => giga */
348*4882a593Smuzhiyun *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
349*4882a593Smuzhiyun AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
350*4882a593Smuzhiyun AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN;
351*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun u16 adv = 0;
354*4882a593Smuzhiyun adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK |
355*4882a593Smuzhiyun ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP;
356*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun adv = ADVERTISE_1000FULL;
359*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun return 0;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
asix_wait_link(struct ueth_data * dev)364*4882a593Smuzhiyun static int asix_wait_link(struct ueth_data *dev)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun int timeout = 0;
367*4882a593Smuzhiyun int link_detected;
368*4882a593Smuzhiyun u8 buf[2];
369*4882a593Smuzhiyun u16 *tmp16;
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun tmp16 = (u16 *)buf;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun do {
374*4882a593Smuzhiyun asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
375*4882a593Smuzhiyun MII_BMSR, 2, buf);
376*4882a593Smuzhiyun link_detected = *tmp16 & BMSR_LSTATUS;
377*4882a593Smuzhiyun if (!link_detected) {
378*4882a593Smuzhiyun if (timeout == 0)
379*4882a593Smuzhiyun printf("Waiting for Ethernet connection... ");
380*4882a593Smuzhiyun mdelay(TIMEOUT_RESOLUTION);
381*4882a593Smuzhiyun timeout += TIMEOUT_RESOLUTION;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (link_detected) {
386*4882a593Smuzhiyun if (timeout > 0)
387*4882a593Smuzhiyun printf("done.\n");
388*4882a593Smuzhiyun return 0;
389*4882a593Smuzhiyun } else {
390*4882a593Smuzhiyun printf("unable to connect.\n");
391*4882a593Smuzhiyun return -ENETUNREACH;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun
asix_init_common(struct ueth_data * dev,struct asix_private * dev_priv)395*4882a593Smuzhiyun static int asix_init_common(struct ueth_data *dev,
396*4882a593Smuzhiyun struct asix_private *dev_priv)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun u8 buf[2], tmp[5], link_sts;
399*4882a593Smuzhiyun u16 *tmp16, mode;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun tmp16 = (u16 *)buf;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun debug("** %s()\n", __func__);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun /* Configure RX control register => start operation */
407*4882a593Smuzhiyun *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
408*4882a593Smuzhiyun AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
409*4882a593Smuzhiyun if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0)
410*4882a593Smuzhiyun goto out_err;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (asix_wait_link(dev) != 0) {
413*4882a593Smuzhiyun /*reset device and try again*/
414*4882a593Smuzhiyun printf("Reset Ethernet Device\n");
415*4882a593Smuzhiyun asix_basic_reset(dev, dev_priv);
416*4882a593Smuzhiyun if (asix_wait_link(dev) != 0)
417*4882a593Smuzhiyun goto out_err;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /* Configure link */
421*4882a593Smuzhiyun mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
422*4882a593Smuzhiyun AX_MEDIUM_RXFLOW_CTRLEN;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
425*4882a593Smuzhiyun 1, 1, &link_sts);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
428*4882a593Smuzhiyun GMII_PHY_PHYSR, 2, tmp16);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) {
431*4882a593Smuzhiyun return 0;
432*4882a593Smuzhiyun } else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
433*4882a593Smuzhiyun mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ |
434*4882a593Smuzhiyun AX_MEDIUM_JUMBO_EN;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (link_sts & AX_USB_SS)
437*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
438*4882a593Smuzhiyun else if (link_sts & AX_USB_HS)
439*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
440*4882a593Smuzhiyun else
441*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
442*4882a593Smuzhiyun } else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
443*4882a593Smuzhiyun mode |= AX_MEDIUM_PS;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (link_sts & (AX_USB_SS | AX_USB_HS))
446*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
447*4882a593Smuzhiyun else
448*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
449*4882a593Smuzhiyun } else {
450*4882a593Smuzhiyun memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun /* RX bulk configuration */
454*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun dev_priv->rx_urb_size = (1024 * (tmp[3] + 2));
457*4882a593Smuzhiyun if (*tmp16 & GMII_PHY_PHYSR_FULL)
458*4882a593Smuzhiyun mode |= AX_MEDIUM_FULL_DUPLEX;
459*4882a593Smuzhiyun asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
460*4882a593Smuzhiyun 2, 2, &mode);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun out_err:
464*4882a593Smuzhiyun return -1;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
asix_send_common(struct ueth_data * dev,struct asix_private * dev_priv,void * packet,int length)467*4882a593Smuzhiyun static int asix_send_common(struct ueth_data *dev,
468*4882a593Smuzhiyun struct asix_private *dev_priv,
469*4882a593Smuzhiyun void *packet, int length)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun int err;
472*4882a593Smuzhiyun u32 packet_len, tx_hdr2;
473*4882a593Smuzhiyun int actual_len, framesize;
474*4882a593Smuzhiyun ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
475*4882a593Smuzhiyun PKTSIZE + (2 * sizeof(packet_len)));
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun debug("** %s(), len %d\n", __func__, length);
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun packet_len = length;
480*4882a593Smuzhiyun cpu_to_le32s(&packet_len);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun memcpy(msg, &packet_len, sizeof(packet_len));
483*4882a593Smuzhiyun framesize = dev_priv->maxpacketsize;
484*4882a593Smuzhiyun tx_hdr2 = 0;
485*4882a593Smuzhiyun if (((length + 8) % framesize) == 0)
486*4882a593Smuzhiyun tx_hdr2 |= 0x80008000; /* Enable padding */
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun cpu_to_le32s(&tx_hdr2);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2));
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2),
493*4882a593Smuzhiyun (void *)packet, length);
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun err = usb_bulk_msg(dev->pusb_dev,
496*4882a593Smuzhiyun usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
497*4882a593Smuzhiyun (void *)msg,
498*4882a593Smuzhiyun length + sizeof(packet_len) + sizeof(tx_hdr2),
499*4882a593Smuzhiyun &actual_len,
500*4882a593Smuzhiyun USB_BULK_SEND_TIMEOUT);
501*4882a593Smuzhiyun debug("Tx: len = %zu, actual = %u, err = %d\n",
502*4882a593Smuzhiyun length + sizeof(packet_len), actual_len, err);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return err;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun #ifndef CONFIG_DM_ETH
508*4882a593Smuzhiyun /*
509*4882a593Smuzhiyun * Asix callbacks
510*4882a593Smuzhiyun */
asix_init(struct eth_device * eth,bd_t * bd)511*4882a593Smuzhiyun static int asix_init(struct eth_device *eth, bd_t *bd)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun struct ueth_data *dev = (struct ueth_data *)eth->priv;
514*4882a593Smuzhiyun struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun return asix_init_common(dev, dev_priv);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
asix_write_hwaddr(struct eth_device * eth)519*4882a593Smuzhiyun static int asix_write_hwaddr(struct eth_device *eth)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun struct ueth_data *dev = (struct ueth_data *)eth->priv;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun return asix_write_mac(dev, eth->enetaddr);
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
asix_send(struct eth_device * eth,void * packet,int length)526*4882a593Smuzhiyun static int asix_send(struct eth_device *eth, void *packet, int length)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun struct ueth_data *dev = (struct ueth_data *)eth->priv;
529*4882a593Smuzhiyun struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun return asix_send_common(dev, dev_priv, packet, length);
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
asix_recv(struct eth_device * eth)534*4882a593Smuzhiyun static int asix_recv(struct eth_device *eth)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun struct ueth_data *dev = (struct ueth_data *)eth->priv;
537*4882a593Smuzhiyun struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun u16 frame_pos;
540*4882a593Smuzhiyun int err;
541*4882a593Smuzhiyun int actual_len;
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun int pkt_cnt;
544*4882a593Smuzhiyun u32 rx_hdr;
545*4882a593Smuzhiyun u16 hdr_off;
546*4882a593Smuzhiyun u32 *pkt_hdr;
547*4882a593Smuzhiyun ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun actual_len = -1;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun debug("** %s()\n", __func__);
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun err = usb_bulk_msg(dev->pusb_dev,
554*4882a593Smuzhiyun usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
555*4882a593Smuzhiyun (void *)recv_buf,
556*4882a593Smuzhiyun dev_priv->rx_urb_size,
557*4882a593Smuzhiyun &actual_len,
558*4882a593Smuzhiyun USB_BULK_RECV_TIMEOUT);
559*4882a593Smuzhiyun debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size,
560*4882a593Smuzhiyun actual_len, err);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun if (err != 0) {
563*4882a593Smuzhiyun debug("Rx: failed to receive\n");
564*4882a593Smuzhiyun return -ECOMM;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun if (actual_len > dev_priv->rx_urb_size) {
567*4882a593Smuzhiyun debug("Rx: received too many bytes %d\n", actual_len);
568*4882a593Smuzhiyun return -EMSGSIZE;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun rx_hdr = *(u32 *)(recv_buf + actual_len - 4);
573*4882a593Smuzhiyun le32_to_cpus(&rx_hdr);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun pkt_cnt = (u16)rx_hdr;
576*4882a593Smuzhiyun hdr_off = (u16)(rx_hdr >> 16);
577*4882a593Smuzhiyun pkt_hdr = (u32 *)(recv_buf + hdr_off);
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun frame_pos = 0;
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun while (pkt_cnt--) {
583*4882a593Smuzhiyun u16 pkt_len;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun le32_to_cpus(pkt_hdr);
586*4882a593Smuzhiyun pkt_len = (*pkt_hdr >> 16) & 0x1fff;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun frame_pos += 2;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun net_process_received_packet(recv_buf + frame_pos, pkt_len);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun pkt_hdr++;
593*4882a593Smuzhiyun frame_pos += ((pkt_len + 7) & 0xFFF8)-2;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun if (pkt_cnt == 0)
596*4882a593Smuzhiyun return 0;
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun return err;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
asix_halt(struct eth_device * eth)601*4882a593Smuzhiyun static void asix_halt(struct eth_device *eth)
602*4882a593Smuzhiyun {
603*4882a593Smuzhiyun debug("** %s()\n", __func__);
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /*
607*4882a593Smuzhiyun * Asix probing functions
608*4882a593Smuzhiyun */
ax88179_eth_before_probe(void)609*4882a593Smuzhiyun void ax88179_eth_before_probe(void)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun curr_eth_dev = 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun struct asix_dongle {
615*4882a593Smuzhiyun unsigned short vendor;
616*4882a593Smuzhiyun unsigned short product;
617*4882a593Smuzhiyun int flags;
618*4882a593Smuzhiyun };
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun static const struct asix_dongle asix_dongles[] = {
621*4882a593Smuzhiyun { 0x0b95, 0x1790, FLAG_TYPE_AX88179 },
622*4882a593Smuzhiyun { 0x0b95, 0x178a, FLAG_TYPE_AX88178a },
623*4882a593Smuzhiyun { 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 },
624*4882a593Smuzhiyun { 0x0df6, 0x0072, FLAG_TYPE_SITECOM },
625*4882a593Smuzhiyun { 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG },
626*4882a593Smuzhiyun { 0x17ef, 0x304b, FLAG_TYPE_LENOVO },
627*4882a593Smuzhiyun { 0x04b4, 0x3610, FLAG_TYPE_GX3 },
628*4882a593Smuzhiyun { 0x0000, 0x0000, FLAG_NONE } /* END - Do not remove */
629*4882a593Smuzhiyun };
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun /* Probe to see if a new device is actually an asix device */
ax88179_eth_probe(struct usb_device * dev,unsigned int ifnum,struct ueth_data * ss)632*4882a593Smuzhiyun int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,
633*4882a593Smuzhiyun struct ueth_data *ss)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun struct usb_interface *iface;
636*4882a593Smuzhiyun struct usb_interface_descriptor *iface_desc;
637*4882a593Smuzhiyun struct asix_private *dev_priv;
638*4882a593Smuzhiyun int ep_in_found = 0, ep_out_found = 0;
639*4882a593Smuzhiyun int i;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun /* let's examine the device now */
642*4882a593Smuzhiyun iface = &dev->config.if_desc[ifnum];
643*4882a593Smuzhiyun iface_desc = &dev->config.if_desc[ifnum].desc;
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun for (i = 0; asix_dongles[i].vendor != 0; i++) {
646*4882a593Smuzhiyun if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
647*4882a593Smuzhiyun dev->descriptor.idProduct == asix_dongles[i].product)
648*4882a593Smuzhiyun /* Found a supported dongle */
649*4882a593Smuzhiyun break;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun if (asix_dongles[i].vendor == 0)
653*4882a593Smuzhiyun return 0;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun memset(ss, 0, sizeof(struct ueth_data));
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun /* At this point, we know we've got a live one */
658*4882a593Smuzhiyun debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
659*4882a593Smuzhiyun dev->descriptor.idVendor, dev->descriptor.idProduct);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun /* Initialize the ueth_data structure with some useful info */
662*4882a593Smuzhiyun ss->ifnum = ifnum;
663*4882a593Smuzhiyun ss->pusb_dev = dev;
664*4882a593Smuzhiyun ss->subclass = iface_desc->bInterfaceSubClass;
665*4882a593Smuzhiyun ss->protocol = iface_desc->bInterfaceProtocol;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun /* alloc driver private */
668*4882a593Smuzhiyun ss->dev_priv = calloc(1, sizeof(struct asix_private));
669*4882a593Smuzhiyun if (!ss->dev_priv)
670*4882a593Smuzhiyun return 0;
671*4882a593Smuzhiyun dev_priv = ss->dev_priv;
672*4882a593Smuzhiyun dev_priv->flags = asix_dongles[i].flags;
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun /*
675*4882a593Smuzhiyun * We are expecting a minimum of 3 endpoints - in, out (bulk), and
676*4882a593Smuzhiyun * int. We will ignore any others.
677*4882a593Smuzhiyun */
678*4882a593Smuzhiyun for (i = 0; i < iface_desc->bNumEndpoints; i++) {
679*4882a593Smuzhiyun /* is it an interrupt endpoint? */
680*4882a593Smuzhiyun if ((iface->ep_desc[i].bmAttributes &
681*4882a593Smuzhiyun USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
682*4882a593Smuzhiyun ss->ep_int = iface->ep_desc[i].bEndpointAddress &
683*4882a593Smuzhiyun USB_ENDPOINT_NUMBER_MASK;
684*4882a593Smuzhiyun ss->irqinterval = iface->ep_desc[i].bInterval;
685*4882a593Smuzhiyun continue;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun /* is it an BULK endpoint? */
689*4882a593Smuzhiyun if (!((iface->ep_desc[i].bmAttributes &
690*4882a593Smuzhiyun USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK))
691*4882a593Smuzhiyun continue;
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
694*4882a593Smuzhiyun if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
695*4882a593Smuzhiyun ss->ep_in = ep_addr &
696*4882a593Smuzhiyun USB_ENDPOINT_NUMBER_MASK;
697*4882a593Smuzhiyun ep_in_found = 1;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun if (!(ep_addr & USB_DIR_IN) && !ep_out_found) {
700*4882a593Smuzhiyun ss->ep_out = ep_addr &
701*4882a593Smuzhiyun USB_ENDPOINT_NUMBER_MASK;
702*4882a593Smuzhiyun dev_priv->maxpacketsize =
703*4882a593Smuzhiyun dev->epmaxpacketout[AX_ENDPOINT_OUT];
704*4882a593Smuzhiyun ep_out_found = 1;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun debug("Endpoints In %d Out %d Int %d\n",
708*4882a593Smuzhiyun ss->ep_in, ss->ep_out, ss->ep_int);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun /* Do some basic sanity checks, and bail if we find a problem */
711*4882a593Smuzhiyun if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
712*4882a593Smuzhiyun !ss->ep_in || !ss->ep_out || !ss->ep_int) {
713*4882a593Smuzhiyun debug("Problems with device\n");
714*4882a593Smuzhiyun return 0;
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun dev->privptr = (void *)ss;
717*4882a593Smuzhiyun return 1;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
ax88179_eth_get_info(struct usb_device * dev,struct ueth_data * ss,struct eth_device * eth)720*4882a593Smuzhiyun int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
721*4882a593Smuzhiyun struct eth_device *eth)
722*4882a593Smuzhiyun {
723*4882a593Smuzhiyun struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun if (!eth) {
726*4882a593Smuzhiyun debug("%s: missing parameter.\n", __func__);
727*4882a593Smuzhiyun return 0;
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
730*4882a593Smuzhiyun eth->init = asix_init;
731*4882a593Smuzhiyun eth->send = asix_send;
732*4882a593Smuzhiyun eth->recv = asix_recv;
733*4882a593Smuzhiyun eth->halt = asix_halt;
734*4882a593Smuzhiyun eth->write_hwaddr = asix_write_hwaddr;
735*4882a593Smuzhiyun eth->priv = ss;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun if (asix_basic_reset(ss, dev_priv))
738*4882a593Smuzhiyun return 0;
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun /* Get the MAC address */
741*4882a593Smuzhiyun if (asix_read_mac(ss, eth->enetaddr))
742*4882a593Smuzhiyun return 0;
743*4882a593Smuzhiyun debug("MAC %pM\n", eth->enetaddr);
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun return 1;
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun #else /* !CONFIG_DM_ETH */
749*4882a593Smuzhiyun
ax88179_eth_start(struct udevice * dev)750*4882a593Smuzhiyun static int ax88179_eth_start(struct udevice *dev)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun return asix_init_common(&priv->ueth, priv);
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun
ax88179_eth_stop(struct udevice * dev)757*4882a593Smuzhiyun void ax88179_eth_stop(struct udevice *dev)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
760*4882a593Smuzhiyun struct ueth_data *ueth = &priv->ueth;
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun debug("** %s()\n", __func__);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun usb_ether_advance_rxbuf(ueth, -1);
765*4882a593Smuzhiyun priv->pkt_cnt = 0;
766*4882a593Smuzhiyun priv->pkt_data = NULL;
767*4882a593Smuzhiyun priv->pkt_hdr = NULL;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
ax88179_eth_send(struct udevice * dev,void * packet,int length)770*4882a593Smuzhiyun int ax88179_eth_send(struct udevice *dev, void *packet, int length)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun return asix_send_common(&priv->ueth, priv, packet, length);
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun
ax88179_eth_recv(struct udevice * dev,int flags,uchar ** packetp)777*4882a593Smuzhiyun int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp)
778*4882a593Smuzhiyun {
779*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
780*4882a593Smuzhiyun struct ueth_data *ueth = &priv->ueth;
781*4882a593Smuzhiyun int ret, len;
782*4882a593Smuzhiyun u16 pkt_len;
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun /* No packet left, get a new one */
785*4882a593Smuzhiyun if (priv->pkt_cnt == 0) {
786*4882a593Smuzhiyun uint8_t *ptr;
787*4882a593Smuzhiyun u16 pkt_cnt;
788*4882a593Smuzhiyun u16 hdr_off;
789*4882a593Smuzhiyun u32 rx_hdr;
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun len = usb_ether_get_rx_bytes(ueth, &ptr);
792*4882a593Smuzhiyun debug("%s: first try, len=%d\n", __func__, len);
793*4882a593Smuzhiyun if (!len) {
794*4882a593Smuzhiyun if (!(flags & ETH_RECV_CHECK_DEVICE))
795*4882a593Smuzhiyun return -EAGAIN;
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun ret = usb_ether_receive(ueth, priv->rx_urb_size);
798*4882a593Smuzhiyun if (ret < 0)
799*4882a593Smuzhiyun return ret;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun len = usb_ether_get_rx_bytes(ueth, &ptr);
802*4882a593Smuzhiyun debug("%s: second try, len=%d\n", __func__, len);
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun if (len < 4) {
806*4882a593Smuzhiyun usb_ether_advance_rxbuf(ueth, -1);
807*4882a593Smuzhiyun return -EMSGSIZE;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun rx_hdr = *(u32 *)(ptr + len - 4);
811*4882a593Smuzhiyun le32_to_cpus(&rx_hdr);
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun pkt_cnt = (u16)rx_hdr;
814*4882a593Smuzhiyun if (pkt_cnt == 0) {
815*4882a593Smuzhiyun usb_ether_advance_rxbuf(ueth, -1);
816*4882a593Smuzhiyun return 0;
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun hdr_off = (u16)(rx_hdr >> 16);
820*4882a593Smuzhiyun if (hdr_off > len - 4) {
821*4882a593Smuzhiyun usb_ether_advance_rxbuf(ueth, -1);
822*4882a593Smuzhiyun return -EIO;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun priv->pkt_cnt = pkt_cnt;
826*4882a593Smuzhiyun priv->pkt_data = ptr;
827*4882a593Smuzhiyun priv->pkt_hdr = (u32 *)(ptr + hdr_off);
828*4882a593Smuzhiyun debug("%s: %d packets received, pkt header at %d\n",
829*4882a593Smuzhiyun __func__, (int)priv->pkt_cnt, (int)hdr_off);
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun le32_to_cpus(priv->pkt_hdr);
833*4882a593Smuzhiyun pkt_len = (*priv->pkt_hdr >> 16) & 0x1fff;
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun *packetp = priv->pkt_data + 2;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun priv->pkt_data += (pkt_len + 7) & 0xFFF8;
838*4882a593Smuzhiyun priv->pkt_cnt--;
839*4882a593Smuzhiyun priv->pkt_hdr++;
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun debug("%s: return packet of %d bytes (%d packets left)\n",
842*4882a593Smuzhiyun __func__, (int)pkt_len, priv->pkt_cnt);
843*4882a593Smuzhiyun return pkt_len;
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun
ax88179_free_pkt(struct udevice * dev,uchar * packet,int packet_len)846*4882a593Smuzhiyun static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
849*4882a593Smuzhiyun struct ueth_data *ueth = &priv->ueth;
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun if (priv->pkt_cnt == 0)
852*4882a593Smuzhiyun usb_ether_advance_rxbuf(ueth, -1);
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun return 0;
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
ax88179_write_hwaddr(struct udevice * dev)857*4882a593Smuzhiyun int ax88179_write_hwaddr(struct udevice *dev)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun struct eth_pdata *pdata = dev_get_platdata(dev);
860*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
861*4882a593Smuzhiyun struct ueth_data *ueth = &priv->ueth;
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun return asix_write_mac(ueth, pdata->enetaddr);
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
ax88179_eth_probe(struct udevice * dev)866*4882a593Smuzhiyun static int ax88179_eth_probe(struct udevice *dev)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun struct eth_pdata *pdata = dev_get_platdata(dev);
869*4882a593Smuzhiyun struct asix_private *priv = dev_get_priv(dev);
870*4882a593Smuzhiyun struct usb_device *usb_dev;
871*4882a593Smuzhiyun int ret;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun priv->flags = dev->driver_data;
874*4882a593Smuzhiyun ret = usb_ether_register(dev, &priv->ueth, AX_RX_URB_SIZE);
875*4882a593Smuzhiyun if (ret)
876*4882a593Smuzhiyun return ret;
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun usb_dev = priv->ueth.pusb_dev;
879*4882a593Smuzhiyun priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT];
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun /* Get the MAC address */
882*4882a593Smuzhiyun ret = asix_read_mac(&priv->ueth, pdata->enetaddr);
883*4882a593Smuzhiyun if (ret)
884*4882a593Smuzhiyun return ret;
885*4882a593Smuzhiyun debug("MAC %pM\n", pdata->enetaddr);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun return 0;
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun static const struct eth_ops ax88179_eth_ops = {
891*4882a593Smuzhiyun .start = ax88179_eth_start,
892*4882a593Smuzhiyun .send = ax88179_eth_send,
893*4882a593Smuzhiyun .recv = ax88179_eth_recv,
894*4882a593Smuzhiyun .free_pkt = ax88179_free_pkt,
895*4882a593Smuzhiyun .stop = ax88179_eth_stop,
896*4882a593Smuzhiyun .write_hwaddr = ax88179_write_hwaddr,
897*4882a593Smuzhiyun };
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun U_BOOT_DRIVER(ax88179_eth) = {
900*4882a593Smuzhiyun .name = "ax88179_eth",
901*4882a593Smuzhiyun .id = UCLASS_ETH,
902*4882a593Smuzhiyun .probe = ax88179_eth_probe,
903*4882a593Smuzhiyun .ops = &ax88179_eth_ops,
904*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct asix_private),
905*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct eth_pdata),
906*4882a593Smuzhiyun };
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun static const struct usb_device_id ax88179_eth_id_table[] = {
909*4882a593Smuzhiyun { USB_DEVICE(0x0b95, 0x1790), .driver_info = FLAG_TYPE_AX88179 },
910*4882a593Smuzhiyun { USB_DEVICE(0x0b95, 0x178a), .driver_info = FLAG_TYPE_AX88178a },
911*4882a593Smuzhiyun { USB_DEVICE(0x2001, 0x4a00), .driver_info = FLAG_TYPE_DLINK_DUB1312 },
912*4882a593Smuzhiyun { USB_DEVICE(0x0df6, 0x0072), .driver_info = FLAG_TYPE_SITECOM },
913*4882a593Smuzhiyun { USB_DEVICE(0x04e8, 0xa100), .driver_info = FLAG_TYPE_SAMSUNG },
914*4882a593Smuzhiyun { USB_DEVICE(0x17ef, 0x304b), .driver_info = FLAG_TYPE_LENOVO },
915*4882a593Smuzhiyun { USB_DEVICE(0x04b4, 0x3610), .driver_info = FLAG_TYPE_GX3 },
916*4882a593Smuzhiyun { } /* Terminating entry */
917*4882a593Smuzhiyun };
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun U_BOOT_USB_DEVICE(ax88179_eth, ax88179_eth_id_table);
920*4882a593Smuzhiyun #endif /* !CONFIG_DM_ETH */
921