xref: /OK3568_Linux_fs/u-boot/drivers/usb/cdns3/drd.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Cadence USBSS DRD Driver.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018-2019 Cadence.
6*4882a593Smuzhiyun  * Copyright (C) 2019 Texas Instruments
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Author: Pawel Laszczak <pawell@cadence.com>
9*4882a593Smuzhiyun  *         Roger Quadros <rogerq@ti.com>
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #include <dm.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/iopoll.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/usb/otg.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "gadget.h"
20*4882a593Smuzhiyun #include "drd.h"
21*4882a593Smuzhiyun #include "core.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define readl_poll_timeout_atomic readl_poll_timeout
24*4882a593Smuzhiyun #define usleep_range(a, b) udelay((b))
25*4882a593Smuzhiyun /**
26*4882a593Smuzhiyun  * cdns3_set_mode - change mode of OTG Core
27*4882a593Smuzhiyun  * @cdns: pointer to context structure
28*4882a593Smuzhiyun  * @mode: selected mode from cdns_role
29*4882a593Smuzhiyun  *
30*4882a593Smuzhiyun  * Returns 0 on success otherwise negative errno
31*4882a593Smuzhiyun  */
cdns3_set_mode(struct cdns3 * cdns,enum usb_dr_mode mode)32*4882a593Smuzhiyun int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	int ret = 0;
35*4882a593Smuzhiyun 	u32 reg;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	switch (mode) {
38*4882a593Smuzhiyun 	case USB_DR_MODE_PERIPHERAL:
39*4882a593Smuzhiyun 		break;
40*4882a593Smuzhiyun 	case USB_DR_MODE_HOST:
41*4882a593Smuzhiyun 		break;
42*4882a593Smuzhiyun 	case USB_DR_MODE_OTG:
43*4882a593Smuzhiyun 		dev_dbg(cdns->dev, "Set controller to OTG mode\n");
44*4882a593Smuzhiyun 		if (cdns->version == CDNS3_CONTROLLER_V1) {
45*4882a593Smuzhiyun 			reg = readl(&cdns->otg_v1_regs->override);
46*4882a593Smuzhiyun 			reg |= OVERRIDE_IDPULLUP;
47*4882a593Smuzhiyun 			writel(reg, &cdns->otg_v1_regs->override);
48*4882a593Smuzhiyun 		} else {
49*4882a593Smuzhiyun 			reg = readl(&cdns->otg_v0_regs->ctrl1);
50*4882a593Smuzhiyun 			reg |= OVERRIDE_IDPULLUP_V0;
51*4882a593Smuzhiyun 			writel(reg, &cdns->otg_v0_regs->ctrl1);
52*4882a593Smuzhiyun 		}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 		/*
55*4882a593Smuzhiyun 		 * Hardware specification says: "ID_VALUE must be valid within
56*4882a593Smuzhiyun 		 * 50ms after idpullup is set to '1" so driver must wait
57*4882a593Smuzhiyun 		 * 50ms before reading this pin.
58*4882a593Smuzhiyun 		 */
59*4882a593Smuzhiyun 		usleep_range(50000, 60000);
60*4882a593Smuzhiyun 		break;
61*4882a593Smuzhiyun 	default:
62*4882a593Smuzhiyun 		dev_err(cdns->dev, "Unsupported mode of operation %d\n", mode);
63*4882a593Smuzhiyun 		return -EINVAL;
64*4882a593Smuzhiyun 	}
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	return ret;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun 
cdns3_get_id(struct cdns3 * cdns)69*4882a593Smuzhiyun int cdns3_get_id(struct cdns3 *cdns)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	int id;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	id = readl(&cdns->otg_regs->sts) & OTGSTS_ID_VALUE;
74*4882a593Smuzhiyun 	dev_dbg(cdns->dev, "OTG ID: %d", id);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	return id;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
cdns3_get_vbus(struct cdns3 * cdns)79*4882a593Smuzhiyun int cdns3_get_vbus(struct cdns3 *cdns)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	int vbus;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	vbus = !!(readl(&cdns->otg_regs->sts) & OTGSTS_VBUS_VALID);
84*4882a593Smuzhiyun 	dev_dbg(cdns->dev, "OTG VBUS: %d", vbus);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	return vbus;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
cdns3_is_host(struct cdns3 * cdns)89*4882a593Smuzhiyun int cdns3_is_host(struct cdns3 *cdns)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	if (cdns->dr_mode == USB_DR_MODE_HOST)
92*4882a593Smuzhiyun 		return 1;
93*4882a593Smuzhiyun 	else if (!cdns3_get_id(cdns))
94*4882a593Smuzhiyun 		return 1;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
cdns3_is_device(struct cdns3 * cdns)99*4882a593Smuzhiyun int cdns3_is_device(struct cdns3 *cdns)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	if (cdns->dr_mode == USB_DR_MODE_PERIPHERAL)
102*4882a593Smuzhiyun 		return 1;
103*4882a593Smuzhiyun 	else if (cdns->dr_mode == USB_DR_MODE_OTG)
104*4882a593Smuzhiyun 		if (cdns3_get_id(cdns))
105*4882a593Smuzhiyun 			return 1;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /**
111*4882a593Smuzhiyun  * cdns3_drd_switch_host - start/stop host
112*4882a593Smuzhiyun  * @cdns: Pointer to controller context structure
113*4882a593Smuzhiyun  * @on: 1 for start, 0 for stop
114*4882a593Smuzhiyun  *
115*4882a593Smuzhiyun  * Returns 0 on success otherwise negative errno
116*4882a593Smuzhiyun  */
cdns3_drd_switch_host(struct cdns3 * cdns,int on)117*4882a593Smuzhiyun int cdns3_drd_switch_host(struct cdns3 *cdns, int on)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	int ret, val;
120*4882a593Smuzhiyun 	u32 reg = OTGCMD_OTG_DIS;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	/* switch OTG core */
123*4882a593Smuzhiyun 	if (on) {
124*4882a593Smuzhiyun 		writel(OTGCMD_HOST_BUS_REQ | reg, &cdns->otg_regs->cmd);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 		dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n");
127*4882a593Smuzhiyun 		ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
128*4882a593Smuzhiyun 						val & OTGSTS_XHCI_READY,
129*4882a593Smuzhiyun 						100000);
130*4882a593Smuzhiyun 		if (ret) {
131*4882a593Smuzhiyun 			dev_err(cdns->dev, "timeout waiting for xhci_ready\n");
132*4882a593Smuzhiyun 			return ret;
133*4882a593Smuzhiyun 		}
134*4882a593Smuzhiyun 	} else {
135*4882a593Smuzhiyun 		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
136*4882a593Smuzhiyun 		       OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
137*4882a593Smuzhiyun 		       &cdns->otg_regs->cmd);
138*4882a593Smuzhiyun 		/* Waiting till H_IDLE state.*/
139*4882a593Smuzhiyun 		readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
140*4882a593Smuzhiyun 					  !(val & OTGSTATE_HOST_STATE_MASK),
141*4882a593Smuzhiyun 					  2000000);
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun /**
148*4882a593Smuzhiyun  * cdns3_drd_switch_gadget - start/stop gadget
149*4882a593Smuzhiyun  * @cdns: Pointer to controller context structure
150*4882a593Smuzhiyun  * @on: 1 for start, 0 for stop
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  * Returns 0 on success otherwise negative errno
153*4882a593Smuzhiyun  */
cdns3_drd_switch_gadget(struct cdns3 * cdns,int on)154*4882a593Smuzhiyun int cdns3_drd_switch_gadget(struct cdns3 *cdns, int on)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	int ret, val;
157*4882a593Smuzhiyun 	u32 reg = OTGCMD_OTG_DIS;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	/* switch OTG core */
160*4882a593Smuzhiyun 	if (on) {
161*4882a593Smuzhiyun 		writel(OTGCMD_DEV_BUS_REQ | reg, &cdns->otg_regs->cmd);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 		dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n");
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 		ret = readl_poll_timeout_atomic(&cdns->otg_regs->sts, val,
166*4882a593Smuzhiyun 						val & OTGSTS_DEV_READY,
167*4882a593Smuzhiyun 						100000);
168*4882a593Smuzhiyun 		if (ret) {
169*4882a593Smuzhiyun 			dev_err(cdns->dev, "timeout waiting for dev_ready\n");
170*4882a593Smuzhiyun 			return ret;
171*4882a593Smuzhiyun 		}
172*4882a593Smuzhiyun 	} else {
173*4882a593Smuzhiyun 		/*
174*4882a593Smuzhiyun 		 * driver should wait at least 10us after disabling Device
175*4882a593Smuzhiyun 		 * before turning-off Device (DEV_BUS_DROP)
176*4882a593Smuzhiyun 		 */
177*4882a593Smuzhiyun 		usleep_range(20, 30);
178*4882a593Smuzhiyun 		writel(OTGCMD_HOST_BUS_DROP | OTGCMD_DEV_BUS_DROP |
179*4882a593Smuzhiyun 		       OTGCMD_DEV_POWER_OFF | OTGCMD_HOST_POWER_OFF,
180*4882a593Smuzhiyun 		       &cdns->otg_regs->cmd);
181*4882a593Smuzhiyun 		/* Waiting till DEV_IDLE state.*/
182*4882a593Smuzhiyun 		readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
183*4882a593Smuzhiyun 					  !(val & OTGSTATE_DEV_STATE_MASK),
184*4882a593Smuzhiyun 					  2000000);
185*4882a593Smuzhiyun 	}
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun /**
191*4882a593Smuzhiyun  * cdns3_init_otg_mode - initialize drd controller
192*4882a593Smuzhiyun  * @cdns: Pointer to controller context structure
193*4882a593Smuzhiyun  *
194*4882a593Smuzhiyun  * Returns 0 on success otherwise negative errno
195*4882a593Smuzhiyun  */
cdns3_init_otg_mode(struct cdns3 * cdns)196*4882a593Smuzhiyun static int cdns3_init_otg_mode(struct cdns3 *cdns)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	int ret = 0;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	/* clear all interrupts */
201*4882a593Smuzhiyun 	writel(~0, &cdns->otg_regs->ivect);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	ret = cdns3_set_mode(cdns, USB_DR_MODE_OTG);
204*4882a593Smuzhiyun 	if (ret)
205*4882a593Smuzhiyun 		return ret;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return ret;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun  * cdns3_drd_update_mode - initialize mode of operation
212*4882a593Smuzhiyun  * @cdns: Pointer to controller context structure
213*4882a593Smuzhiyun  *
214*4882a593Smuzhiyun  * Returns 0 on success otherwise negative errno
215*4882a593Smuzhiyun  */
cdns3_drd_update_mode(struct cdns3 * cdns)216*4882a593Smuzhiyun int cdns3_drd_update_mode(struct cdns3 *cdns)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	int ret = 0;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	switch (cdns->dr_mode) {
221*4882a593Smuzhiyun 	case USB_DR_MODE_PERIPHERAL:
222*4882a593Smuzhiyun 		ret = cdns3_set_mode(cdns, USB_DR_MODE_PERIPHERAL);
223*4882a593Smuzhiyun 		break;
224*4882a593Smuzhiyun 	case USB_DR_MODE_HOST:
225*4882a593Smuzhiyun 		ret = cdns3_set_mode(cdns, USB_DR_MODE_HOST);
226*4882a593Smuzhiyun 		break;
227*4882a593Smuzhiyun 	case USB_DR_MODE_OTG:
228*4882a593Smuzhiyun 		ret = cdns3_init_otg_mode(cdns);
229*4882a593Smuzhiyun 		break;
230*4882a593Smuzhiyun 	default:
231*4882a593Smuzhiyun 		dev_err(cdns->dev, "Unsupported mode of operation %d\n",
232*4882a593Smuzhiyun 			cdns->dr_mode);
233*4882a593Smuzhiyun 		return -EINVAL;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	return ret;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
cdns3_drd_init(struct cdns3 * cdns)239*4882a593Smuzhiyun int cdns3_drd_init(struct cdns3 *cdns)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	void __iomem *regs;
242*4882a593Smuzhiyun 	int ret = 0;
243*4882a593Smuzhiyun 	u32 state;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	regs = dev_remap_addr_name(cdns->dev, "otg");
246*4882a593Smuzhiyun 	if (!regs)
247*4882a593Smuzhiyun 		return -EINVAL;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	/* Detection of DRD version. Controller has been released
250*4882a593Smuzhiyun 	 * in two versions. Both are similar, but they have same changes
251*4882a593Smuzhiyun 	 * in register maps.
252*4882a593Smuzhiyun 	 * The first register in old version is command register and it's read
253*4882a593Smuzhiyun 	 * only, so driver should read 0 from it. On the other hand, in v1
254*4882a593Smuzhiyun 	 * the first register contains device ID number which is not set to 0.
255*4882a593Smuzhiyun 	 * Driver uses this fact to detect the proper version of
256*4882a593Smuzhiyun 	 * controller.
257*4882a593Smuzhiyun 	 */
258*4882a593Smuzhiyun 	cdns->otg_v0_regs = regs;
259*4882a593Smuzhiyun 	if (!readl(&cdns->otg_v0_regs->cmd)) {
260*4882a593Smuzhiyun 		cdns->version  = CDNS3_CONTROLLER_V0;
261*4882a593Smuzhiyun 		cdns->otg_v1_regs = NULL;
262*4882a593Smuzhiyun 		cdns->otg_regs = regs;
263*4882a593Smuzhiyun 		writel(1, &cdns->otg_v0_regs->simulate);
264*4882a593Smuzhiyun 		dev_info(cdns->dev, "DRD version v0 (%08x)\n",
265*4882a593Smuzhiyun 			 readl(&cdns->otg_v0_regs->version));
266*4882a593Smuzhiyun 	} else {
267*4882a593Smuzhiyun 		cdns->otg_v0_regs = NULL;
268*4882a593Smuzhiyun 		cdns->otg_v1_regs = regs;
269*4882a593Smuzhiyun 		cdns->otg_regs = (void *)&cdns->otg_v1_regs->cmd;
270*4882a593Smuzhiyun 		cdns->version  = CDNS3_CONTROLLER_V1;
271*4882a593Smuzhiyun 		writel(1, &cdns->otg_v1_regs->simulate);
272*4882a593Smuzhiyun 		dev_info(cdns->dev, "DRD version v1 (ID: %08x, rev: %08x)\n",
273*4882a593Smuzhiyun 			 readl(&cdns->otg_v1_regs->did),
274*4882a593Smuzhiyun 			 readl(&cdns->otg_v1_regs->rid));
275*4882a593Smuzhiyun 	}
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	state = OTGSTS_STRAP(readl(&cdns->otg_regs->sts));
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	/* Update dr_mode according to STRAP configuration. */
280*4882a593Smuzhiyun 	cdns->dr_mode = USB_DR_MODE_OTG;
281*4882a593Smuzhiyun 	if (state == OTGSTS_STRAP_HOST) {
282*4882a593Smuzhiyun 		dev_dbg(cdns->dev, "Controller strapped to HOST\n");
283*4882a593Smuzhiyun 		cdns->dr_mode = USB_DR_MODE_HOST;
284*4882a593Smuzhiyun 	} else if (state == OTGSTS_STRAP_GADGET) {
285*4882a593Smuzhiyun 		dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n");
286*4882a593Smuzhiyun 		cdns->dr_mode = USB_DR_MODE_PERIPHERAL;
287*4882a593Smuzhiyun 	}
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	state = readl(&cdns->otg_regs->sts);
290*4882a593Smuzhiyun 	if (OTGSTS_OTG_NRDY(state) != 0) {
291*4882a593Smuzhiyun 		dev_err(cdns->dev, "Cadence USB3 OTG device not ready\n");
292*4882a593Smuzhiyun 		return -ENODEV;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return ret;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
cdns3_drd_exit(struct cdns3 * cdns)298*4882a593Smuzhiyun int cdns3_drd_exit(struct cdns3 *cdns)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	return 0;
301*4882a593Smuzhiyun }
302