1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <asm/io.h>
7*4882a593Smuzhiyun #include <clk.h>
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun //#include <dm/device_compat.h>
11*4882a593Smuzhiyun #include <linux/bitops.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define UFS_SS_CTRL 0x4
15*4882a593Smuzhiyun #define UFS_SS_RST_N_PCS BIT(0)
16*4882a593Smuzhiyun #define UFS_SS_CLK_26MHZ BIT(4)
17*4882a593Smuzhiyun
ti_j721e_ufs_probe(struct udevice * dev)18*4882a593Smuzhiyun static int ti_j721e_ufs_probe(struct udevice *dev)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun void __iomem *base;
21*4882a593Smuzhiyun unsigned int clock;
22*4882a593Smuzhiyun struct clk clk;
23*4882a593Smuzhiyun u32 reg = 0;
24*4882a593Smuzhiyun int ret;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun ret = clk_get_by_index(dev, 0, &clk);
27*4882a593Smuzhiyun if (ret) {
28*4882a593Smuzhiyun dev_err(dev, "failed to get M-PHY clock\n");
29*4882a593Smuzhiyun return ret;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun clock = clk_get_rate(&clk);
33*4882a593Smuzhiyun if (IS_ERR_VALUE(clock)) {
34*4882a593Smuzhiyun dev_err(dev, "failed to get rate\n");
35*4882a593Smuzhiyun return ret;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun base = dev_remap_addr_index(dev, 0);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (clock == 26000000)
41*4882a593Smuzhiyun reg |= UFS_SS_CLK_26MHZ;
42*4882a593Smuzhiyun /* Take UFS slave device out of reset */
43*4882a593Smuzhiyun reg |= UFS_SS_RST_N_PCS;
44*4882a593Smuzhiyun writel(reg, base + UFS_SS_CTRL);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
ti_j721e_ufs_remove(struct udevice * dev)49*4882a593Smuzhiyun static int ti_j721e_ufs_remove(struct udevice *dev)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun void __iomem *base = dev_remap_addr_index(dev, 0);
52*4882a593Smuzhiyun u32 reg = readl(base + UFS_SS_CTRL);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun reg &= ~UFS_SS_RST_N_PCS;
55*4882a593Smuzhiyun writel(reg, base + UFS_SS_CTRL);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct udevice_id ti_j721e_ufs_ids[] = {
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun .compatible = "ti,j721e-ufs",
63*4882a593Smuzhiyun },
64*4882a593Smuzhiyun {},
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun U_BOOT_DRIVER(ti_j721e_ufs) = {
68*4882a593Smuzhiyun .name = "ti-j721e-ufs",
69*4882a593Smuzhiyun .id = UCLASS_MISC,
70*4882a593Smuzhiyun .of_match = ti_j721e_ufs_ids,
71*4882a593Smuzhiyun .probe = ti_j721e_ufs_probe,
72*4882a593Smuzhiyun .remove = ti_j721e_ufs_remove,
73*4882a593Smuzhiyun .flags = DM_FLAG_OS_PREPARE,
74*4882a593Smuzhiyun };
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