xref: /OK3568_Linux_fs/u-boot/drivers/tpm/tpm_tis_st33zp24_spi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * STMicroelectronics TPM ST33ZP24 SPI UBOOT driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2016 STMicroelectronics
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Description: Device driver for ST33ZP24 SPI TPM TCG.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * This device driver implements the TPM interface as defined in
9*4882a593Smuzhiyun  * the TCG TPM Interface Spec version 1.21, revision 1.0 and the
10*4882a593Smuzhiyun  * STMicroelectronics Protocol Stack Specification version 1.2.0.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <common.h>
16*4882a593Smuzhiyun #include <dm.h>
17*4882a593Smuzhiyun #include <fdtdec.h>
18*4882a593Smuzhiyun #include <spi.h>
19*4882a593Smuzhiyun #include <tpm.h>
20*4882a593Smuzhiyun #include <errno.h>
21*4882a593Smuzhiyun #include <linux/types.h>
22*4882a593Smuzhiyun #include <asm/unaligned.h>
23*4882a593Smuzhiyun #include <linux/compat.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include "tpm_tis.h"
26*4882a593Smuzhiyun #include "tpm_internal.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define TPM_ACCESS			0x0
29*4882a593Smuzhiyun #define TPM_STS				0x18
30*4882a593Smuzhiyun #define TPM_DATA_FIFO			0x24
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define LOCALITY0			0
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define TPM_DATA_FIFO				0x24
35*4882a593Smuzhiyun #define TPM_INTF_CAPABILITY			0x14
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define TPM_DUMMY_BYTE				0x00
38*4882a593Smuzhiyun #define TPM_WRITE_DIRECTION			0x80
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MAX_SPI_LATENCY				15
41*4882a593Smuzhiyun #define LOCALITY0				0
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define ST33ZP24_OK					0x5A
44*4882a593Smuzhiyun #define ST33ZP24_UNDEFINED_ERR				0x80
45*4882a593Smuzhiyun #define ST33ZP24_BADLOCALITY				0x81
46*4882a593Smuzhiyun #define ST33ZP24_TISREGISTER_UKNOWN			0x82
47*4882a593Smuzhiyun #define ST33ZP24_LOCALITY_NOT_ACTIVATED			0x83
48*4882a593Smuzhiyun #define ST33ZP24_HASH_END_BEFORE_HASH_START		0x84
49*4882a593Smuzhiyun #define ST33ZP24_BAD_COMMAND_ORDER			0x85
50*4882a593Smuzhiyun #define ST33ZP24_INCORECT_RECEIVED_LENGTH		0x86
51*4882a593Smuzhiyun #define ST33ZP24_TPM_FIFO_OVERFLOW			0x89
52*4882a593Smuzhiyun #define ST33ZP24_UNEXPECTED_READ_FIFO			0x8A
53*4882a593Smuzhiyun #define ST33ZP24_UNEXPECTED_WRITE_FIFO			0x8B
54*4882a593Smuzhiyun #define ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END	0x90
55*4882a593Smuzhiyun #define ST33ZP24_DUMMY_BYTES				0x00
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /*
58*4882a593Smuzhiyun  * TPM command can be up to 2048 byte, A TPM response can be up to
59*4882a593Smuzhiyun  * 1024 byte.
60*4882a593Smuzhiyun  * Between command and response, there are latency byte (up to 15
61*4882a593Smuzhiyun  * usually on st33zp24 2 are enough).
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * Overall when sending a command and expecting an answer we need if
64*4882a593Smuzhiyun  * worst case:
65*4882a593Smuzhiyun  * 2048 (for the TPM command) + 1024 (for the TPM answer).  We need
66*4882a593Smuzhiyun  * some latency byte before the answer is available (max 15).
67*4882a593Smuzhiyun  * We have 2048 + 1024 + 15.
68*4882a593Smuzhiyun  */
69*4882a593Smuzhiyun #define ST33ZP24_SPI_BUFFER_SIZE (TPM_BUFSIZE + (TPM_BUFSIZE / 2) +\
70*4882a593Smuzhiyun 				  MAX_SPI_LATENCY)
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct st33zp24_spi_phy {
73*4882a593Smuzhiyun 	int latency;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];
76*4882a593Smuzhiyun 	u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
st33zp24_spi_status_to_errno(u8 code)79*4882a593Smuzhiyun static int st33zp24_spi_status_to_errno(u8 code)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	switch (code) {
82*4882a593Smuzhiyun 	case ST33ZP24_OK:
83*4882a593Smuzhiyun 		return 0;
84*4882a593Smuzhiyun 	case ST33ZP24_UNDEFINED_ERR:
85*4882a593Smuzhiyun 	case ST33ZP24_BADLOCALITY:
86*4882a593Smuzhiyun 	case ST33ZP24_TISREGISTER_UKNOWN:
87*4882a593Smuzhiyun 	case ST33ZP24_LOCALITY_NOT_ACTIVATED:
88*4882a593Smuzhiyun 	case ST33ZP24_HASH_END_BEFORE_HASH_START:
89*4882a593Smuzhiyun 	case ST33ZP24_BAD_COMMAND_ORDER:
90*4882a593Smuzhiyun 	case ST33ZP24_UNEXPECTED_READ_FIFO:
91*4882a593Smuzhiyun 	case ST33ZP24_UNEXPECTED_WRITE_FIFO:
92*4882a593Smuzhiyun 	case ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END:
93*4882a593Smuzhiyun 		return -EPROTO;
94*4882a593Smuzhiyun 	case ST33ZP24_INCORECT_RECEIVED_LENGTH:
95*4882a593Smuzhiyun 	case ST33ZP24_TPM_FIFO_OVERFLOW:
96*4882a593Smuzhiyun 		return -EMSGSIZE;
97*4882a593Smuzhiyun 	case ST33ZP24_DUMMY_BYTES:
98*4882a593Smuzhiyun 		return -ENOSYS;
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	return code;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /*
104*4882a593Smuzhiyun  * st33zp24_spi_send
105*4882a593Smuzhiyun  * Send byte to TPM register according to the ST33ZP24 SPI protocol.
106*4882a593Smuzhiyun  * @param: tpm, the chip description
107*4882a593Smuzhiyun  * @param: tpm_register, the tpm tis register where the data should be written
108*4882a593Smuzhiyun  * @param: tpm_data, the tpm_data to write inside the tpm_register
109*4882a593Smuzhiyun  * @param: tpm_size, The length of the data
110*4882a593Smuzhiyun  * @return: should be zero if success else a negative error code.
111*4882a593Smuzhiyun  */
st33zp24_spi_write(struct udevice * dev,u8 tpm_register,const u8 * tpm_data,size_t tpm_size)112*4882a593Smuzhiyun static int st33zp24_spi_write(struct udevice *dev, u8 tpm_register,
113*4882a593Smuzhiyun 			      const u8 *tpm_data, size_t tpm_size)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	int total_length = 0, ret;
116*4882a593Smuzhiyun 	struct spi_slave *slave = dev_get_parent_priv(dev);
117*4882a593Smuzhiyun 	struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	u8 *tx_buf = (u8 *)phy->tx_buf;
120*4882a593Smuzhiyun 	u8 *rx_buf = phy->rx_buf;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	tx_buf[total_length++] = TPM_WRITE_DIRECTION | LOCALITY0;
123*4882a593Smuzhiyun 	tx_buf[total_length++] = tpm_register;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	if (tpm_size > 0 && tpm_register == TPM_DATA_FIFO) {
126*4882a593Smuzhiyun 		tx_buf[total_length++] = tpm_size >> 8;
127*4882a593Smuzhiyun 		tx_buf[total_length++] = tpm_size;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 	memcpy(tx_buf + total_length, tpm_data, tpm_size);
130*4882a593Smuzhiyun 	total_length += tpm_size;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	memset(tx_buf + total_length, TPM_DUMMY_BYTE, phy->latency);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	total_length += phy->latency;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	ret = spi_claim_bus(slave);
137*4882a593Smuzhiyun 	if (ret < 0)
138*4882a593Smuzhiyun 		return ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
141*4882a593Smuzhiyun 		       SPI_XFER_BEGIN | SPI_XFER_END);
142*4882a593Smuzhiyun 	if (ret < 0)
143*4882a593Smuzhiyun 		return ret;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	spi_release_bus(slave);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if (ret == 0)
148*4882a593Smuzhiyun 		ret = rx_buf[total_length - 1];
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	return st33zp24_spi_status_to_errno(ret);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun  * spi_st33zp24_spi_read8_reg
155*4882a593Smuzhiyun  * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
156*4882a593Smuzhiyun  * @param: tpm, the chip description
157*4882a593Smuzhiyun  * @param: tpm_loc, the locality to read register from
158*4882a593Smuzhiyun  * @param: tpm_register, the tpm tis register where the data should be read
159*4882a593Smuzhiyun  * @param: tpm_data, the TPM response
160*4882a593Smuzhiyun  * @param: tpm_size, tpm TPM response size to read.
161*4882a593Smuzhiyun  * @return: should be zero if success else a negative error code.
162*4882a593Smuzhiyun  */
st33zp24_spi_read8_reg(struct udevice * dev,u8 tpm_register,u8 * tpm_data,size_t tpm_size)163*4882a593Smuzhiyun static u8 st33zp24_spi_read8_reg(struct udevice *dev, u8 tpm_register,
164*4882a593Smuzhiyun 				 u8 *tpm_data, size_t tpm_size)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	int total_length = 0, ret;
167*4882a593Smuzhiyun 	struct spi_slave *slave = dev_get_parent_priv(dev);
168*4882a593Smuzhiyun 	struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	u8 *tx_buf = (u8 *)phy->tx_buf;
171*4882a593Smuzhiyun 	u8 *rx_buf = phy->rx_buf;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	/* Pre-Header */
174*4882a593Smuzhiyun 	tx_buf[total_length++] = LOCALITY0;
175*4882a593Smuzhiyun 	tx_buf[total_length++] = tpm_register;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	memset(&tx_buf[total_length], TPM_DUMMY_BYTE,
178*4882a593Smuzhiyun 	       phy->latency + tpm_size);
179*4882a593Smuzhiyun 	total_length += phy->latency + tpm_size;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	ret = spi_claim_bus(slave);
182*4882a593Smuzhiyun 	if (ret < 0)
183*4882a593Smuzhiyun 		return 0;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
186*4882a593Smuzhiyun 		       SPI_XFER_BEGIN | SPI_XFER_END);
187*4882a593Smuzhiyun 	if (ret < 0)
188*4882a593Smuzhiyun 		return 0;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	spi_release_bus(slave);
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	if (tpm_size > 0 && ret == 0) {
193*4882a593Smuzhiyun 		ret = rx_buf[total_length - tpm_size - 1];
194*4882a593Smuzhiyun 		memcpy(tpm_data, rx_buf + total_length - tpm_size, tpm_size);
195*4882a593Smuzhiyun 	}
196*4882a593Smuzhiyun 	return ret;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /*
200*4882a593Smuzhiyun  * st33zp24_spi_recv
201*4882a593Smuzhiyun  * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
202*4882a593Smuzhiyun  * @param: phy_id, the phy description
203*4882a593Smuzhiyun  * @param: tpm_register, the tpm tis register where the data should be read
204*4882a593Smuzhiyun  * @param: tpm_data, the TPM response
205*4882a593Smuzhiyun  * @param: tpm_size, tpm TPM response size to read.
206*4882a593Smuzhiyun  * @return: number of byte read successfully: should be one if success.
207*4882a593Smuzhiyun  */
st33zp24_spi_read(struct udevice * dev,u8 tpm_register,u8 * tpm_data,size_t tpm_size)208*4882a593Smuzhiyun static int st33zp24_spi_read(struct udevice *dev, u8 tpm_register,
209*4882a593Smuzhiyun 			     u8 *tpm_data, size_t tpm_size)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun 	int ret;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	ret = st33zp24_spi_read8_reg(dev, tpm_register, tpm_data, tpm_size);
214*4882a593Smuzhiyun 	if (!st33zp24_spi_status_to_errno(ret))
215*4882a593Smuzhiyun 		return tpm_size;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	return ret;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
st33zp24_spi_evaluate_latency(struct udevice * dev)220*4882a593Smuzhiyun static int st33zp24_spi_evaluate_latency(struct udevice *dev)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	int latency = 1, status = 0;
223*4882a593Smuzhiyun 	u8 data = 0;
224*4882a593Smuzhiyun 	struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	while (!status && latency < MAX_SPI_LATENCY) {
227*4882a593Smuzhiyun 		phy->latency = latency;
228*4882a593Smuzhiyun 		status = st33zp24_spi_read8_reg(dev, TPM_INTF_CAPABILITY,
229*4882a593Smuzhiyun 						&data, 1);
230*4882a593Smuzhiyun 		latency++;
231*4882a593Smuzhiyun 	}
232*4882a593Smuzhiyun 	if (status < 0)
233*4882a593Smuzhiyun 		return status;
234*4882a593Smuzhiyun 	if (latency == MAX_SPI_LATENCY)
235*4882a593Smuzhiyun 		return -ENODEV;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	return latency - 1;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun /*
241*4882a593Smuzhiyun  * st33zp24_spi_release_locality release the active locality
242*4882a593Smuzhiyun  * @param: chip, the tpm chip description.
243*4882a593Smuzhiyun  */
st33zp24_spi_release_locality(struct udevice * dev)244*4882a593Smuzhiyun static void st33zp24_spi_release_locality(struct udevice *dev)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun 	u8 data = TPM_ACCESS_ACTIVE_LOCALITY;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun  * st33zp24_spi_check_locality if the locality is active
253*4882a593Smuzhiyun  * @param: chip, the tpm chip description
254*4882a593Smuzhiyun  * @return: the active locality or -EACCES.
255*4882a593Smuzhiyun  */
st33zp24_spi_check_locality(struct udevice * dev)256*4882a593Smuzhiyun static int st33zp24_spi_check_locality(struct udevice *dev)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	u8 data;
259*4882a593Smuzhiyun 	u8 status;
260*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	status = st33zp24_spi_read(dev, TPM_ACCESS, &data, 1);
263*4882a593Smuzhiyun 	if (status && (data &
264*4882a593Smuzhiyun 		(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
265*4882a593Smuzhiyun 		(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
266*4882a593Smuzhiyun 		return chip->locality;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	return -EACCES;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun /*
272*4882a593Smuzhiyun  * st33zp24_spi_request_locality request the TPM locality
273*4882a593Smuzhiyun  * @param: chip, the chip description
274*4882a593Smuzhiyun  * @return: the active locality or negative value.
275*4882a593Smuzhiyun  */
st33zp24_spi_request_locality(struct udevice * dev)276*4882a593Smuzhiyun static int st33zp24_spi_request_locality(struct udevice *dev)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	unsigned long start, stop;
279*4882a593Smuzhiyun 	long ret;
280*4882a593Smuzhiyun 	u8 data;
281*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (st33zp24_spi_check_locality(dev) == chip->locality)
284*4882a593Smuzhiyun 		return chip->locality;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	data = TPM_ACCESS_REQUEST_USE;
287*4882a593Smuzhiyun 	ret = st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
288*4882a593Smuzhiyun 	if (ret < 0)
289*4882a593Smuzhiyun 		return ret;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	/* wait for locality activated */
292*4882a593Smuzhiyun 	start = get_timer(0);
293*4882a593Smuzhiyun 	stop = chip->timeout_a;
294*4882a593Smuzhiyun 	do {
295*4882a593Smuzhiyun 		if (st33zp24_spi_check_locality(dev) >= 0)
296*4882a593Smuzhiyun 			return chip->locality;
297*4882a593Smuzhiyun 		udelay(TPM_TIMEOUT_MS * 1000);
298*4882a593Smuzhiyun 	} while	 (get_timer(start) < stop);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	return -EACCES;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun /*
304*4882a593Smuzhiyun  * st33zp24_spi_status return the TPM_STS register
305*4882a593Smuzhiyun  * @param: chip, the tpm chip description
306*4882a593Smuzhiyun  * @return: the TPM_STS register value.
307*4882a593Smuzhiyun  */
st33zp24_spi_status(struct udevice * dev)308*4882a593Smuzhiyun static u8 st33zp24_spi_status(struct udevice *dev)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	u8 data;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	st33zp24_spi_read(dev, TPM_STS, &data, 1);
313*4882a593Smuzhiyun 	return data;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun /*
317*4882a593Smuzhiyun  * st33zp24_spi_get_burstcount return the burstcount address 0x19 0x1A
318*4882a593Smuzhiyun  * @param: chip, the chip description
319*4882a593Smuzhiyun  * return: the burstcount or -TPM_DRIVER_ERR in case of error.
320*4882a593Smuzhiyun  */
st33zp24_spi_get_burstcount(struct udevice * dev)321*4882a593Smuzhiyun static int st33zp24_spi_get_burstcount(struct udevice *dev)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
324*4882a593Smuzhiyun 	unsigned long start, stop;
325*4882a593Smuzhiyun 	int burstcnt, status;
326*4882a593Smuzhiyun 	u8 tpm_reg, temp;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* wait for burstcount */
329*4882a593Smuzhiyun 	start = get_timer(0);
330*4882a593Smuzhiyun 	stop = chip->timeout_d;
331*4882a593Smuzhiyun 	do {
332*4882a593Smuzhiyun 		tpm_reg = TPM_STS + 1;
333*4882a593Smuzhiyun 		status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
334*4882a593Smuzhiyun 		if (status < 0)
335*4882a593Smuzhiyun 			return -EBUSY;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 		tpm_reg = TPM_STS + 2;
338*4882a593Smuzhiyun 		burstcnt = temp;
339*4882a593Smuzhiyun 		status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
340*4882a593Smuzhiyun 		if (status < 0)
341*4882a593Smuzhiyun 			return -EBUSY;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 		burstcnt |= temp << 8;
344*4882a593Smuzhiyun 		if (burstcnt)
345*4882a593Smuzhiyun 			return burstcnt;
346*4882a593Smuzhiyun 		udelay(TIS_SHORT_TIMEOUT_MS * 1000);
347*4882a593Smuzhiyun 	} while (get_timer(start) < stop);
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	return -EBUSY;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun /*
353*4882a593Smuzhiyun  * st33zp24_spi_cancel, cancel the current command execution or
354*4882a593Smuzhiyun  * set STS to COMMAND READY.
355*4882a593Smuzhiyun  * @param: chip, tpm_chip description.
356*4882a593Smuzhiyun  */
st33zp24_spi_cancel(struct udevice * dev)357*4882a593Smuzhiyun static void st33zp24_spi_cancel(struct udevice *dev)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun 	u8 data;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	data = TPM_STS_COMMAND_READY;
362*4882a593Smuzhiyun 	st33zp24_spi_write(dev, TPM_STS, &data, 1);
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun /*
366*4882a593Smuzhiyun  * st33zp24_spi_wait_for_stat wait for a TPM_STS value
367*4882a593Smuzhiyun  * @param: chip, the tpm chip description
368*4882a593Smuzhiyun  * @param: mask, the value mask to wait
369*4882a593Smuzhiyun  * @param: timeout, the timeout
370*4882a593Smuzhiyun  * @param: status,
371*4882a593Smuzhiyun  * @return: the tpm status, 0 if success, -ETIME if timeout is reached.
372*4882a593Smuzhiyun  */
st33zp24_spi_wait_for_stat(struct udevice * dev,u8 mask,unsigned long timeout,int * status)373*4882a593Smuzhiyun static int st33zp24_spi_wait_for_stat(struct udevice *dev, u8 mask,
374*4882a593Smuzhiyun 				  unsigned long timeout, int *status)
375*4882a593Smuzhiyun {
376*4882a593Smuzhiyun 	unsigned long start, stop;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	/* Check current status */
379*4882a593Smuzhiyun 	*status = st33zp24_spi_status(dev);
380*4882a593Smuzhiyun 	if ((*status & mask) == mask)
381*4882a593Smuzhiyun 		return 0;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	start = get_timer(0);
384*4882a593Smuzhiyun 	stop = timeout;
385*4882a593Smuzhiyun 	do {
386*4882a593Smuzhiyun 		udelay(TPM_TIMEOUT_MS * 1000);
387*4882a593Smuzhiyun 		*status = st33zp24_spi_status(dev);
388*4882a593Smuzhiyun 		if ((*status & mask) == mask)
389*4882a593Smuzhiyun 			return 0;
390*4882a593Smuzhiyun 	} while (get_timer(start) < stop);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	return -ETIME;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun /*
396*4882a593Smuzhiyun  * st33zp24_spi_recv_data receive data
397*4882a593Smuzhiyun  * @param: chip, the tpm chip description
398*4882a593Smuzhiyun  * @param: buf, the buffer where the data are received
399*4882a593Smuzhiyun  * @param: count, the number of data to receive
400*4882a593Smuzhiyun  * @return: the number of bytes read from TPM FIFO.
401*4882a593Smuzhiyun  */
st33zp24_spi_recv_data(struct udevice * dev,u8 * buf,size_t count)402*4882a593Smuzhiyun static int st33zp24_spi_recv_data(struct udevice *dev, u8 *buf, size_t count)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
405*4882a593Smuzhiyun 	int size = 0, burstcnt, len, ret, status;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	while (size < count &&
408*4882a593Smuzhiyun 	       st33zp24_spi_wait_for_stat(dev, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
409*4882a593Smuzhiyun 				chip->timeout_c, &status) == 0) {
410*4882a593Smuzhiyun 		burstcnt = st33zp24_spi_get_burstcount(dev);
411*4882a593Smuzhiyun 		if (burstcnt < 0)
412*4882a593Smuzhiyun 			return burstcnt;
413*4882a593Smuzhiyun 		len = min_t(int, burstcnt, count - size);
414*4882a593Smuzhiyun 		ret = st33zp24_spi_read(dev, TPM_DATA_FIFO, buf + size, len);
415*4882a593Smuzhiyun 		if (ret < 0)
416*4882a593Smuzhiyun 			return ret;
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 		size += len;
419*4882a593Smuzhiyun 	}
420*4882a593Smuzhiyun 	return size;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun /*
424*4882a593Smuzhiyun  * st33zp24_spi_recv received TPM response through TPM phy.
425*4882a593Smuzhiyun  * @param: chip, tpm_chip description.
426*4882a593Smuzhiyun  * @param: buf,	the buffer to store data.
427*4882a593Smuzhiyun  * @param: count, the number of bytes that can received (sizeof buf).
428*4882a593Smuzhiyun  * @return: Returns zero in case of success else -EIO.
429*4882a593Smuzhiyun  */
st33zp24_spi_recv(struct udevice * dev,u8 * buf,size_t count)430*4882a593Smuzhiyun static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
433*4882a593Smuzhiyun 	int size, expected;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	if (!chip)
436*4882a593Smuzhiyun 		return -ENODEV;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	if (count < TPM_HEADER_SIZE) {
439*4882a593Smuzhiyun 		size = -EIO;
440*4882a593Smuzhiyun 		goto out;
441*4882a593Smuzhiyun 	}
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	size = st33zp24_spi_recv_data(dev, buf, TPM_HEADER_SIZE);
444*4882a593Smuzhiyun 	if (size < TPM_HEADER_SIZE) {
445*4882a593Smuzhiyun 		debug("TPM error, unable to read header\n");
446*4882a593Smuzhiyun 		goto out;
447*4882a593Smuzhiyun 	}
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	expected = get_unaligned_be32(buf + 2);
450*4882a593Smuzhiyun 	if (expected > count) {
451*4882a593Smuzhiyun 		size = -EIO;
452*4882a593Smuzhiyun 		goto out;
453*4882a593Smuzhiyun 	}
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	size += st33zp24_spi_recv_data(dev, &buf[TPM_HEADER_SIZE],
456*4882a593Smuzhiyun 				   expected - TPM_HEADER_SIZE);
457*4882a593Smuzhiyun 	if (size < expected) {
458*4882a593Smuzhiyun 		debug("TPM error, unable to read remaining bytes of result\n");
459*4882a593Smuzhiyun 		size = -EIO;
460*4882a593Smuzhiyun 		goto out;
461*4882a593Smuzhiyun 	}
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun out:
464*4882a593Smuzhiyun 	st33zp24_spi_cancel(dev);
465*4882a593Smuzhiyun 	st33zp24_spi_release_locality(dev);
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	return size;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun /*
471*4882a593Smuzhiyun  * st33zp24_spi_send send TPM commands through TPM phy.
472*4882a593Smuzhiyun  * @param: chip, tpm_chip description.
473*4882a593Smuzhiyun  * @param: buf,	the buffer to send.
474*4882a593Smuzhiyun  * @param: len, the number of bytes to send.
475*4882a593Smuzhiyun  * @return: Returns zero in case of success else the negative error code.
476*4882a593Smuzhiyun  */
st33zp24_spi_send(struct udevice * dev,const u8 * buf,size_t len)477*4882a593Smuzhiyun static int st33zp24_spi_send(struct udevice *dev, const u8 *buf, size_t len)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
480*4882a593Smuzhiyun 	u32 i, size;
481*4882a593Smuzhiyun 	int burstcnt, ret, status;
482*4882a593Smuzhiyun 	u8 data, tpm_stat;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	if (!chip)
485*4882a593Smuzhiyun 		return -ENODEV;
486*4882a593Smuzhiyun 	if (len < TPM_HEADER_SIZE)
487*4882a593Smuzhiyun 		return -EIO;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	ret = st33zp24_spi_request_locality(dev);
490*4882a593Smuzhiyun 	if (ret < 0)
491*4882a593Smuzhiyun 		return ret;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	tpm_stat = st33zp24_spi_status(dev);
494*4882a593Smuzhiyun 	if ((tpm_stat & TPM_STS_COMMAND_READY) == 0) {
495*4882a593Smuzhiyun 		st33zp24_spi_cancel(dev);
496*4882a593Smuzhiyun 		if (st33zp24_spi_wait_for_stat(dev, TPM_STS_COMMAND_READY,
497*4882a593Smuzhiyun 					       chip->timeout_b, &status) < 0) {
498*4882a593Smuzhiyun 			ret = -ETIME;
499*4882a593Smuzhiyun 			goto out_err;
500*4882a593Smuzhiyun 		}
501*4882a593Smuzhiyun 	}
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	for (i = 0; i < len - 1;) {
504*4882a593Smuzhiyun 		burstcnt = st33zp24_spi_get_burstcount(dev);
505*4882a593Smuzhiyun 		if (burstcnt < 0)
506*4882a593Smuzhiyun 			return burstcnt;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 		size = min_t(int, len - i - 1, burstcnt);
509*4882a593Smuzhiyun 		ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + i, size);
510*4882a593Smuzhiyun 		if (ret < 0)
511*4882a593Smuzhiyun 			goto out_err;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 		i += size;
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	tpm_stat = st33zp24_spi_status(dev);
517*4882a593Smuzhiyun 	if ((tpm_stat & TPM_STS_DATA_EXPECT) == 0) {
518*4882a593Smuzhiyun 		ret = -EIO;
519*4882a593Smuzhiyun 		goto out_err;
520*4882a593Smuzhiyun 	}
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + len - 1, 1);
523*4882a593Smuzhiyun 	if (ret < 0)
524*4882a593Smuzhiyun 		goto out_err;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	tpm_stat = st33zp24_spi_status(dev);
527*4882a593Smuzhiyun 	if ((tpm_stat & TPM_STS_DATA_EXPECT) != 0) {
528*4882a593Smuzhiyun 		ret = -EIO;
529*4882a593Smuzhiyun 		goto out_err;
530*4882a593Smuzhiyun 	}
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	data = TPM_STS_GO;
533*4882a593Smuzhiyun 	ret = st33zp24_spi_write(dev, TPM_STS, &data, 1);
534*4882a593Smuzhiyun 	if (ret < 0)
535*4882a593Smuzhiyun 		goto out_err;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	return len;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun out_err:
540*4882a593Smuzhiyun 	st33zp24_spi_cancel(dev);
541*4882a593Smuzhiyun 	st33zp24_spi_release_locality(dev);
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	return ret;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
st33zp24_spi_cleanup(struct udevice * dev)546*4882a593Smuzhiyun static int st33zp24_spi_cleanup(struct udevice *dev)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun 	st33zp24_spi_cancel(dev);
549*4882a593Smuzhiyun 	/*
550*4882a593Smuzhiyun 	 * The TPM needs some time to clean up here,
551*4882a593Smuzhiyun 	 * so we sleep rather than keeping the bus busy
552*4882a593Smuzhiyun 	 */
553*4882a593Smuzhiyun 	mdelay(2);
554*4882a593Smuzhiyun 	st33zp24_spi_release_locality(dev);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	return 0;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
st33zp24_spi_init(struct udevice * dev)559*4882a593Smuzhiyun static int st33zp24_spi_init(struct udevice *dev)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
562*4882a593Smuzhiyun 	struct st33zp24_spi_phy *phy = dev_get_platdata(dev);
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	chip->is_open = 1;
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	/* Default timeouts - these could move to the device tree */
567*4882a593Smuzhiyun 	chip->timeout_a = TIS_SHORT_TIMEOUT_MS;
568*4882a593Smuzhiyun 	chip->timeout_b = TIS_LONG_TIMEOUT_MS;
569*4882a593Smuzhiyun 	chip->timeout_c = TIS_SHORT_TIMEOUT_MS;
570*4882a593Smuzhiyun 	chip->timeout_d = TIS_SHORT_TIMEOUT_MS;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	chip->locality = LOCALITY0;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	phy->latency = st33zp24_spi_evaluate_latency(dev);
575*4882a593Smuzhiyun 	if (phy->latency <= 0)
576*4882a593Smuzhiyun 		return -ENODEV;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	/*
579*4882a593Smuzhiyun 	 * A timeout query to TPM can be placed here.
580*4882a593Smuzhiyun 	 * Standard timeout values are used so far
581*4882a593Smuzhiyun 	 */
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	return 0;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun 
st33zp24_spi_open(struct udevice * dev)586*4882a593Smuzhiyun static int st33zp24_spi_open(struct udevice *dev)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
589*4882a593Smuzhiyun 	int rc;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	debug("%s: start\n", __func__);
592*4882a593Smuzhiyun 	if (chip->is_open)
593*4882a593Smuzhiyun 		return -EBUSY;
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	rc = st33zp24_spi_init(dev);
596*4882a593Smuzhiyun 	if (rc < 0)
597*4882a593Smuzhiyun 		chip->is_open = 0;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	return rc;
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun 
st33zp24_spi_close(struct udevice * dev)602*4882a593Smuzhiyun static int st33zp24_spi_close(struct udevice *dev)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	if (chip->is_open) {
607*4882a593Smuzhiyun 		st33zp24_spi_release_locality(dev);
608*4882a593Smuzhiyun 		chip->is_open = 0;
609*4882a593Smuzhiyun 		chip->vend_dev = 0;
610*4882a593Smuzhiyun 	}
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 	return 0;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun 
st33zp24_spi_get_desc(struct udevice * dev,char * buf,int size)615*4882a593Smuzhiyun static int st33zp24_spi_get_desc(struct udevice *dev, char *buf, int size)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	struct tpm_chip *chip = dev_get_priv(dev);
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	if (size < 50)
620*4882a593Smuzhiyun 		return -ENOSPC;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	return snprintf(buf, size, "1.2 TPM (%s, chip type %s device-id 0x%x)",
623*4882a593Smuzhiyun 			chip->is_open ? "open" : "closed",
624*4882a593Smuzhiyun 			dev->name,
625*4882a593Smuzhiyun 			chip->vend_dev >> 16);
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun const struct tpm_ops st33zp24_spi_tpm_ops = {
629*4882a593Smuzhiyun 	.open = st33zp24_spi_open,
630*4882a593Smuzhiyun 	.close = st33zp24_spi_close,
631*4882a593Smuzhiyun 	.recv = st33zp24_spi_recv,
632*4882a593Smuzhiyun 	.send = st33zp24_spi_send,
633*4882a593Smuzhiyun 	.cleanup = st33zp24_spi_cleanup,
634*4882a593Smuzhiyun 	.get_desc = st33zp24_spi_get_desc,
635*4882a593Smuzhiyun };
636*4882a593Smuzhiyun 
st33zp24_spi_probe(struct udevice * dev)637*4882a593Smuzhiyun static int st33zp24_spi_probe(struct udevice *dev)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun 	struct tpm_chip_priv *uc_priv = dev_get_uclass_priv(dev);
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	uc_priv->duration_ms[TPM_SHORT] = TIS_SHORT_TIMEOUT_MS;
642*4882a593Smuzhiyun 	uc_priv->duration_ms[TPM_MEDIUM] = TIS_LONG_TIMEOUT_MS;
643*4882a593Smuzhiyun 	uc_priv->duration_ms[TPM_LONG] = TIS_LONG_TIMEOUT_MS;
644*4882a593Smuzhiyun 	uc_priv->retry_time_ms = TPM_TIMEOUT_MS;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	debug("ST33ZP24 SPI TPM from STMicroelectronics found\n");
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	return 0;
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun 
st33zp24_spi_remove(struct udevice * dev)651*4882a593Smuzhiyun static int st33zp24_spi_remove(struct udevice *dev)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	st33zp24_spi_release_locality(dev);
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	return 0;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun static const struct udevice_id st33zp24_spi_ids[] = {
659*4882a593Smuzhiyun 	{ .compatible = "st,st33zp24-spi" },
660*4882a593Smuzhiyun 	{ }
661*4882a593Smuzhiyun };
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun U_BOOT_DRIVER(st33zp24_spi_spi) = {
664*4882a593Smuzhiyun 	.name   = "st33zp24-spi",
665*4882a593Smuzhiyun 	.id     = UCLASS_TPM,
666*4882a593Smuzhiyun 	.of_match = of_match_ptr(st33zp24_spi_ids),
667*4882a593Smuzhiyun 	.probe  = st33zp24_spi_probe,
668*4882a593Smuzhiyun 	.remove = st33zp24_spi_remove,
669*4882a593Smuzhiyun 	.ops = &st33zp24_spi_tpm_ops,
670*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct tpm_chip),
671*4882a593Smuzhiyun 	.platdata_auto_alloc_size = sizeof(struct st33zp24_spi_phy),
672*4882a593Smuzhiyun };
673