1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2011 Infineon Technologies 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Authors: 5*4882a593Smuzhiyun * Peter Huewe <huewe.external@infineon.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Version: 2.1.1 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Description: 10*4882a593Smuzhiyun * Device driver for TCG/TCPA TPM (trusted platform module). 11*4882a593Smuzhiyun * Specifications at www.trustedcomputinggroup.org 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * It is based on the Linux kernel driver tpm.c from Leendert van 14*4882a593Smuzhiyun * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef _TPM_TIS_I2C_H 20*4882a593Smuzhiyun #define _TPM_TIS_I2C_H 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include <linux/compiler.h> 23*4882a593Smuzhiyun #include <linux/types.h> 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun enum tpm_timeout { 26*4882a593Smuzhiyun TPM_TIMEOUT_MS = 5, 27*4882a593Smuzhiyun TIS_SHORT_TIMEOUT_MS = 750, 28*4882a593Smuzhiyun TIS_LONG_TIMEOUT_MS = 2000, 29*4882a593Smuzhiyun SLEEP_DURATION_US = 60, 30*4882a593Smuzhiyun SLEEP_DURATION_LONG_US = 210, 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Size of external transmit buffer (used in tpm_transmit)*/ 34*4882a593Smuzhiyun #define TPM_BUFSIZE 4096 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* Index of Count field in TPM response buffer */ 37*4882a593Smuzhiyun #define TPM_RSP_SIZE_BYTE 2 38*4882a593Smuzhiyun #define TPM_RSP_RC_BYTE 6 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun struct tpm_chip { 41*4882a593Smuzhiyun int is_open; 42*4882a593Smuzhiyun int locality; 43*4882a593Smuzhiyun u32 vend_dev; 44*4882a593Smuzhiyun unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* msec */ 45*4882a593Smuzhiyun ulong chip_type; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct tpm_input_header { 49*4882a593Smuzhiyun __be16 tag; 50*4882a593Smuzhiyun __be32 length; 51*4882a593Smuzhiyun __be32 ordinal; 52*4882a593Smuzhiyun } __packed; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun struct tpm_output_header { 55*4882a593Smuzhiyun __be16 tag; 56*4882a593Smuzhiyun __be32 length; 57*4882a593Smuzhiyun __be32 return_code; 58*4882a593Smuzhiyun } __packed; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun struct timeout_t { 61*4882a593Smuzhiyun __be32 a; 62*4882a593Smuzhiyun __be32 b; 63*4882a593Smuzhiyun __be32 c; 64*4882a593Smuzhiyun __be32 d; 65*4882a593Smuzhiyun } __packed; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun struct duration_t { 68*4882a593Smuzhiyun __be32 tpm_short; 69*4882a593Smuzhiyun __be32 tpm_medium; 70*4882a593Smuzhiyun __be32 tpm_long; 71*4882a593Smuzhiyun } __packed; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun union cap_t { 74*4882a593Smuzhiyun struct timeout_t timeout; 75*4882a593Smuzhiyun struct duration_t duration; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun struct tpm_getcap_params_in { 79*4882a593Smuzhiyun __be32 cap; 80*4882a593Smuzhiyun __be32 subcap_size; 81*4882a593Smuzhiyun __be32 subcap; 82*4882a593Smuzhiyun } __packed; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct tpm_getcap_params_out { 85*4882a593Smuzhiyun __be32 cap_size; 86*4882a593Smuzhiyun union cap_t cap; 87*4882a593Smuzhiyun } __packed; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun union tpm_cmd_header { 90*4882a593Smuzhiyun struct tpm_input_header in; 91*4882a593Smuzhiyun struct tpm_output_header out; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun union tpm_cmd_params { 95*4882a593Smuzhiyun struct tpm_getcap_params_out getcap_out; 96*4882a593Smuzhiyun struct tpm_getcap_params_in getcap_in; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun struct tpm_cmd_t { 100*4882a593Smuzhiyun union tpm_cmd_header header; 101*4882a593Smuzhiyun union tpm_cmd_params params; 102*4882a593Smuzhiyun } __packed; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* Max number of iterations after i2c NAK */ 105*4882a593Smuzhiyun #define MAX_COUNT 3 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* 108*4882a593Smuzhiyun * Max number of iterations after i2c NAK for 'long' commands 109*4882a593Smuzhiyun * 110*4882a593Smuzhiyun * We need this especially for sending TPM_READY, since the cleanup after the 111*4882a593Smuzhiyun * transtion to the ready state may take some time, but it is unpredictable 112*4882a593Smuzhiyun * how long it will take. 113*4882a593Smuzhiyun */ 114*4882a593Smuzhiyun #define MAX_COUNT_LONG 50 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun enum tis_access { 117*4882a593Smuzhiyun TPM_ACCESS_VALID = 0x80, 118*4882a593Smuzhiyun TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 119*4882a593Smuzhiyun TPM_ACCESS_REQUEST_PENDING = 0x04, 120*4882a593Smuzhiyun TPM_ACCESS_REQUEST_USE = 0x02, 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun enum tis_status { 124*4882a593Smuzhiyun TPM_STS_VALID = 0x80, 125*4882a593Smuzhiyun TPM_STS_COMMAND_READY = 0x40, 126*4882a593Smuzhiyun TPM_STS_GO = 0x20, 127*4882a593Smuzhiyun TPM_STS_DATA_AVAIL = 0x10, 128*4882a593Smuzhiyun TPM_STS_DATA_EXPECT = 0x08, 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #endif 132