1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <fdtdec.h>
10*4882a593Smuzhiyun #include <timer.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <asm/arch-armv7/globaltimer.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun struct sti_timer_priv {
18*4882a593Smuzhiyun struct globaltimer *global_timer;
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
sti_timer_get_count(struct udevice * dev,u64 * count)21*4882a593Smuzhiyun static int sti_timer_get_count(struct udevice *dev, u64 *count)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun struct sti_timer_priv *priv = dev_get_priv(dev);
24*4882a593Smuzhiyun struct globaltimer *global_timer = priv->global_timer;
25*4882a593Smuzhiyun u32 low, high;
26*4882a593Smuzhiyun u64 timer;
27*4882a593Smuzhiyun u32 old = readl(&global_timer->cnt_h);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun while (1) {
30*4882a593Smuzhiyun low = readl(&global_timer->cnt_l);
31*4882a593Smuzhiyun high = readl(&global_timer->cnt_h);
32*4882a593Smuzhiyun if (old == high)
33*4882a593Smuzhiyun break;
34*4882a593Smuzhiyun else
35*4882a593Smuzhiyun old = high;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun timer = high;
38*4882a593Smuzhiyun *count = (u64)((timer << 32) | low);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return 0;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
sti_timer_probe(struct udevice * dev)43*4882a593Smuzhiyun static int sti_timer_probe(struct udevice *dev)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
46*4882a593Smuzhiyun struct sti_timer_priv *priv = dev_get_priv(dev);
47*4882a593Smuzhiyun fdt_addr_t addr;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* get arm global timer base address */
52*4882a593Smuzhiyun addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
53*4882a593Smuzhiyun priv->global_timer = (struct globaltimer *)addr;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* init timer */
56*4882a593Smuzhiyun writel(0x01, &priv->global_timer->ctl);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static const struct timer_ops sti_timer_ops = {
62*4882a593Smuzhiyun .get_count = sti_timer_get_count,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct udevice_id sti_timer_ids[] = {
66*4882a593Smuzhiyun { .compatible = "arm,cortex-a9-global-timer" },
67*4882a593Smuzhiyun {}
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun U_BOOT_DRIVER(sti_timer) = {
71*4882a593Smuzhiyun .name = "sti_timer",
72*4882a593Smuzhiyun .id = UCLASS_TIMER,
73*4882a593Smuzhiyun .of_match = sti_timer_ids,
74*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
75*4882a593Smuzhiyun .probe = sti_timer_probe,
76*4882a593Smuzhiyun .ops = &sti_timer_ops,
77*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
78*4882a593Smuzhiyun };
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