1*4882a593Smuzhiyunmenu "Timer Support" 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig TIMER 4*4882a593Smuzhiyun bool "Enable driver model for timer drivers" 5*4882a593Smuzhiyun depends on DM 6*4882a593Smuzhiyun help 7*4882a593Smuzhiyun Enable driver model for timer access. It uses the same API as 8*4882a593Smuzhiyun lib/time.c, but now implemented by the uclass. The first timer 9*4882a593Smuzhiyun will be used. The timer is usually a 32 bits free-running up 10*4882a593Smuzhiyun counter. There may be no real tick, and no timer interrupt. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunconfig SPL_TIMER 13*4882a593Smuzhiyun bool "Enable driver model for timer drivers in SPL" 14*4882a593Smuzhiyun depends on TIMER && SPL 15*4882a593Smuzhiyun help 16*4882a593Smuzhiyun Enable support for timer drivers in SPL. These can be used to get 17*4882a593Smuzhiyun a timer value when in SPL, or perhaps for implementing a delay 18*4882a593Smuzhiyun function. This enables the drivers in drivers/timer as part of an 19*4882a593Smuzhiyun SPL build. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyunconfig TPL_TIMER 22*4882a593Smuzhiyun bool "Enable driver model for timer drivers in TPL" 23*4882a593Smuzhiyun depends on TIMER && TPL 24*4882a593Smuzhiyun help 25*4882a593Smuzhiyun Enable support for timer drivers in TPL. These can be used to get 26*4882a593Smuzhiyun a timer value when in TPL, or perhaps for implementing a delay 27*4882a593Smuzhiyun function. This enables the drivers in drivers/timer as part of an 28*4882a593Smuzhiyun TPL build. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunconfig TIMER_EARLY 31*4882a593Smuzhiyun bool "Allow timer to be used early in U-Boot" 32*4882a593Smuzhiyun depends on TIMER 33*4882a593Smuzhiyun help 34*4882a593Smuzhiyun In some cases the timer must be accessible before driver model is 35*4882a593Smuzhiyun active. Examples include when using CONFIG_TRACE to trace U-Boot's 36*4882a593Smuzhiyun execution before driver model is set up. Enable this option to 37*4882a593Smuzhiyun use an early timer. These functions must be supported by your timer 38*4882a593Smuzhiyun driver: timer_early_get_count() and timer_early_get_rate(). 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunconfig ALTERA_TIMER 41*4882a593Smuzhiyun bool "Altera timer support" 42*4882a593Smuzhiyun depends on TIMER 43*4882a593Smuzhiyun help 44*4882a593Smuzhiyun Select this to enable a timer for Altera devices. Please find 45*4882a593Smuzhiyun details on the "Embedded Peripherals IP User Guide" of Altera. 46*4882a593Smuzhiyun 47*4882a593Smuzhiyunconfig ATMEL_PIT_TIMER 48*4882a593Smuzhiyun bool "Atmel periodic interval timer support" 49*4882a593Smuzhiyun depends on TIMER 50*4882a593Smuzhiyun help 51*4882a593Smuzhiyun Select this to enable a periodic interval timer for Atmel devices, 52*4882a593Smuzhiyun it is designed to offer maximum accuracy and efficient management, 53*4882a593Smuzhiyun even for systems with long response time. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyunconfig SANDBOX_TIMER 56*4882a593Smuzhiyun bool "Sandbox timer support" 57*4882a593Smuzhiyun depends on SANDBOX && TIMER 58*4882a593Smuzhiyun help 59*4882a593Smuzhiyun Select this to enable an emulated timer for sandbox. It gets 60*4882a593Smuzhiyun time from host os. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunconfig X86_TSC_TIMER 63*4882a593Smuzhiyun bool "x86 Time-Stamp Counter (TSC) timer support" 64*4882a593Smuzhiyun depends on TIMER && X86 65*4882a593Smuzhiyun help 66*4882a593Smuzhiyun Select this to enable Time-Stamp Counter (TSC) timer for x86. 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunconfig OMAP_TIMER 69*4882a593Smuzhiyun bool "Omap timer support" 70*4882a593Smuzhiyun depends on TIMER 71*4882a593Smuzhiyun help 72*4882a593Smuzhiyun Select this to enable an timer for Omap devices. 73*4882a593Smuzhiyun 74*4882a593Smuzhiyunconfig AST_TIMER 75*4882a593Smuzhiyun bool "Aspeed ast2400/ast2500 timer support" 76*4882a593Smuzhiyun depends on TIMER 77*4882a593Smuzhiyun default y if ARCH_ASPEED 78*4882a593Smuzhiyun help 79*4882a593Smuzhiyun Select this to enable timer for Aspeed ast2400/ast2500 devices. 80*4882a593Smuzhiyun This is a simple sys timer driver, it is compatible with lib/time.c, 81*4882a593Smuzhiyun but does not support any interrupts. Even though SoC has 8 hardware 82*4882a593Smuzhiyun counters, they are all treated as a single device by this driver. 83*4882a593Smuzhiyun This is mostly because they all share several registers which 84*4882a593Smuzhiyun makes it difficult to completely separate them. 85*4882a593Smuzhiyun 86*4882a593Smuzhiyunconfig STI_TIMER 87*4882a593Smuzhiyun bool "STi timer support" 88*4882a593Smuzhiyun depends on TIMER 89*4882a593Smuzhiyun default y if ARCH_STI 90*4882a593Smuzhiyun help 91*4882a593Smuzhiyun Select this to enable a timer for STi devices. 92*4882a593Smuzhiyun 93*4882a593Smuzhiyunconfig ARC_TIMER 94*4882a593Smuzhiyun bool "ARC timer support" 95*4882a593Smuzhiyun depends on TIMER && ARC && CLK 96*4882a593Smuzhiyun help 97*4882a593Smuzhiyun Select this to enable built-in ARC timers. 98*4882a593Smuzhiyun ARC cores may have up to 2 built-in timers: timer0 and timer1, 99*4882a593Smuzhiyun usually at least one of them exists. Either of them is supported 100*4882a593Smuzhiyun in U-Boot. 101*4882a593Smuzhiyun 102*4882a593Smuzhiyunconfig AG101P_TIMER 103*4882a593Smuzhiyun bool "AG101P timer support" 104*4882a593Smuzhiyun depends on TIMER && NDS32 105*4882a593Smuzhiyun help 106*4882a593Smuzhiyun Select this to enable a timer for AG01P devices. 107*4882a593Smuzhiyun 108*4882a593Smuzhiyunconfig AE3XX_TIMER 109*4882a593Smuzhiyun bool "AE3XX timer support" 110*4882a593Smuzhiyun depends on TIMER && NDS32 111*4882a593Smuzhiyun help 112*4882a593Smuzhiyun Select this to enable a timer for AE3XX devices. 113*4882a593Smuzhiyun 114*4882a593Smuzhiyunconfig ROCKCHIP_TIMER 115*4882a593Smuzhiyun bool "Rockchip timer support" 116*4882a593Smuzhiyun depends on TIMER 117*4882a593Smuzhiyun help 118*4882a593Smuzhiyun Select this to enable support for the timer found on 119*4882a593Smuzhiyun Rockchip devices. 120*4882a593Smuzhiyun 121*4882a593Smuzhiyunendmenu 122