1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2014 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Author: Nitin Garg <nitin.garg@freescale.com>
4*4882a593Smuzhiyun * Ye Li <Ye.Li@freescale.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <config.h>
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <div64.h>
12*4882a593Smuzhiyun #include <fuse.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <asm/arch/clock.h>
15*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
16*4882a593Smuzhiyun #include <dm.h>
17*4882a593Smuzhiyun #include <errno.h>
18*4882a593Smuzhiyun #include <malloc.h>
19*4882a593Smuzhiyun #include <linux/math64.h>
20*4882a593Smuzhiyun #include <thermal.h>
21*4882a593Smuzhiyun #include <imx_thermal.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* board will busyloop until this many degrees C below CPU max temperature */
24*4882a593Smuzhiyun #define TEMPERATURE_HOT_DELTA 5 /* CPU maxT - 5C */
25*4882a593Smuzhiyun #define FACTOR0 10000000
26*4882a593Smuzhiyun #define FACTOR1 15423
27*4882a593Smuzhiyun #define FACTOR2 4148468
28*4882a593Smuzhiyun #define OFFSET 3580661
29*4882a593Smuzhiyun #define MEASURE_FREQ 327
30*4882a593Smuzhiyun #define TEMPERATURE_MIN -40
31*4882a593Smuzhiyun #define TEMPERATURE_HOT 85
32*4882a593Smuzhiyun #define TEMPERATURE_MAX 125
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define TEMPSENSE0_TEMP_CNT_SHIFT 8
35*4882a593Smuzhiyun #define TEMPSENSE0_TEMP_CNT_MASK (0xfff << TEMPSENSE0_TEMP_CNT_SHIFT)
36*4882a593Smuzhiyun #define TEMPSENSE0_FINISHED (1 << 2)
37*4882a593Smuzhiyun #define TEMPSENSE0_MEASURE_TEMP (1 << 1)
38*4882a593Smuzhiyun #define TEMPSENSE0_POWER_DOWN (1 << 0)
39*4882a593Smuzhiyun #define MISC0_REFTOP_SELBIASOFF (1 << 3)
40*4882a593Smuzhiyun #define TEMPSENSE1_MEASURE_FREQ 0xffff
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct thermal_data {
43*4882a593Smuzhiyun unsigned int fuse;
44*4882a593Smuzhiyun int critical;
45*4882a593Smuzhiyun int minc;
46*4882a593Smuzhiyun int maxc;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #if defined(CONFIG_MX6)
read_cpu_temperature(struct udevice * dev)50*4882a593Smuzhiyun static int read_cpu_temperature(struct udevice *dev)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun int temperature;
53*4882a593Smuzhiyun unsigned int reg, n_meas;
54*4882a593Smuzhiyun const struct imx_thermal_plat *pdata = dev_get_platdata(dev);
55*4882a593Smuzhiyun struct anatop_regs *anatop = (struct anatop_regs *)pdata->regs;
56*4882a593Smuzhiyun struct thermal_data *priv = dev_get_priv(dev);
57*4882a593Smuzhiyun u32 fuse = priv->fuse;
58*4882a593Smuzhiyun int t1, n1;
59*4882a593Smuzhiyun s64 c1, c2;
60*4882a593Smuzhiyun s64 temp64;
61*4882a593Smuzhiyun s32 rem;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * Sensor data layout:
65*4882a593Smuzhiyun * [31:20] - sensor value @ 25C
66*4882a593Smuzhiyun * We use universal formula now and only need sensor value @ 25C
67*4882a593Smuzhiyun * slope = 0.4445388 - (0.0016549 * 25C fuse)
68*4882a593Smuzhiyun */
69*4882a593Smuzhiyun n1 = fuse >> 20;
70*4882a593Smuzhiyun t1 = 25; /* t1 always 25C */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /*
73*4882a593Smuzhiyun * Derived from linear interpolation:
74*4882a593Smuzhiyun * slope = 0.4445388 - (0.0016549 * 25C fuse)
75*4882a593Smuzhiyun * slope = (FACTOR2 - FACTOR1 * n1) / FACTOR0
76*4882a593Smuzhiyun * offset = 3.580661
77*4882a593Smuzhiyun * offset = OFFSET / 1000000
78*4882a593Smuzhiyun * (Nmeas - n1) / (Tmeas - t1 - offset) = slope
79*4882a593Smuzhiyun * We want to reduce this down to the minimum computation necessary
80*4882a593Smuzhiyun * for each temperature read. Also, we want Tmeas in millicelsius
81*4882a593Smuzhiyun * and we don't want to lose precision from integer division. So...
82*4882a593Smuzhiyun * Tmeas = (Nmeas - n1) / slope + t1 + offset
83*4882a593Smuzhiyun * milli_Tmeas = 1000000 * (Nmeas - n1) / slope + 1000000 * t1 + OFFSET
84*4882a593Smuzhiyun * milli_Tmeas = -1000000 * (n1 - Nmeas) / slope + 1000000 * t1 + OFFSET
85*4882a593Smuzhiyun * Let constant c1 = (-1000000 / slope)
86*4882a593Smuzhiyun * milli_Tmeas = (n1 - Nmeas) * c1 + 1000000 * t1 + OFFSET
87*4882a593Smuzhiyun * Let constant c2 = n1 *c1 + 1000000 * t1
88*4882a593Smuzhiyun * milli_Tmeas = (c2 - Nmeas * c1) + OFFSET
89*4882a593Smuzhiyun * Tmeas = ((c2 - Nmeas * c1) + OFFSET) / 1000000
90*4882a593Smuzhiyun */
91*4882a593Smuzhiyun temp64 = FACTOR0;
92*4882a593Smuzhiyun temp64 *= 1000000;
93*4882a593Smuzhiyun temp64 = div_s64_rem(temp64, FACTOR1 * n1 - FACTOR2, &rem);
94*4882a593Smuzhiyun c1 = temp64;
95*4882a593Smuzhiyun c2 = n1 * c1 + 1000000 * t1;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun * now we only use single measure, every time we read
99*4882a593Smuzhiyun * the temperature, we will power on/down anadig thermal
100*4882a593Smuzhiyun * module
101*4882a593Smuzhiyun */
102*4882a593Smuzhiyun writel(TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr);
103*4882a593Smuzhiyun writel(MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* setup measure freq */
106*4882a593Smuzhiyun reg = readl(&anatop->tempsense1);
107*4882a593Smuzhiyun reg &= ~TEMPSENSE1_MEASURE_FREQ;
108*4882a593Smuzhiyun reg |= MEASURE_FREQ;
109*4882a593Smuzhiyun writel(reg, &anatop->tempsense1);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* start the measurement process */
112*4882a593Smuzhiyun writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr);
113*4882a593Smuzhiyun writel(TEMPSENSE0_FINISHED, &anatop->tempsense0_clr);
114*4882a593Smuzhiyun writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* make sure that the latest temp is valid */
117*4882a593Smuzhiyun while ((readl(&anatop->tempsense0) &
118*4882a593Smuzhiyun TEMPSENSE0_FINISHED) == 0)
119*4882a593Smuzhiyun udelay(10000);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* read temperature count */
122*4882a593Smuzhiyun reg = readl(&anatop->tempsense0);
123*4882a593Smuzhiyun n_meas = (reg & TEMPSENSE0_TEMP_CNT_MASK)
124*4882a593Smuzhiyun >> TEMPSENSE0_TEMP_CNT_SHIFT;
125*4882a593Smuzhiyun writel(TEMPSENSE0_FINISHED, &anatop->tempsense0_clr);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Tmeas = (c2 - Nmeas * c1 + OFFSET) / 1000000 */
128*4882a593Smuzhiyun temperature = div_s64_rem(c2 - n_meas * c1 + OFFSET, 1000000, &rem);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* power down anatop thermal sensor */
131*4882a593Smuzhiyun writel(TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_set);
132*4882a593Smuzhiyun writel(MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_clr);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return temperature;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun #elif defined(CONFIG_MX7)
read_cpu_temperature(struct udevice * dev)137*4882a593Smuzhiyun static int read_cpu_temperature(struct udevice *dev)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun unsigned int reg, tmp;
140*4882a593Smuzhiyun unsigned int raw_25c, te1;
141*4882a593Smuzhiyun int temperature;
142*4882a593Smuzhiyun unsigned int *priv = dev_get_priv(dev);
143*4882a593Smuzhiyun u32 fuse = *priv;
144*4882a593Smuzhiyun struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *)
145*4882a593Smuzhiyun ANATOP_BASE_ADDR;
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun * fuse data layout:
148*4882a593Smuzhiyun * [31:21] sensor value @ 25C
149*4882a593Smuzhiyun * [20:18] hot temperature value
150*4882a593Smuzhiyun * [17:9] sensor value of room
151*4882a593Smuzhiyun * [8:0] sensor value of hot
152*4882a593Smuzhiyun */
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun raw_25c = fuse >> 21;
155*4882a593Smuzhiyun if (raw_25c == 0)
156*4882a593Smuzhiyun raw_25c = 25;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun te1 = (fuse >> 9) & 0x1ff;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /*
161*4882a593Smuzhiyun * now we only use single measure, every time we read
162*4882a593Smuzhiyun * the temperature, we will power on/down anadig thermal
163*4882a593Smuzhiyun * module
164*4882a593Smuzhiyun */
165*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK, &ccm_anatop->tempsense1_clr);
166*4882a593Smuzhiyun writel(PMU_REF_REFTOP_SELFBIASOFF_MASK, &ccm_anatop->ref_set);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* write measure freq */
169*4882a593Smuzhiyun reg = readl(&ccm_anatop->tempsense1);
170*4882a593Smuzhiyun reg &= ~TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ_MASK;
171*4882a593Smuzhiyun reg |= TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_FREQ(MEASURE_FREQ);
172*4882a593Smuzhiyun writel(reg, &ccm_anatop->tempsense1);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_clr);
175*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
176*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (soc_rev() >= CHIP_REV_1_1) {
179*4882a593Smuzhiyun while ((readl(&ccm_anatop->tempsense1) &
180*4882a593Smuzhiyun TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK) == 0)
181*4882a593Smuzhiyun ;
182*4882a593Smuzhiyun reg = readl(&ccm_anatop->tempsense1);
183*4882a593Smuzhiyun tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
184*4882a593Smuzhiyun >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
185*4882a593Smuzhiyun } else {
186*4882a593Smuzhiyun /*
187*4882a593Smuzhiyun * Since we can not rely on finish bit, use 10ms
188*4882a593Smuzhiyun * delay to get temperature. From RM, 17us is
189*4882a593Smuzhiyun * enough to get data, but to gurantee to get
190*4882a593Smuzhiyun * the data, delay 10ms here.
191*4882a593Smuzhiyun */
192*4882a593Smuzhiyun udelay(10000);
193*4882a593Smuzhiyun reg = readl(&ccm_anatop->tempsense1);
194*4882a593Smuzhiyun tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
195*4882a593Smuzhiyun >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /* power down anatop thermal sensor */
201*4882a593Smuzhiyun writel(TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK, &ccm_anatop->tempsense1_set);
202*4882a593Smuzhiyun writel(PMU_REF_REFTOP_SELFBIASOFF_MASK, &ccm_anatop->ref_clr);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* Single point */
205*4882a593Smuzhiyun temperature = tmp - (te1 - raw_25c);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun return temperature;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun #endif
210*4882a593Smuzhiyun
imx_thermal_get_temp(struct udevice * dev,int * temp)211*4882a593Smuzhiyun int imx_thermal_get_temp(struct udevice *dev, int *temp)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun struct thermal_data *priv = dev_get_priv(dev);
214*4882a593Smuzhiyun int cpu_tmp = 0;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun cpu_tmp = read_cpu_temperature(dev);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun while (cpu_tmp >= priv->critical) {
219*4882a593Smuzhiyun printf("CPU Temperature (%dC) too close to max (%dC)",
220*4882a593Smuzhiyun cpu_tmp, priv->maxc);
221*4882a593Smuzhiyun puts(" waiting...\n");
222*4882a593Smuzhiyun udelay(5000000);
223*4882a593Smuzhiyun cpu_tmp = read_cpu_temperature(dev);
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun *temp = cpu_tmp;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun static const struct dm_thermal_ops imx_thermal_ops = {
232*4882a593Smuzhiyun .get_temp = imx_thermal_get_temp,
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun
imx_thermal_probe(struct udevice * dev)235*4882a593Smuzhiyun static int imx_thermal_probe(struct udevice *dev)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun unsigned int fuse = ~0;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun const struct imx_thermal_plat *pdata = dev_get_platdata(dev);
240*4882a593Smuzhiyun struct thermal_data *priv = dev_get_priv(dev);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /* Read Temperature calibration data fuse */
243*4882a593Smuzhiyun fuse_read(pdata->fuse_bank, pdata->fuse_word, &fuse);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun if (is_soc_type(MXC_SOC_MX6)) {
246*4882a593Smuzhiyun /* Check for valid fuse */
247*4882a593Smuzhiyun if (fuse == 0 || fuse == ~0) {
248*4882a593Smuzhiyun debug("CPU: Thermal invalid data, fuse: 0x%x\n",
249*4882a593Smuzhiyun fuse);
250*4882a593Smuzhiyun return -EPERM;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun } else if (is_soc_type(MXC_SOC_MX7)) {
253*4882a593Smuzhiyun /* No Calibration data in FUSE? */
254*4882a593Smuzhiyun if ((fuse & 0x3ffff) == 0)
255*4882a593Smuzhiyun return -EPERM;
256*4882a593Smuzhiyun /* We do not support 105C TE2 */
257*4882a593Smuzhiyun if (((fuse & 0x1c0000) >> 18) == 0x6)
258*4882a593Smuzhiyun return -EPERM;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* set critical cooling temp */
262*4882a593Smuzhiyun get_cpu_temp_grade(&priv->minc, &priv->maxc);
263*4882a593Smuzhiyun priv->critical = priv->maxc - TEMPERATURE_HOT_DELTA;
264*4882a593Smuzhiyun priv->fuse = fuse;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun enable_thermal_clk();
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun return 0;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun U_BOOT_DRIVER(imx_thermal) = {
272*4882a593Smuzhiyun .name = "imx_thermal",
273*4882a593Smuzhiyun .id = UCLASS_THERMAL,
274*4882a593Smuzhiyun .ops = &imx_thermal_ops,
275*4882a593Smuzhiyun .probe = imx_thermal_probe,
276*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct thermal_data),
277*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
278*4882a593Smuzhiyun };
279