xref: /OK3568_Linux_fs/u-boot/drivers/spi/soft_spi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2014 Google, Inc
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2002
5*4882a593Smuzhiyun  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Influenced by code from:
8*4882a593Smuzhiyun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <dm.h>
15*4882a593Smuzhiyun #include <errno.h>
16*4882a593Smuzhiyun #include <fdtdec.h>
17*4882a593Smuzhiyun #include <malloc.h>
18*4882a593Smuzhiyun #include <spi.h>
19*4882a593Smuzhiyun #include <asm/gpio.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct soft_spi_platdata {
24*4882a593Smuzhiyun 	struct gpio_desc cs;
25*4882a593Smuzhiyun 	struct gpio_desc sclk;
26*4882a593Smuzhiyun 	struct gpio_desc mosi;
27*4882a593Smuzhiyun 	struct gpio_desc miso;
28*4882a593Smuzhiyun 	int spi_delay_us;
29*4882a593Smuzhiyun 	int flags;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define SPI_MASTER_NO_RX        BIT(0)
33*4882a593Smuzhiyun #define SPI_MASTER_NO_TX        BIT(1)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct soft_spi_priv {
36*4882a593Smuzhiyun 	unsigned int mode;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
soft_spi_scl(struct udevice * dev,int bit)39*4882a593Smuzhiyun static int soft_spi_scl(struct udevice *dev, int bit)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	struct udevice *bus = dev_get_parent(dev);
42*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev_get_platdata(bus);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->sclk, bit);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
soft_spi_sda(struct udevice * dev,int bit)49*4882a593Smuzhiyun static int soft_spi_sda(struct udevice *dev, int bit)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	struct udevice *bus = dev_get_parent(dev);
52*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev_get_platdata(bus);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->mosi, bit);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
soft_spi_cs_activate(struct udevice * dev)59*4882a593Smuzhiyun static int soft_spi_cs_activate(struct udevice *dev)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct udevice *bus = dev_get_parent(dev);
62*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev_get_platdata(bus);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->cs, 0);
65*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->sclk, 0);
66*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->cs, 1);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
soft_spi_cs_deactivate(struct udevice * dev)71*4882a593Smuzhiyun static int soft_spi_cs_deactivate(struct udevice *dev)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct udevice *bus = dev_get_parent(dev);
74*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev_get_platdata(bus);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	dm_gpio_set_value(&plat->cs, 0);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
soft_spi_claim_bus(struct udevice * dev)81*4882a593Smuzhiyun static int soft_spi_claim_bus(struct udevice *dev)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	/*
84*4882a593Smuzhiyun 	 * Make sure the SPI clock is in idle state as defined for
85*4882a593Smuzhiyun 	 * this slave.
86*4882a593Smuzhiyun 	 */
87*4882a593Smuzhiyun 	return soft_spi_scl(dev, 0);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
soft_spi_release_bus(struct udevice * dev)90*4882a593Smuzhiyun static int soft_spi_release_bus(struct udevice *dev)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	/* Nothing to do */
93*4882a593Smuzhiyun 	return 0;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /*-----------------------------------------------------------------------
97*4882a593Smuzhiyun  * SPI transfer
98*4882a593Smuzhiyun  *
99*4882a593Smuzhiyun  * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
100*4882a593Smuzhiyun  * "bitlen" bits in the SPI MISO port.  That's just the way SPI works.
101*4882a593Smuzhiyun  *
102*4882a593Smuzhiyun  * The source of the outgoing bits is the "dout" parameter and the
103*4882a593Smuzhiyun  * destination of the input bits is the "din" parameter.  Note that "dout"
104*4882a593Smuzhiyun  * and "din" can point to the same memory location, in which case the
105*4882a593Smuzhiyun  * input data overwrites the output data (since both are buffered by
106*4882a593Smuzhiyun  * temporary variables, this is OK).
107*4882a593Smuzhiyun  */
soft_spi_xfer(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)108*4882a593Smuzhiyun static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen,
109*4882a593Smuzhiyun 			 const void *dout, void *din, unsigned long flags)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct udevice *bus = dev_get_parent(dev);
112*4882a593Smuzhiyun 	struct soft_spi_priv *priv = dev_get_priv(bus);
113*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev_get_platdata(bus);
114*4882a593Smuzhiyun 	uchar		tmpdin  = 0;
115*4882a593Smuzhiyun 	uchar		tmpdout = 0;
116*4882a593Smuzhiyun 	const u8	*txd = dout;
117*4882a593Smuzhiyun 	u8		*rxd = din;
118*4882a593Smuzhiyun 	int		cpha = priv->mode & SPI_CPHA;
119*4882a593Smuzhiyun 	unsigned int	j;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n",
122*4882a593Smuzhiyun 	      dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd,
123*4882a593Smuzhiyun 	      bitlen);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	if (flags & SPI_XFER_BEGIN)
126*4882a593Smuzhiyun 		soft_spi_cs_activate(dev);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	for (j = 0; j < bitlen; j++) {
129*4882a593Smuzhiyun 		/*
130*4882a593Smuzhiyun 		 * Check if it is time to work on a new byte.
131*4882a593Smuzhiyun 		 */
132*4882a593Smuzhiyun 		if ((j % 8) == 0) {
133*4882a593Smuzhiyun 			if (txd)
134*4882a593Smuzhiyun 				tmpdout = *txd++;
135*4882a593Smuzhiyun 			else
136*4882a593Smuzhiyun 				tmpdout = 0;
137*4882a593Smuzhiyun 			if (j != 0) {
138*4882a593Smuzhiyun 				if (rxd)
139*4882a593Smuzhiyun 					*rxd++ = tmpdin;
140*4882a593Smuzhiyun 			}
141*4882a593Smuzhiyun 			tmpdin  = 0;
142*4882a593Smuzhiyun 		}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 		if (!cpha)
145*4882a593Smuzhiyun 			soft_spi_scl(dev, 0);
146*4882a593Smuzhiyun 		if ((plat->flags & SPI_MASTER_NO_TX) == 0)
147*4882a593Smuzhiyun 			soft_spi_sda(dev, !!(tmpdout & 0x80));
148*4882a593Smuzhiyun 		udelay(plat->spi_delay_us);
149*4882a593Smuzhiyun 		if (cpha)
150*4882a593Smuzhiyun 			soft_spi_scl(dev, 0);
151*4882a593Smuzhiyun 		else
152*4882a593Smuzhiyun 			soft_spi_scl(dev, 1);
153*4882a593Smuzhiyun 		tmpdin	<<= 1;
154*4882a593Smuzhiyun 		if ((plat->flags & SPI_MASTER_NO_RX) == 0)
155*4882a593Smuzhiyun 			tmpdin	|= dm_gpio_get_value(&plat->miso);
156*4882a593Smuzhiyun 		tmpdout	<<= 1;
157*4882a593Smuzhiyun 		udelay(plat->spi_delay_us);
158*4882a593Smuzhiyun 		if (cpha)
159*4882a593Smuzhiyun 			soft_spi_scl(dev, 1);
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun 	/*
162*4882a593Smuzhiyun 	 * If the number of bits isn't a multiple of 8, shift the last
163*4882a593Smuzhiyun 	 * bits over to left-justify them.  Then store the last byte
164*4882a593Smuzhiyun 	 * read in.
165*4882a593Smuzhiyun 	 */
166*4882a593Smuzhiyun 	if (rxd) {
167*4882a593Smuzhiyun 		if ((bitlen % 8) != 0)
168*4882a593Smuzhiyun 			tmpdin <<= 8 - (bitlen % 8);
169*4882a593Smuzhiyun 		*rxd++ = tmpdin;
170*4882a593Smuzhiyun 	}
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	if (flags & SPI_XFER_END)
173*4882a593Smuzhiyun 		soft_spi_cs_deactivate(dev);
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
soft_spi_set_speed(struct udevice * dev,unsigned int speed)178*4882a593Smuzhiyun static int soft_spi_set_speed(struct udevice *dev, unsigned int speed)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	/* Accept any speed */
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
soft_spi_set_mode(struct udevice * dev,unsigned int mode)184*4882a593Smuzhiyun static int soft_spi_set_mode(struct udevice *dev, unsigned int mode)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	struct soft_spi_priv *priv = dev_get_priv(dev);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	priv->mode = mode;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun static const struct dm_spi_ops soft_spi_ops = {
194*4882a593Smuzhiyun 	.claim_bus	= soft_spi_claim_bus,
195*4882a593Smuzhiyun 	.release_bus	= soft_spi_release_bus,
196*4882a593Smuzhiyun 	.xfer		= soft_spi_xfer,
197*4882a593Smuzhiyun 	.set_speed	= soft_spi_set_speed,
198*4882a593Smuzhiyun 	.set_mode	= soft_spi_set_mode,
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
soft_spi_ofdata_to_platdata(struct udevice * dev)201*4882a593Smuzhiyun static int soft_spi_ofdata_to_platdata(struct udevice *dev)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev->platdata;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	plat->spi_delay_us = dev_read_u32_default(dev, "spi-delay-us", 0);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
soft_spi_probe(struct udevice * dev)210*4882a593Smuzhiyun static int soft_spi_probe(struct udevice *dev)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	struct spi_slave *slave = dev_get_parent_priv(dev);
213*4882a593Smuzhiyun 	struct soft_spi_platdata *plat = dev->platdata;
214*4882a593Smuzhiyun 	int cs_flags, clk_flags;
215*4882a593Smuzhiyun 	int ret;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	if (slave) {
218*4882a593Smuzhiyun 		cs_flags = (slave->mode & SPI_CS_HIGH) ? 0 : GPIOD_ACTIVE_LOW;
219*4882a593Smuzhiyun 		clk_flags = (slave->mode & SPI_CPOL) ? GPIOD_ACTIVE_LOW : 0;
220*4882a593Smuzhiyun 	} else {
221*4882a593Smuzhiyun 		cs_flags = GPIOD_ACTIVE_LOW;
222*4882a593Smuzhiyun 		clk_flags = 0;
223*4882a593Smuzhiyun 	}
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	if (gpio_request_by_name(dev, "cs-gpios", 0, &plat->cs, GPIOD_IS_OUT | cs_flags) ||
226*4882a593Smuzhiyun 	    (gpio_request_by_name(dev, "gpio-sck", 0, &plat->sclk, GPIOD_IS_OUT | clk_flags) &&
227*4882a593Smuzhiyun 	     gpio_request_by_name(dev, "sck-gpios", 0, &plat->sclk, GPIOD_IS_OUT | clk_flags)))
228*4882a593Smuzhiyun 		return -EINVAL;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	ret = gpio_request_by_name(dev, "gpio-mosi", 0, &plat->mosi,
231*4882a593Smuzhiyun 				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
232*4882a593Smuzhiyun 	if (ret) {
233*4882a593Smuzhiyun 		if (gpio_request_by_name(dev, "mosi-gpios", 0, &plat->mosi,
234*4882a593Smuzhiyun 		    GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE))
235*4882a593Smuzhiyun 			plat->flags |= SPI_MASTER_NO_TX;
236*4882a593Smuzhiyun 	}
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	ret = gpio_request_by_name(dev, "gpio-miso", 0, &plat->miso,
239*4882a593Smuzhiyun 				   GPIOD_IS_IN);
240*4882a593Smuzhiyun 	if (ret) {
241*4882a593Smuzhiyun 		if (gpio_request_by_name(dev, "miso-gpios", 0, &plat->miso,
242*4882a593Smuzhiyun 		    GPIOD_IS_IN))
243*4882a593Smuzhiyun 			plat->flags |= SPI_MASTER_NO_RX;
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	if ((plat->flags & (SPI_MASTER_NO_RX | SPI_MASTER_NO_TX)) ==
247*4882a593Smuzhiyun 	    (SPI_MASTER_NO_RX | SPI_MASTER_NO_TX))
248*4882a593Smuzhiyun 		return -EINVAL;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	return 0;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun static const struct udevice_id soft_spi_ids[] = {
254*4882a593Smuzhiyun 	{ .compatible = "spi-gpio" },
255*4882a593Smuzhiyun 	{ }
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun U_BOOT_DRIVER(soft_spi) = {
259*4882a593Smuzhiyun 	.name	= "soft_spi",
260*4882a593Smuzhiyun 	.id	= UCLASS_SPI,
261*4882a593Smuzhiyun 	.of_match = soft_spi_ids,
262*4882a593Smuzhiyun 	.ops	= &soft_spi_ops,
263*4882a593Smuzhiyun 	.ofdata_to_platdata = soft_spi_ofdata_to_platdata,
264*4882a593Smuzhiyun 	.platdata_auto_alloc_size = sizeof(struct soft_spi_platdata),
265*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct soft_spi_priv),
266*4882a593Smuzhiyun 	.probe	= soft_spi_probe,
267*4882a593Smuzhiyun };
268