xref: /OK3568_Linux_fs/u-boot/drivers/spi/atcspi200_spi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Andestech ATCSPI200 SPI controller driver.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2017 Andes Technology, Inc.
5*4882a593Smuzhiyun  * Author: Rick Chen (rick@andestech.com)
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <clk.h>
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <malloc.h>
13*4882a593Smuzhiyun #include <spi.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <dm.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define MAX_TRANSFER_LEN	512
20*4882a593Smuzhiyun #define CHUNK_SIZE		1
21*4882a593Smuzhiyun #define SPI_TIMEOUT		0x100000
22*4882a593Smuzhiyun #define SPI0_BUS		0
23*4882a593Smuzhiyun #define SPI1_BUS		1
24*4882a593Smuzhiyun #define SPI0_BASE		0xf0b00000
25*4882a593Smuzhiyun #define SPI1_BASE		0xf0f00000
26*4882a593Smuzhiyun #define NSPI_MAX_CS_NUM		1
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun struct atcspi200_spi_regs {
29*4882a593Smuzhiyun 	u32	rev;
30*4882a593Smuzhiyun 	u32	reserve1[3];
31*4882a593Smuzhiyun 	u32	format;		/* 0x10 */
32*4882a593Smuzhiyun #define DATA_LENGTH(x)	((x-1)<<8)
33*4882a593Smuzhiyun 	u32	pio;
34*4882a593Smuzhiyun 	u32	reserve2[2];
35*4882a593Smuzhiyun 	u32	tctrl;		/* 0x20 */
36*4882a593Smuzhiyun #define TRAMODE_OFFSET	24
37*4882a593Smuzhiyun #define TRAMODE_MASK	(0x0F<<TRAMODE_OFFSET)
38*4882a593Smuzhiyun #define TRAMODE_WR_SYNC	(0<<TRAMODE_OFFSET)
39*4882a593Smuzhiyun #define TRAMODE_WO	(1<<TRAMODE_OFFSET)
40*4882a593Smuzhiyun #define TRAMODE_RO	(2<<TRAMODE_OFFSET)
41*4882a593Smuzhiyun #define TRAMODE_WR	(3<<TRAMODE_OFFSET)
42*4882a593Smuzhiyun #define TRAMODE_RW	(4<<TRAMODE_OFFSET)
43*4882a593Smuzhiyun #define TRAMODE_WDR	(5<<TRAMODE_OFFSET)
44*4882a593Smuzhiyun #define TRAMODE_RDW	(6<<TRAMODE_OFFSET)
45*4882a593Smuzhiyun #define TRAMODE_NONE	(7<<TRAMODE_OFFSET)
46*4882a593Smuzhiyun #define TRAMODE_DW	(8<<TRAMODE_OFFSET)
47*4882a593Smuzhiyun #define TRAMODE_DR	(9<<TRAMODE_OFFSET)
48*4882a593Smuzhiyun #define WCNT_OFFSET	12
49*4882a593Smuzhiyun #define WCNT_MASK	(0x1FF<<WCNT_OFFSET)
50*4882a593Smuzhiyun #define RCNT_OFFSET	0
51*4882a593Smuzhiyun #define RCNT_MASK	(0x1FF<<RCNT_OFFSET)
52*4882a593Smuzhiyun 	u32	cmd;
53*4882a593Smuzhiyun 	u32	addr;
54*4882a593Smuzhiyun 	u32	data;
55*4882a593Smuzhiyun 	u32	ctrl;		/* 0x30 */
56*4882a593Smuzhiyun #define TXFTH_OFFSET	16
57*4882a593Smuzhiyun #define RXFTH_OFFSET	8
58*4882a593Smuzhiyun #define TXDMAEN		(1<<4)
59*4882a593Smuzhiyun #define RXDMAEN		(1<<3)
60*4882a593Smuzhiyun #define TXFRST		(1<<2)
61*4882a593Smuzhiyun #define RXFRST		(1<<1)
62*4882a593Smuzhiyun #define SPIRST		(1<<0)
63*4882a593Smuzhiyun 	u32	status;
64*4882a593Smuzhiyun #define TXFFL		(1<<23)
65*4882a593Smuzhiyun #define TXEPTY		(1<<22)
66*4882a593Smuzhiyun #define TXFVE_MASK	(0x1F<<16)
67*4882a593Smuzhiyun #define RXFEM		(1<<14)
68*4882a593Smuzhiyun #define RXFVE_OFFSET	(8)
69*4882a593Smuzhiyun #define RXFVE_MASK	(0x1F<<RXFVE_OFFSET)
70*4882a593Smuzhiyun #define SPIBSY		(1<<0)
71*4882a593Smuzhiyun 	u32	inten;
72*4882a593Smuzhiyun 	u32	intsta;
73*4882a593Smuzhiyun 	u32	timing;		/* 0x40 */
74*4882a593Smuzhiyun #define SCLK_DIV_MASK	0xFF
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct nds_spi_slave {
78*4882a593Smuzhiyun 	volatile struct atcspi200_spi_regs *regs;
79*4882a593Smuzhiyun 	int		to;
80*4882a593Smuzhiyun 	unsigned int	freq;
81*4882a593Smuzhiyun 	ulong		clock;
82*4882a593Smuzhiyun 	unsigned int	mode;
83*4882a593Smuzhiyun 	u8 		num_cs;
84*4882a593Smuzhiyun 	unsigned int	mtiming;
85*4882a593Smuzhiyun 	size_t		cmd_len;
86*4882a593Smuzhiyun 	u8		cmd_buf[16];
87*4882a593Smuzhiyun 	size_t		data_len;
88*4882a593Smuzhiyun 	size_t		tran_len;
89*4882a593Smuzhiyun 	u8		*din;
90*4882a593Smuzhiyun 	u8		*dout;
91*4882a593Smuzhiyun 	unsigned int    max_transfer_length;
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun 
__atcspi200_spi_set_speed(struct nds_spi_slave * ns)94*4882a593Smuzhiyun static int __atcspi200_spi_set_speed(struct nds_spi_slave *ns)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	u32 tm;
97*4882a593Smuzhiyun 	u8 div;
98*4882a593Smuzhiyun 	tm = ns->regs->timing;
99*4882a593Smuzhiyun 	tm &= ~SCLK_DIV_MASK;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	if(ns->freq >= ns->clock)
102*4882a593Smuzhiyun 		div =0xff;
103*4882a593Smuzhiyun 	else{
104*4882a593Smuzhiyun 		for (div = 0; div < 0xff; div++) {
105*4882a593Smuzhiyun 			if (ns->freq >= ns->clock / (2 * (div + 1)))
106*4882a593Smuzhiyun 				break;
107*4882a593Smuzhiyun 		}
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	tm |= div;
111*4882a593Smuzhiyun 	ns->regs->timing = tm;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return 0;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
__atcspi200_spi_claim_bus(struct nds_spi_slave * ns)117*4882a593Smuzhiyun static int __atcspi200_spi_claim_bus(struct nds_spi_slave *ns)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 		unsigned int format=0;
120*4882a593Smuzhiyun 		ns->regs->ctrl |= (TXFRST|RXFRST|SPIRST);
121*4882a593Smuzhiyun 		while((ns->regs->ctrl &(TXFRST|RXFRST|SPIRST))&&(ns->to--))
122*4882a593Smuzhiyun 			if(!ns->to)
123*4882a593Smuzhiyun 				return -EINVAL;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 		ns->cmd_len = 0;
126*4882a593Smuzhiyun 		format = ns->mode|DATA_LENGTH(8);
127*4882a593Smuzhiyun 		ns->regs->format = format;
128*4882a593Smuzhiyun 		__atcspi200_spi_set_speed(ns);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 		return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
__atcspi200_spi_release_bus(struct nds_spi_slave * ns)133*4882a593Smuzhiyun static int __atcspi200_spi_release_bus(struct nds_spi_slave *ns)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	/* do nothing */
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
__atcspi200_spi_start(struct nds_spi_slave * ns)139*4882a593Smuzhiyun static int __atcspi200_spi_start(struct nds_spi_slave *ns)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	int i,olen=0;
142*4882a593Smuzhiyun 	int tc = ns->regs->tctrl;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	tc &= ~(WCNT_MASK|RCNT_MASK|TRAMODE_MASK);
145*4882a593Smuzhiyun 	if ((ns->din)&&(ns->cmd_len))
146*4882a593Smuzhiyun 		tc |= TRAMODE_WR;
147*4882a593Smuzhiyun 	else if (ns->din)
148*4882a593Smuzhiyun 		tc |= TRAMODE_RO;
149*4882a593Smuzhiyun 	else
150*4882a593Smuzhiyun 		tc |= TRAMODE_WO;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if(ns->dout)
153*4882a593Smuzhiyun 		olen = ns->tran_len;
154*4882a593Smuzhiyun 	tc |= (ns->cmd_len+olen-1) << WCNT_OFFSET;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	if(ns->din)
157*4882a593Smuzhiyun 		tc |= (ns->tran_len-1) << RCNT_OFFSET;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	ns->regs->tctrl = tc;
160*4882a593Smuzhiyun 	ns->regs->cmd = 1;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	for (i=0;i<ns->cmd_len;i++)
163*4882a593Smuzhiyun 		ns->regs->data = ns->cmd_buf[i];
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
__atcspi200_spi_stop(struct nds_spi_slave * ns)168*4882a593Smuzhiyun static int __atcspi200_spi_stop(struct nds_spi_slave *ns)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	ns->regs->timing = ns->mtiming;
171*4882a593Smuzhiyun 	while ((ns->regs->status & SPIBSY)&&(ns->to--))
172*4882a593Smuzhiyun 		if (!ns->to)
173*4882a593Smuzhiyun 			return -EINVAL;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
__nspi_espi_tx(struct nds_spi_slave * ns,const void * dout)178*4882a593Smuzhiyun static void __nspi_espi_tx(struct nds_spi_slave *ns, const void *dout)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	ns->regs->data = *(u8 *)dout;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
__nspi_espi_rx(struct nds_spi_slave * ns,void * din,unsigned int bytes)183*4882a593Smuzhiyun static int __nspi_espi_rx(struct nds_spi_slave *ns, void *din, unsigned int bytes)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	*(u8 *)din = ns->regs->data;
186*4882a593Smuzhiyun 	return bytes;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 
__atcspi200_spi_xfer(struct nds_spi_slave * ns,unsigned int bitlen,const void * data_out,void * data_in,unsigned long flags)190*4882a593Smuzhiyun static int __atcspi200_spi_xfer(struct nds_spi_slave *ns,
191*4882a593Smuzhiyun 		unsigned int bitlen,  const void *data_out, void *data_in,
192*4882a593Smuzhiyun 		unsigned long flags)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun 		unsigned int event, rx_bytes;
195*4882a593Smuzhiyun 		const void *dout = NULL;
196*4882a593Smuzhiyun 		void *din = NULL;
197*4882a593Smuzhiyun 		int num_blks, num_chunks, max_tran_len, tran_len;
198*4882a593Smuzhiyun 		int num_bytes;
199*4882a593Smuzhiyun 		u8 *cmd_buf = ns->cmd_buf;
200*4882a593Smuzhiyun 		size_t cmd_len = ns->cmd_len;
201*4882a593Smuzhiyun 		size_t data_len = bitlen / 8;
202*4882a593Smuzhiyun 		int rf_cnt;
203*4882a593Smuzhiyun 		int ret = 0;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 		max_tran_len = ns->max_transfer_length;
206*4882a593Smuzhiyun 		switch (flags) {
207*4882a593Smuzhiyun 		case SPI_XFER_BEGIN:
208*4882a593Smuzhiyun 			cmd_len = ns->cmd_len = data_len;
209*4882a593Smuzhiyun 			memcpy(cmd_buf, data_out, cmd_len);
210*4882a593Smuzhiyun 			return 0;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 		case 0:
213*4882a593Smuzhiyun 		case SPI_XFER_END:
214*4882a593Smuzhiyun 			if (bitlen == 0) {
215*4882a593Smuzhiyun 				return 0;
216*4882a593Smuzhiyun 			}
217*4882a593Smuzhiyun 			ns->data_len = data_len;
218*4882a593Smuzhiyun 			ns->din = (u8 *)data_in;
219*4882a593Smuzhiyun 			ns->dout = (u8 *)data_out;
220*4882a593Smuzhiyun 			break;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 		case SPI_XFER_BEGIN | SPI_XFER_END:
223*4882a593Smuzhiyun 			ns->data_len = 0;
224*4882a593Smuzhiyun 			ns->din = 0;
225*4882a593Smuzhiyun 			ns->dout = 0;
226*4882a593Smuzhiyun 			cmd_len = ns->cmd_len = data_len;
227*4882a593Smuzhiyun 			memcpy(cmd_buf, data_out, cmd_len);
228*4882a593Smuzhiyun 			data_out = 0;
229*4882a593Smuzhiyun 			data_len = 0;
230*4882a593Smuzhiyun 			__atcspi200_spi_start(ns);
231*4882a593Smuzhiyun 			break;
232*4882a593Smuzhiyun 		}
233*4882a593Smuzhiyun 		debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n",
234*4882a593Smuzhiyun 		      *(uint *)data_out, data_out, *(uint *)data_in, data_in, data_len);
235*4882a593Smuzhiyun 		num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
236*4882a593Smuzhiyun 		din = data_in;
237*4882a593Smuzhiyun 		dout = data_out;
238*4882a593Smuzhiyun 		while (num_chunks--) {
239*4882a593Smuzhiyun 			tran_len = min(data_len, (size_t)max_tran_len);
240*4882a593Smuzhiyun 			ns->tran_len = tran_len;
241*4882a593Smuzhiyun 			num_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE);
242*4882a593Smuzhiyun 			num_bytes = (tran_len) % CHUNK_SIZE;
243*4882a593Smuzhiyun 			if(num_bytes == 0)
244*4882a593Smuzhiyun 				num_bytes = CHUNK_SIZE;
245*4882a593Smuzhiyun 			__atcspi200_spi_start(ns);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 			while (num_blks) {
248*4882a593Smuzhiyun 				event = in_le32(&ns->regs->status);
249*4882a593Smuzhiyun 				if ((event & TXEPTY) && (data_out)) {
250*4882a593Smuzhiyun 					__nspi_espi_tx(ns, dout);
251*4882a593Smuzhiyun 					num_blks -= CHUNK_SIZE;
252*4882a593Smuzhiyun 					dout += CHUNK_SIZE;
253*4882a593Smuzhiyun 				}
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 				if ((event & RXFVE_MASK) && (data_in)) {
256*4882a593Smuzhiyun 					rf_cnt = ((event & RXFVE_MASK)>> RXFVE_OFFSET);
257*4882a593Smuzhiyun 					if (rf_cnt >= CHUNK_SIZE)
258*4882a593Smuzhiyun 						rx_bytes = CHUNK_SIZE;
259*4882a593Smuzhiyun 					else if (num_blks == 1 && rf_cnt == num_bytes)
260*4882a593Smuzhiyun 						rx_bytes = num_bytes;
261*4882a593Smuzhiyun 					else
262*4882a593Smuzhiyun 						continue;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 					if (__nspi_espi_rx(ns, din, rx_bytes) == rx_bytes) {
265*4882a593Smuzhiyun 						num_blks -= CHUNK_SIZE;
266*4882a593Smuzhiyun 						din = (unsigned char *)din + rx_bytes;
267*4882a593Smuzhiyun 					}
268*4882a593Smuzhiyun 				}
269*4882a593Smuzhiyun 			}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 			data_len -= tran_len;
272*4882a593Smuzhiyun 			if(data_len)
273*4882a593Smuzhiyun 			{
274*4882a593Smuzhiyun 				ns->cmd_buf[1] += ((tran_len>>16)&0xff);
275*4882a593Smuzhiyun 				ns->cmd_buf[2] += ((tran_len>>8)&0xff);
276*4882a593Smuzhiyun 				ns->cmd_buf[3] += ((tran_len)&0xff);
277*4882a593Smuzhiyun 				ns->data_len = data_len;
278*4882a593Smuzhiyun 			}
279*4882a593Smuzhiyun 			ret = __atcspi200_spi_stop(ns);
280*4882a593Smuzhiyun 		}
281*4882a593Smuzhiyun 		ret = __atcspi200_spi_stop(ns);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 		return ret;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
atcspi200_spi_set_speed(struct udevice * bus,uint max_hz)286*4882a593Smuzhiyun static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	debug("%s speed %u\n", __func__, max_hz);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	ns->freq = max_hz;
293*4882a593Smuzhiyun 	__atcspi200_spi_set_speed(ns);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
atcspi200_spi_set_mode(struct udevice * bus,uint mode)298*4882a593Smuzhiyun static int atcspi200_spi_set_mode(struct udevice *bus, uint mode)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	debug("%s mode %u\n", __func__, mode);
303*4882a593Smuzhiyun 	ns->mode = mode;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	return 0;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun 
atcspi200_spi_claim_bus(struct udevice * dev)308*4882a593Smuzhiyun static int atcspi200_spi_claim_bus(struct udevice *dev)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	struct dm_spi_slave_platdata *slave_plat =
311*4882a593Smuzhiyun 		dev_get_parent_platdata(dev);
312*4882a593Smuzhiyun 	struct udevice *bus = dev->parent;
313*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	if (slave_plat->cs >= ns->num_cs) {
316*4882a593Smuzhiyun 		printf("Invalid SPI chipselect\n");
317*4882a593Smuzhiyun 		return -EINVAL;
318*4882a593Smuzhiyun 	}
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	return __atcspi200_spi_claim_bus(ns);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
atcspi200_spi_release_bus(struct udevice * dev)323*4882a593Smuzhiyun static int atcspi200_spi_release_bus(struct udevice *dev)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(dev->parent);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	return __atcspi200_spi_release_bus(ns);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
atcspi200_spi_xfer(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)330*4882a593Smuzhiyun static int atcspi200_spi_xfer(struct udevice *dev, unsigned int bitlen,
331*4882a593Smuzhiyun 			    const void *dout, void *din,
332*4882a593Smuzhiyun 			    unsigned long flags)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	struct udevice *bus = dev->parent;
335*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	return __atcspi200_spi_xfer(ns, bitlen, dout, din, flags);
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
atcspi200_spi_get_clk(struct udevice * bus)340*4882a593Smuzhiyun static int atcspi200_spi_get_clk(struct udevice *bus)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
343*4882a593Smuzhiyun 	struct clk clk;
344*4882a593Smuzhiyun 	ulong clk_rate;
345*4882a593Smuzhiyun 	int ret;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	ret = clk_get_by_index(bus, 0, &clk);
348*4882a593Smuzhiyun 	if (ret)
349*4882a593Smuzhiyun 		return -EINVAL;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	clk_rate = clk_get_rate(&clk);
352*4882a593Smuzhiyun 	if (!clk_rate)
353*4882a593Smuzhiyun 		return -EINVAL;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	ns->clock = clk_rate;
356*4882a593Smuzhiyun 	clk_free(&clk);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
atcspi200_spi_probe(struct udevice * bus)361*4882a593Smuzhiyun static int atcspi200_spi_probe(struct udevice *bus)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	ns->to = SPI_TIMEOUT;
366*4882a593Smuzhiyun 	ns->max_transfer_length = MAX_TRANSFER_LEN;
367*4882a593Smuzhiyun 	ns->mtiming = ns->regs->timing;
368*4882a593Smuzhiyun 	atcspi200_spi_get_clk(bus);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	return 0;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
atcspi200_ofdata_to_platadata(struct udevice * bus)373*4882a593Smuzhiyun static int atcspi200_ofdata_to_platadata(struct udevice *bus)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	struct nds_spi_slave *ns = dev_get_priv(bus);
376*4882a593Smuzhiyun 	const void *blob = gd->fdt_blob;
377*4882a593Smuzhiyun 	int node = dev_of_offset(bus);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	ns->regs = map_physmem(devfdt_get_addr(bus),
380*4882a593Smuzhiyun 				 sizeof(struct atcspi200_spi_regs),
381*4882a593Smuzhiyun 				 MAP_NOCACHE);
382*4882a593Smuzhiyun 	if (!ns->regs) {
383*4882a593Smuzhiyun 		printf("%s: could not map device address\n", __func__);
384*4882a593Smuzhiyun 		return -EINVAL;
385*4882a593Smuzhiyun 	}
386*4882a593Smuzhiyun 	ns->num_cs = fdtdec_get_int(blob, node, "num-cs", 4);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	return 0;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun static const struct dm_spi_ops atcspi200_spi_ops = {
392*4882a593Smuzhiyun 	.claim_bus	= atcspi200_spi_claim_bus,
393*4882a593Smuzhiyun 	.release_bus	= atcspi200_spi_release_bus,
394*4882a593Smuzhiyun 	.xfer		= atcspi200_spi_xfer,
395*4882a593Smuzhiyun 	.set_speed	= atcspi200_spi_set_speed,
396*4882a593Smuzhiyun 	.set_mode	= atcspi200_spi_set_mode,
397*4882a593Smuzhiyun };
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun static const struct udevice_id atcspi200_spi_ids[] = {
400*4882a593Smuzhiyun 	{ .compatible = "andestech,atcspi200" },
401*4882a593Smuzhiyun 	{ }
402*4882a593Smuzhiyun };
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun U_BOOT_DRIVER(atcspi200_spi) = {
405*4882a593Smuzhiyun 	.name = "atcspi200_spi",
406*4882a593Smuzhiyun 	.id = UCLASS_SPI,
407*4882a593Smuzhiyun 	.of_match = atcspi200_spi_ids,
408*4882a593Smuzhiyun 	.ops = &atcspi200_spi_ops,
409*4882a593Smuzhiyun 	.ofdata_to_platdata = atcspi200_ofdata_to_platadata,
410*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct nds_spi_slave),
411*4882a593Smuzhiyun 	.probe = atcspi200_spi_probe,
412*4882a593Smuzhiyun };
413