1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# (C) Copyright 2000-2007 3*4882a593Smuzhiyun# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun# There are many options which enable SPI, so make this library available 9*4882a593Smuzhiyunifdef CONFIG_DM_SPI 10*4882a593Smuzhiyunobj-y += spi-uclass.o 11*4882a593Smuzhiyunobj-$(CONFIG_SANDBOX) += spi-emul-uclass.o 12*4882a593Smuzhiyunobj-$(CONFIG_SOFT_SPI) += soft_spi.o 13*4882a593Smuzhiyunobj-$(CONFIG_SPI_MEM) += spi-mem.o 14*4882a593Smuzhiyunelse 15*4882a593Smuzhiyunobj-y += spi.o 16*4882a593Smuzhiyunobj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o 17*4882a593Smuzhiyunobj-$(CONFIG_SOFT_SPI) += soft_spi_legacy.o 18*4882a593Smuzhiyunendif 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunobj-$(CONFIG_ALTERA_SPI) += altera_spi.o 21*4882a593Smuzhiyunobj-$(CONFIG_ATH79_SPI) += ath79_spi.o 22*4882a593Smuzhiyunobj-$(CONFIG_ATMEL_SPI) += atmel_spi.o 23*4882a593Smuzhiyunobj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o 24*4882a593Smuzhiyunobj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o 25*4882a593Smuzhiyunobj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o 26*4882a593Smuzhiyunobj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o 27*4882a593Smuzhiyunobj-$(CONFIG_CF_SPI) += cf_spi.o 28*4882a593Smuzhiyunobj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o 29*4882a593Smuzhiyunobj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o 30*4882a593Smuzhiyunobj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o 31*4882a593Smuzhiyunobj-$(CONFIG_FSL_DSPI) += fsl_dspi.o 32*4882a593Smuzhiyunobj-$(CONFIG_FSL_ESPI) += fsl_espi.o 33*4882a593Smuzhiyunobj-$(CONFIG_FSL_QSPI) += fsl_qspi.o 34*4882a593Smuzhiyunobj-$(CONFIG_ICH_SPI) += ich.o 35*4882a593Smuzhiyunobj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o 36*4882a593Smuzhiyunobj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o 37*4882a593Smuzhiyunobj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o 38*4882a593Smuzhiyunobj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o 39*4882a593Smuzhiyunobj-$(CONFIG_MVEBU_A3700_SPI) += mvebu_a3700_spi.o 40*4882a593Smuzhiyunobj-$(CONFIG_MXC_SPI) += mxc_spi.o 41*4882a593Smuzhiyunobj-$(CONFIG_MXS_SPI) += mxs_spi.o 42*4882a593Smuzhiyunobj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o 43*4882a593Smuzhiyunobj-$(CONFIG_OMAP3_SPI) += omap3_spi.o 44*4882a593Smuzhiyunobj-$(CONFIG_PIC32_SPI) += pic32_spi.o 45*4882a593Smuzhiyunobj-$(CONFIG_RENESAS_RPC_SPI) += renesas_rpc_spi.o 46*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o 47*4882a593Smuzhiyunobj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o 48*4882a593Smuzhiyunobj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o 49*4882a593Smuzhiyunobj-$(CONFIG_SH_SPI) += sh_spi.o 50*4882a593Smuzhiyunobj-$(CONFIG_SH_QSPI) += sh_qspi.o 51*4882a593Smuzhiyunobj-$(CONFIG_STM32_QSPI) += stm32_qspi.o 52*4882a593Smuzhiyunobj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o 53*4882a593Smuzhiyunobj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o 54*4882a593Smuzhiyunobj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o 55*4882a593Smuzhiyunobj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o 56*4882a593Smuzhiyunobj-$(CONFIG_TI_QSPI) += ti_qspi.o 57*4882a593Smuzhiyunobj-$(CONFIG_XILINX_SPI) += xilinx_spi.o 58*4882a593Smuzhiyunobj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o 59*4882a593Smuzhiyunobj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o 60