1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <common.h>
7*4882a593Smuzhiyun #include <dm.h>
8*4882a593Smuzhiyun #include <power/pmic.h>
9*4882a593Smuzhiyun #include <power/rk8xx_pmic.h>
10*4882a593Smuzhiyun #include <sound.h>
11*4882a593Smuzhiyun #include "rk817_codec.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define DBG(format, ...) \
14*4882a593Smuzhiyun printf("RK817: " format, ## __VA_ARGS__)
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* For route */
17*4882a593Smuzhiyun #define RK817_CODEC_PLAYBACK 1
18*4882a593Smuzhiyun #define RK817_CODEC_CAPTURE 2
19*4882a593Smuzhiyun #define RK817_CODEC_INCALL 4
20*4882a593Smuzhiyun #define RK817_CODEC_ALL (RK817_CODEC_PLAYBACK |\
21*4882a593Smuzhiyun RK817_CODEC_CAPTURE | RK817_CODEC_INCALL)
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * DDAC L/R volume setting
25*4882a593Smuzhiyun * 0db~-95db,0.375db/step,for example:
26*4882a593Smuzhiyun * 0: 0dB
27*4882a593Smuzhiyun * 0x0a: -3.75dB
28*4882a593Smuzhiyun * 0x7d: -46dB
29*4882a593Smuzhiyun * 0xff: -95dB
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun #define OUT_VOLUME (0x03)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define CODEC_SET_SPK 1
34*4882a593Smuzhiyun #define CODEC_SET_HP 2
35*4882a593Smuzhiyun #define INITIAL_VOLUME 3
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct rk817_codec_priv {
38*4882a593Smuzhiyun struct udevice *dev;
39*4882a593Smuzhiyun struct rk8xx_priv *rk817;
40*4882a593Smuzhiyun unsigned int stereo_sysclk;
41*4882a593Smuzhiyun unsigned int rate;
42*4882a593Smuzhiyun unsigned int spk_volume;
43*4882a593Smuzhiyun unsigned int hp_volume;
44*4882a593Smuzhiyun bool use_ext_amplifier;
45*4882a593Smuzhiyun long int playback_path;
46*4882a593Smuzhiyun int spk_mute_delay;
47*4882a593Smuzhiyun int hp_mute_delay;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
snd_soc_write(struct udevice * dev,unsigned int reg,unsigned int val)50*4882a593Smuzhiyun static int snd_soc_write(struct udevice *dev, unsigned int reg,
51*4882a593Smuzhiyun unsigned int val)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun return pmic_reg_write(dev, reg, val);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
snd_soc_update_bits(struct udevice * dev,unsigned int reg,unsigned int mask,unsigned int value)56*4882a593Smuzhiyun static int snd_soc_update_bits(struct udevice *dev, unsigned int reg,
57*4882a593Smuzhiyun unsigned int mask, unsigned int value)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return pmic_clrsetbits(dev, reg, mask, value);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
rk817_reset(struct rk817_codec_priv * priv)62*4882a593Smuzhiyun static int rk817_reset(struct rk817_codec_priv *priv)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun struct udevice *codec = priv->dev->parent;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DTOP_LPT_SRST, 0x40);
67*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_POPD_DACST, 0x02);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct rk817_reg_val_typ playback_power_up_list[] = {
73*4882a593Smuzhiyun {RK817_CODEC_AREF_RTCFG1, 0x40},
74*4882a593Smuzhiyun {RK817_CODEC_DDAC_POPD_DACST, 0x02},
75*4882a593Smuzhiyun {RK817_CODEC_DDAC_SR_LMT0, 0x02},
76*4882a593Smuzhiyun /* {RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f}, */
77*4882a593Smuzhiyun /* APLL */
78*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG0, 0x04},
79*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG1, 0x58},
80*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG2, 0x2d},
81*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG3, 0x0c},
82*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG4, 0xa5},
83*4882a593Smuzhiyun {RK817_CODEC_APLL_CFG5, 0x00},
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun {RK817_CODEC_DI2S_RXCMD_TSD, 0x00},
86*4882a593Smuzhiyun {RK817_CODEC_DI2S_RSD, 0x00},
87*4882a593Smuzhiyun /* {RK817_CODEC_DI2S_CKM, 0x00}, */
88*4882a593Smuzhiyun {RK817_CODEC_DI2S_RXCR1, 0x00},
89*4882a593Smuzhiyun {RK817_CODEC_DI2S_RXCMD_TSD, 0x20},
90*4882a593Smuzhiyun {RK817_CODEC_DTOP_VUCTIME, 0xf4},
91*4882a593Smuzhiyun {RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00},
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun {RK817_CODEC_DDAC_VOLL, 0x0a},
94*4882a593Smuzhiyun {RK817_CODEC_DDAC_VOLR, 0x0a},
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun #define RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN \
98*4882a593Smuzhiyun ARRAY_SIZE(playback_power_up_list)
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static struct rk817_reg_val_typ playback_power_down_list[] = {
101*4882a593Smuzhiyun {RK817_CODEC_DDAC_MUTE_MIXCTL, 0x01},
102*4882a593Smuzhiyun {RK817_CODEC_ADAC_CFG1, 0x0f},
103*4882a593Smuzhiyun /* HP */
104*4882a593Smuzhiyun {RK817_CODEC_AHP_CFG0, 0xe0},
105*4882a593Smuzhiyun {RK817_CODEC_AHP_CP, 0x09},
106*4882a593Smuzhiyun /* SPK */
107*4882a593Smuzhiyun {RK817_CODEC_ACLASSD_CFG1, 0x69},
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #define RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN \
111*4882a593Smuzhiyun ARRAY_SIZE(playback_power_down_list)
112*4882a593Smuzhiyun
rk817_codec_power_up(struct rk817_codec_priv * rk817,int type)113*4882a593Smuzhiyun static int rk817_codec_power_up(struct rk817_codec_priv *rk817, int type)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct udevice *codec = rk817->dev->parent;
116*4882a593Smuzhiyun int i;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun DBG("%s : power up %s %s %s\n", __func__,
119*4882a593Smuzhiyun type & RK817_CODEC_PLAYBACK ? "playback" : "",
120*4882a593Smuzhiyun type & RK817_CODEC_CAPTURE ? "capture" : "",
121*4882a593Smuzhiyun type & RK817_CODEC_INCALL ? "incall" : "");
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (type & RK817_CODEC_PLAYBACK) {
124*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
125*4882a593Smuzhiyun DAC_DIG_CLK_MASK, DAC_DIG_CLK_EN);
126*4882a593Smuzhiyun for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) {
127*4882a593Smuzhiyun snd_soc_write(codec, playback_power_up_list[i].reg,
128*4882a593Smuzhiyun playback_power_up_list[i].value);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
rk817_codec_power_down(struct rk817_codec_priv * rk817,int type)135*4882a593Smuzhiyun static int rk817_codec_power_down(struct rk817_codec_priv *rk817, int type)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct udevice *codec = rk817->dev->parent;
138*4882a593Smuzhiyun int i;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun DBG("%s : power down %s %s %s\n", __func__,
141*4882a593Smuzhiyun type & RK817_CODEC_PLAYBACK ? "playback" : "",
142*4882a593Smuzhiyun type & RK817_CODEC_CAPTURE ? "capture" : "",
143*4882a593Smuzhiyun type & RK817_CODEC_INCALL ? "incall" : "");
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* mute output for pop noise */
146*4882a593Smuzhiyun if ((type & RK817_CODEC_PLAYBACK) ||
147*4882a593Smuzhiyun (type & RK817_CODEC_INCALL)) {
148*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
149*4882a593Smuzhiyun DACMT_ENABLE, DACMT_ENABLE);
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (type & RK817_CODEC_PLAYBACK) {
153*4882a593Smuzhiyun for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
154*4882a593Smuzhiyun snd_soc_write(codec, playback_power_down_list[i].reg,
155*4882a593Smuzhiyun playback_power_down_list[i].value);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
158*4882a593Smuzhiyun DAC_DIG_CLK_MASK, DAC_DIG_CLK_DIS);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun if (type == RK817_CODEC_ALL) {
162*4882a593Smuzhiyun for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
163*4882a593Smuzhiyun snd_soc_write(codec, playback_power_down_list[i].reg,
164*4882a593Smuzhiyun playback_power_down_list[i].value);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00);
167*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_APLL_CFG5, 0x01);
168*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AREF_RTCFG1, 0x06);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return 0;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
rk817_playback_path_put(struct rk817_codec_priv * rk817,int path)174*4882a593Smuzhiyun static int rk817_playback_path_put(struct rk817_codec_priv *rk817, int path)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct udevice *codec = rk817->dev->parent;
177*4882a593Smuzhiyun long int pre_path;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun if (rk817->playback_path == path) {
180*4882a593Smuzhiyun DBG("%s : playback_path is not changed!\n", __func__);
181*4882a593Smuzhiyun return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun pre_path = rk817->playback_path;
185*4882a593Smuzhiyun rk817->playback_path = path;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun DBG("%s : set playback_path %ld, pre_path %ld\n",
188*4882a593Smuzhiyun __func__, rk817->playback_path, pre_path);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun switch (rk817->playback_path) {
191*4882a593Smuzhiyun case OFF:
192*4882a593Smuzhiyun rk817_codec_power_down(rk817, RK817_CODEC_PLAYBACK);
193*4882a593Smuzhiyun break;
194*4882a593Smuzhiyun case RCV:
195*4882a593Smuzhiyun case SPK_PATH:
196*4882a593Smuzhiyun case RING_SPK:
197*4882a593Smuzhiyun if (pre_path == OFF)
198*4882a593Smuzhiyun rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
199*4882a593Smuzhiyun if (!rk817->use_ext_amplifier) {
200*4882a593Smuzhiyun /* power on dac ibias/l/r */
201*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
202*4882a593Smuzhiyun PWD_DACBIAS_ON | PWD_DACD_ON |
203*4882a593Smuzhiyun PWD_DACL_ON | PWD_DACR_ON);
204*4882a593Smuzhiyun /* CLASS D mode */
205*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
206*4882a593Smuzhiyun /* CLASS D enable */
207*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
208*4882a593Smuzhiyun /* restart CLASS D, OCPP/N */
209*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
210*4882a593Smuzhiyun } else {
211*4882a593Smuzhiyun /* HP_CP_EN , CP 2.3V */
212*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
213*4882a593Smuzhiyun /* power on HP two stage opamp ,HP amplitude 0db */
214*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
215*4882a593Smuzhiyun /* power on dac ibias/l/r */
216*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
217*4882a593Smuzhiyun PWD_DACBIAS_ON | PWD_DACD_DOWN |
218*4882a593Smuzhiyun PWD_DACL_ON | PWD_DACR_ON);
219*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
220*4882a593Smuzhiyun DACMT_ENABLE, DACMT_DISABLE);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->spk_volume);
223*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->spk_volume);
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun case HP_PATH:
226*4882a593Smuzhiyun case HP_NO_MIC:
227*4882a593Smuzhiyun case RING_HP:
228*4882a593Smuzhiyun case RING_HP_NO_MIC:
229*4882a593Smuzhiyun if (pre_path == OFF)
230*4882a593Smuzhiyun rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
231*4882a593Smuzhiyun /* HP_CP_EN , CP 2.3V */
232*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
233*4882a593Smuzhiyun /* power on HP two stage opamp ,HP amplitude 0db */
234*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
235*4882a593Smuzhiyun /* power on dac ibias/l/r */
236*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
237*4882a593Smuzhiyun PWD_DACBIAS_ON | PWD_DACD_DOWN |
238*4882a593Smuzhiyun PWD_DACL_ON | PWD_DACR_ON);
239*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
240*4882a593Smuzhiyun DACMT_ENABLE, DACMT_DISABLE);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
243*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun case BT:
246*4882a593Smuzhiyun break;
247*4882a593Smuzhiyun case SPK_HP:
248*4882a593Smuzhiyun case RING_SPK_HP:
249*4882a593Smuzhiyun if (pre_path == OFF)
250*4882a593Smuzhiyun rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /* HP_CP_EN , CP 2.3V */
253*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
254*4882a593Smuzhiyun /* power on HP two stage opamp ,HP amplitude 0db */
255*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* power on dac ibias/l/r */
258*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
259*4882a593Smuzhiyun PWD_DACBIAS_ON | PWD_DACD_ON |
260*4882a593Smuzhiyun PWD_DACL_ON | PWD_DACR_ON);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (!rk817->use_ext_amplifier) {
263*4882a593Smuzhiyun /* CLASS D mode */
264*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
265*4882a593Smuzhiyun /* CLASS D enable */
266*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
267*4882a593Smuzhiyun /* restart CLASS D, OCPP/N */
268*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
272*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun default:
275*4882a593Smuzhiyun return -EINVAL;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun return 0;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
rk817_hw_params(struct udevice * dev,unsigned int samplerate,unsigned int fmt,unsigned int channels)281*4882a593Smuzhiyun static int rk817_hw_params(struct udevice *dev, unsigned int samplerate,
282*4882a593Smuzhiyun unsigned int fmt, unsigned int channels)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct rk817_codec_priv *rk817 = dev_get_priv(dev);
285*4882a593Smuzhiyun struct udevice *codec = rk817->dev->parent;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DI2S_CKM,
288*4882a593Smuzhiyun RK817_I2S_MODE_MASK, RK817_I2S_MODE_SLV);
289*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DI2S_RXCR2, VDW_RX_16BITS);
290*4882a593Smuzhiyun snd_soc_write(codec, RK817_CODEC_DI2S_TXCR2, VDW_TX_16BITS);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
rk817_digital_mute(struct rk817_codec_priv * rk817,int mute)295*4882a593Smuzhiyun static int rk817_digital_mute(struct rk817_codec_priv *rk817, int mute)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun struct udevice *codec = rk817->dev->parent;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun if (mute)
300*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
301*4882a593Smuzhiyun DACMT_ENABLE, DACMT_ENABLE);
302*4882a593Smuzhiyun else
303*4882a593Smuzhiyun snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
304*4882a593Smuzhiyun DACMT_ENABLE, DACMT_DISABLE);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun return 0;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
rk817_startup(struct udevice * dev)309*4882a593Smuzhiyun static int rk817_startup(struct udevice *dev)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun struct rk817_codec_priv *rk817 = dev_get_priv(dev);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun rk817_playback_path_put(rk817, SPK_HP);
314*4882a593Smuzhiyun rk817_digital_mute(rk817, 0);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun return 0;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun static const struct snd_soc_dai_ops rk817_codec_ops = {
320*4882a593Smuzhiyun .hw_params = rk817_hw_params,
321*4882a593Smuzhiyun .startup = rk817_startup,
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun
rk817_codec_probe(struct udevice * dev)324*4882a593Smuzhiyun static int rk817_codec_probe(struct udevice *dev)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun struct rk8xx_priv *rk817 = dev_get_priv(dev->parent);
327*4882a593Smuzhiyun struct rk817_codec_priv *rk817_codec = dev_get_priv(dev);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun if (!rk817) {
330*4882a593Smuzhiyun printf("%s : rk817 is null\n", __func__);
331*4882a593Smuzhiyun return -EINVAL;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun switch (rk817->variant) {
335*4882a593Smuzhiyun case RK809_ID:
336*4882a593Smuzhiyun case RK817_ID:
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun default:
339*4882a593Smuzhiyun return -EINVAL;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun rk817_codec->dev = dev;
343*4882a593Smuzhiyun rk817_codec->hp_volume = INITIAL_VOLUME;
344*4882a593Smuzhiyun rk817_codec->spk_volume = INITIAL_VOLUME;
345*4882a593Smuzhiyun rk817_codec->playback_path = OFF;
346*4882a593Smuzhiyun rk817_reset(rk817_codec);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun return 0;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun static const struct udevice_id rk817_codec_ids[] = {
352*4882a593Smuzhiyun { .compatible = "rockchip,rk817-codec" },
353*4882a593Smuzhiyun { }
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun U_BOOT_DRIVER(rk817) = {
357*4882a593Smuzhiyun .name = "rk817_codec",
358*4882a593Smuzhiyun .id = UCLASS_CODEC,
359*4882a593Smuzhiyun .of_match = rk817_codec_ids,
360*4882a593Smuzhiyun .probe = rk817_codec_probe,
361*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct rk817_codec_priv),
362*4882a593Smuzhiyun .ops = &rk817_codec_ops,
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun UCLASS_DRIVER(codec) = {
366*4882a593Smuzhiyun .id = UCLASS_CODEC,
367*4882a593Smuzhiyun .name = "codec",
368*4882a593Smuzhiyun };
369