1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
3*4882a593Smuzhiyun * Clean driver and add xilinx constant from header file
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2004 Atmark Techno, Inc.
6*4882a593Smuzhiyun * Yasushi SHOJI <yashi@atmark-techno.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <config.h>
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <dm.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <linux/compiler.h>
16*4882a593Smuzhiyun #include <serial.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
21*4882a593Smuzhiyun #define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
22*4882a593Smuzhiyun #define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
23*4882a593Smuzhiyun #define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define ULITE_CONTROL_RST_TX 0x01
26*4882a593Smuzhiyun #define ULITE_CONTROL_RST_RX 0x02
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct uartlite {
29*4882a593Smuzhiyun unsigned int rx_fifo;
30*4882a593Smuzhiyun unsigned int tx_fifo;
31*4882a593Smuzhiyun unsigned int status;
32*4882a593Smuzhiyun unsigned int control;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct uartlite_platdata {
36*4882a593Smuzhiyun struct uartlite *regs;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
uartlite_serial_putc(struct udevice * dev,const char ch)39*4882a593Smuzhiyun static int uartlite_serial_putc(struct udevice *dev, const char ch)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct uartlite_platdata *plat = dev_get_platdata(dev);
42*4882a593Smuzhiyun struct uartlite *regs = plat->regs;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (in_be32(®s->status) & SR_TX_FIFO_FULL)
45*4882a593Smuzhiyun return -EAGAIN;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun out_be32(®s->tx_fifo, ch & 0xff);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
uartlite_serial_getc(struct udevice * dev)52*4882a593Smuzhiyun static int uartlite_serial_getc(struct udevice *dev)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct uartlite_platdata *plat = dev_get_platdata(dev);
55*4882a593Smuzhiyun struct uartlite *regs = plat->regs;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA))
58*4882a593Smuzhiyun return -EAGAIN;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return in_be32(®s->rx_fifo) & 0xff;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
uartlite_serial_pending(struct udevice * dev,bool input)63*4882a593Smuzhiyun static int uartlite_serial_pending(struct udevice *dev, bool input)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct uartlite_platdata *plat = dev_get_platdata(dev);
66*4882a593Smuzhiyun struct uartlite *regs = plat->regs;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (input)
69*4882a593Smuzhiyun return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return !(in_be32(®s->status) & SR_TX_FIFO_EMPTY);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
uartlite_serial_probe(struct udevice * dev)74*4882a593Smuzhiyun static int uartlite_serial_probe(struct udevice *dev)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct uartlite_platdata *plat = dev_get_platdata(dev);
77*4882a593Smuzhiyun struct uartlite *regs = plat->regs;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun out_be32(®s->control, 0);
80*4882a593Smuzhiyun out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
81*4882a593Smuzhiyun in_be32(®s->control);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
uartlite_serial_ofdata_to_platdata(struct udevice * dev)86*4882a593Smuzhiyun static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct uartlite_platdata *plat = dev_get_platdata(dev);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun plat->regs = (struct uartlite *)devfdt_get_addr(dev);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct dm_serial_ops uartlite_serial_ops = {
96*4882a593Smuzhiyun .putc = uartlite_serial_putc,
97*4882a593Smuzhiyun .pending = uartlite_serial_pending,
98*4882a593Smuzhiyun .getc = uartlite_serial_getc,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct udevice_id uartlite_serial_ids[] = {
102*4882a593Smuzhiyun { .compatible = "xlnx,opb-uartlite-1.00.b", },
103*4882a593Smuzhiyun { .compatible = "xlnx,xps-uartlite-1.00.a" },
104*4882a593Smuzhiyun { }
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun U_BOOT_DRIVER(serial_uartlite) = {
108*4882a593Smuzhiyun .name = "serial_uartlite",
109*4882a593Smuzhiyun .id = UCLASS_SERIAL,
110*4882a593Smuzhiyun .of_match = uartlite_serial_ids,
111*4882a593Smuzhiyun .ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
112*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
113*4882a593Smuzhiyun .probe = uartlite_serial_probe,
114*4882a593Smuzhiyun .ops = &uartlite_serial_ops,
115*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_UART_UARTLITE
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #include <debug_uart.h>
121*4882a593Smuzhiyun
_debug_uart_init(void)122*4882a593Smuzhiyun static inline void _debug_uart_init(void)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun out_be32(®s->control, 0);
127*4882a593Smuzhiyun out_be32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
128*4882a593Smuzhiyun in_be32(®s->control);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
_debug_uart_putc(int ch)131*4882a593Smuzhiyun static inline void _debug_uart_putc(int ch)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun while (in_be32(®s->status) & SR_TX_FIFO_FULL)
136*4882a593Smuzhiyun ;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun out_be32(®s->tx_fifo, ch & 0xff);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun DEBUG_UART_FUNCS
142*4882a593Smuzhiyun #endif
143