1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2015
3*4882a593Smuzhiyun * Kamil Lulko, <kamil.lulko@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <serial.h>
12*4882a593Smuzhiyun #include <asm/arch/stm32.h>
13*4882a593Smuzhiyun #include <dm/platform_data/serial_stm32.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun struct stm32_usart {
16*4882a593Smuzhiyun u32 sr;
17*4882a593Smuzhiyun u32 dr;
18*4882a593Smuzhiyun u32 brr;
19*4882a593Smuzhiyun u32 cr1;
20*4882a593Smuzhiyun u32 cr2;
21*4882a593Smuzhiyun u32 cr3;
22*4882a593Smuzhiyun u32 gtpr;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define USART_CR1_RE (1 << 2)
26*4882a593Smuzhiyun #define USART_CR1_TE (1 << 3)
27*4882a593Smuzhiyun #define USART_CR1_UE (1 << 13)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define USART_SR_FLAG_RXNE (1 << 5)
30*4882a593Smuzhiyun #define USART_SR_FLAG_TXE (1 << 7)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define USART_BRR_F_MASK 0xF
33*4882a593Smuzhiyun #define USART_BRR_M_SHIFT 4
34*4882a593Smuzhiyun #define USART_BRR_M_MASK 0xFFF0
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
37*4882a593Smuzhiyun
stm32_serial_setbrg(struct udevice * dev,int baudrate)38*4882a593Smuzhiyun static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun struct stm32_serial_platdata *plat = dev->platdata;
41*4882a593Smuzhiyun struct stm32_usart *const usart = plat->base;
42*4882a593Smuzhiyun u32 clock, int_div, frac_div, tmp;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE)
45*4882a593Smuzhiyun clock = clock_get(CLOCK_APB1);
46*4882a593Smuzhiyun else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE)
47*4882a593Smuzhiyun clock = clock_get(CLOCK_APB2);
48*4882a593Smuzhiyun else
49*4882a593Smuzhiyun return -EINVAL;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun int_div = (25 * clock) / (4 * baudrate);
52*4882a593Smuzhiyun tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK;
53*4882a593Smuzhiyun frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT));
54*4882a593Smuzhiyun tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK;
55*4882a593Smuzhiyun writel(tmp, &usart->brr);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
stm32_serial_getc(struct udevice * dev)60*4882a593Smuzhiyun static int stm32_serial_getc(struct udevice *dev)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun struct stm32_serial_platdata *plat = dev->platdata;
63*4882a593Smuzhiyun struct stm32_usart *const usart = plat->base;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
66*4882a593Smuzhiyun return -EAGAIN;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return readl(&usart->dr);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
stm32_serial_putc(struct udevice * dev,const char c)71*4882a593Smuzhiyun static int stm32_serial_putc(struct udevice *dev, const char c)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun struct stm32_serial_platdata *plat = dev->platdata;
74*4882a593Smuzhiyun struct stm32_usart *const usart = plat->base;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
77*4882a593Smuzhiyun return -EAGAIN;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun writel(c, &usart->dr);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
stm32_serial_pending(struct udevice * dev,bool input)84*4882a593Smuzhiyun static int stm32_serial_pending(struct udevice *dev, bool input)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct stm32_serial_platdata *plat = dev->platdata;
87*4882a593Smuzhiyun struct stm32_usart *const usart = plat->base;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (input)
90*4882a593Smuzhiyun return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
91*4882a593Smuzhiyun else
92*4882a593Smuzhiyun return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
stm32_serial_probe(struct udevice * dev)95*4882a593Smuzhiyun static int stm32_serial_probe(struct udevice *dev)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun struct stm32_serial_platdata *plat = dev->platdata;
98*4882a593Smuzhiyun struct stm32_usart *const usart = plat->base;
99*4882a593Smuzhiyun setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static const struct dm_serial_ops stm32_serial_ops = {
105*4882a593Smuzhiyun .putc = stm32_serial_putc,
106*4882a593Smuzhiyun .pending = stm32_serial_pending,
107*4882a593Smuzhiyun .getc = stm32_serial_getc,
108*4882a593Smuzhiyun .setbrg = stm32_serial_setbrg,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun U_BOOT_DRIVER(serial_stm32) = {
112*4882a593Smuzhiyun .name = "serial_stm32",
113*4882a593Smuzhiyun .id = UCLASS_SERIAL,
114*4882a593Smuzhiyun .ops = &stm32_serial_ops,
115*4882a593Smuzhiyun .probe = stm32_serial_probe,
116*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
117*4882a593Smuzhiyun };
118