1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2015 Google, Inc
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <debug_uart.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <dt-structs.h>
11*4882a593Smuzhiyun #include <ns16550.h>
12*4882a593Smuzhiyun #include <serial.h>
13*4882a593Smuzhiyun #include <asm/arch/clock.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_RK3188)
16*4882a593Smuzhiyun struct rockchip_uart_platdata {
17*4882a593Smuzhiyun struct dtd_rockchip_rk3188_uart dtplat;
18*4882a593Smuzhiyun struct ns16550_platdata plat;
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun struct dtd_rockchip_rk3188_uart *dtplat, s_dtplat;
21*4882a593Smuzhiyun #elif defined(CONFIG_ROCKCHIP_RK3288)
22*4882a593Smuzhiyun struct rockchip_uart_platdata {
23*4882a593Smuzhiyun struct dtd_rockchip_rk3288_uart dtplat;
24*4882a593Smuzhiyun struct ns16550_platdata plat;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;
27*4882a593Smuzhiyun #endif
28*4882a593Smuzhiyun
rockchip_serial_probe(struct udevice * dev)29*4882a593Smuzhiyun static int rockchip_serial_probe(struct udevice *dev)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct rockchip_uart_platdata *plat = dev_get_platdata(dev);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Create some new platform data for the standard driver */
34*4882a593Smuzhiyun plat->plat.base = plat->dtplat.reg[0];
35*4882a593Smuzhiyun plat->plat.reg_shift = plat->dtplat.reg_shift;
36*4882a593Smuzhiyun plat->plat.clock = plat->dtplat.clock_frequency;
37*4882a593Smuzhiyun plat->plat.fcr = UART_FCR_DEFVAL;
38*4882a593Smuzhiyun dev->platdata = &plat->plat;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return ns16550_serial_probe(dev);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3188_uart) = {
44*4882a593Smuzhiyun .name = "rockchip_rk3188_uart",
45*4882a593Smuzhiyun .id = UCLASS_SERIAL,
46*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct NS16550),
47*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct rockchip_uart_platdata),
48*4882a593Smuzhiyun .probe = rockchip_serial_probe,
49*4882a593Smuzhiyun .ops = &ns16550_serial_ops,
50*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rk3288_uart) = {
54*4882a593Smuzhiyun .name = "rockchip_rk3288_uart",
55*4882a593Smuzhiyun .id = UCLASS_SERIAL,
56*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct NS16550),
57*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct rockchip_uart_platdata),
58*4882a593Smuzhiyun .probe = rockchip_serial_probe,
59*4882a593Smuzhiyun .ops = &ns16550_serial_ops,
60*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
61*4882a593Smuzhiyun };
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