1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008
3*4882a593Smuzhiyun * Gururaja Hebbar gururajakr@sanyo.co.in
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <command.h>
12*4882a593Smuzhiyun #include <rtc.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #if defined(CONFIG_CMD_DATE)
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #ifndef CONFIG_SYS_RTC_PL031_BASE
17*4882a593Smuzhiyun #error CONFIG_SYS_RTC_PL031_BASE is not defined!
18*4882a593Smuzhiyun #endif
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * Register definitions
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun #define RTC_DR 0x00 /* Data read register */
24*4882a593Smuzhiyun #define RTC_MR 0x04 /* Match register */
25*4882a593Smuzhiyun #define RTC_LR 0x08 /* Data load register */
26*4882a593Smuzhiyun #define RTC_CR 0x0c /* Control register */
27*4882a593Smuzhiyun #define RTC_IMSC 0x10 /* Interrupt mask and set register */
28*4882a593Smuzhiyun #define RTC_RIS 0x14 /* Raw interrupt status register */
29*4882a593Smuzhiyun #define RTC_MIS 0x18 /* Masked interrupt status register */
30*4882a593Smuzhiyun #define RTC_ICR 0x1c /* Interrupt clear register */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define RTC_CR_START (1 << 0)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define RTC_WRITE_REG(addr, val) \
35*4882a593Smuzhiyun (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)) = (val))
36*4882a593Smuzhiyun #define RTC_READ_REG(addr) \
37*4882a593Smuzhiyun (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE + (addr)))
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static int pl031_initted = 0;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Enable RTC Start in Control register*/
rtc_init(void)42*4882a593Smuzhiyun void rtc_init(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun RTC_WRITE_REG(RTC_CR, RTC_CR_START);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun pl031_initted = 1;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun * Reset the RTC. We set the date back to 1970-01-01.
51*4882a593Smuzhiyun */
rtc_reset(void)52*4882a593Smuzhiyun void rtc_reset(void)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun RTC_WRITE_REG(RTC_LR, 0x00);
55*4882a593Smuzhiyun if(!pl031_initted)
56*4882a593Smuzhiyun rtc_init();
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun * Set the RTC
61*4882a593Smuzhiyun */
rtc_set(struct rtc_time * tmp)62*4882a593Smuzhiyun int rtc_set(struct rtc_time *tmp)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun unsigned long tim;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if(!pl031_initted)
67*4882a593Smuzhiyun rtc_init();
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun if (tmp == NULL) {
70*4882a593Smuzhiyun puts("Error setting the date/time\n");
71*4882a593Smuzhiyun return -1;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* Calculate number of seconds this incoming time represents */
75*4882a593Smuzhiyun tim = rtc_mktime(tmp);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun RTC_WRITE_REG(RTC_LR, tim);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return -1;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /*
83*4882a593Smuzhiyun * Get the current time from the RTC
84*4882a593Smuzhiyun */
rtc_get(struct rtc_time * tmp)85*4882a593Smuzhiyun int rtc_get(struct rtc_time *tmp)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun ulong tim;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if(!pl031_initted)
90*4882a593Smuzhiyun rtc_init();
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun if (tmp == NULL) {
93*4882a593Smuzhiyun puts("Error getting the date/time\n");
94*4882a593Smuzhiyun return -1;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun tim = RTC_READ_REG(RTC_DR);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun rtc_to_tm(tim, tmp);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
102*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
103*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #endif
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