1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2001
3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Date & Time support for Philips PCF8563 RTC
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* #define DEBUG */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <command.h>
16*4882a593Smuzhiyun #include <rtc.h>
17*4882a593Smuzhiyun #include <i2c.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #if defined(CONFIG_CMD_DATE)
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static uchar rtc_read (uchar reg);
22*4882a593Smuzhiyun static void rtc_write (uchar reg, uchar val);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
25*4882a593Smuzhiyun
rtc_get(struct rtc_time * tmp)26*4882a593Smuzhiyun int rtc_get (struct rtc_time *tmp)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun int rel = 0;
29*4882a593Smuzhiyun uchar sec, min, hour, mday, wday, mon_cent, year;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun sec = rtc_read (0x02);
32*4882a593Smuzhiyun min = rtc_read (0x03);
33*4882a593Smuzhiyun hour = rtc_read (0x04);
34*4882a593Smuzhiyun mday = rtc_read (0x05);
35*4882a593Smuzhiyun wday = rtc_read (0x06);
36*4882a593Smuzhiyun mon_cent= rtc_read (0x07);
37*4882a593Smuzhiyun year = rtc_read (0x08);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun debug ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
40*4882a593Smuzhiyun "hr: %02x min: %02x sec: %02x\n",
41*4882a593Smuzhiyun year, mon_cent, mday, wday,
42*4882a593Smuzhiyun hour, min, sec );
43*4882a593Smuzhiyun debug ( "Alarms: wday: %02x day: %02x hour: %02x min: %02x\n",
44*4882a593Smuzhiyun rtc_read (0x0C),
45*4882a593Smuzhiyun rtc_read (0x0B),
46*4882a593Smuzhiyun rtc_read (0x0A),
47*4882a593Smuzhiyun rtc_read (0x09) );
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (sec & 0x80) {
50*4882a593Smuzhiyun puts ("### Warning: RTC Low Voltage - date/time not reliable\n");
51*4882a593Smuzhiyun rel = -1;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun tmp->tm_sec = bcd2bin (sec & 0x7F);
55*4882a593Smuzhiyun tmp->tm_min = bcd2bin (min & 0x7F);
56*4882a593Smuzhiyun tmp->tm_hour = bcd2bin (hour & 0x3F);
57*4882a593Smuzhiyun tmp->tm_mday = bcd2bin (mday & 0x3F);
58*4882a593Smuzhiyun tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
59*4882a593Smuzhiyun tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 1900 : 2000);
60*4882a593Smuzhiyun tmp->tm_wday = bcd2bin (wday & 0x07);
61*4882a593Smuzhiyun tmp->tm_yday = 0;
62*4882a593Smuzhiyun tmp->tm_isdst= 0;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
65*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
66*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return rel;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
rtc_set(struct rtc_time * tmp)71*4882a593Smuzhiyun int rtc_set (struct rtc_time *tmp)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun uchar century;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
76*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
77*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun rtc_write (0x08, bin2bcd(tmp->tm_year % 100));
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun century = (tmp->tm_year >= 2000) ? 0 : 0x80;
82*4882a593Smuzhiyun rtc_write (0x07, bin2bcd(tmp->tm_mon) | century);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun rtc_write (0x06, bin2bcd(tmp->tm_wday));
85*4882a593Smuzhiyun rtc_write (0x05, bin2bcd(tmp->tm_mday));
86*4882a593Smuzhiyun rtc_write (0x04, bin2bcd(tmp->tm_hour));
87*4882a593Smuzhiyun rtc_write (0x03, bin2bcd(tmp->tm_min ));
88*4882a593Smuzhiyun rtc_write (0x02, bin2bcd(tmp->tm_sec ));
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
rtc_reset(void)93*4882a593Smuzhiyun void rtc_reset (void)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun /* clear all control & status registers */
96*4882a593Smuzhiyun rtc_write (0x00, 0x00);
97*4882a593Smuzhiyun rtc_write (0x01, 0x00);
98*4882a593Smuzhiyun rtc_write (0x0D, 0x00);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* clear Voltage Low bit */
101*4882a593Smuzhiyun rtc_write (0x02, rtc_read (0x02) & 0x7F);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* reset all alarms */
104*4882a593Smuzhiyun rtc_write (0x09, 0x00);
105*4882a593Smuzhiyun rtc_write (0x0A, 0x00);
106*4882a593Smuzhiyun rtc_write (0x0B, 0x00);
107*4882a593Smuzhiyun rtc_write (0x0C, 0x00);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
111*4882a593Smuzhiyun
rtc_read(uchar reg)112*4882a593Smuzhiyun static uchar rtc_read (uchar reg)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
rtc_write(uchar reg,uchar val)117*4882a593Smuzhiyun static void rtc_write (uchar reg, uchar val)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #endif
123