1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3*4882a593Smuzhiyun * Andreas Heppel <aheppel@sysgo.de>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Date & Time support for the MK48T59 RTC
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #undef RTC_DEBUG
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <command.h>
16*4882a593Smuzhiyun #include <config.h>
17*4882a593Smuzhiyun #include <rtc.h>
18*4882a593Smuzhiyun #include <mk48t59.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #if defined(CONFIG_BAB7xx)
21*4882a593Smuzhiyun
rtc_read(short reg)22*4882a593Smuzhiyun static uchar rtc_read (short reg)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun out8(RTC_PORT_ADDR0, reg & 0xFF);
25*4882a593Smuzhiyun out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
26*4882a593Smuzhiyun return in8(RTC_PORT_DATA);
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
rtc_write(short reg,uchar val)29*4882a593Smuzhiyun static void rtc_write (short reg, uchar val)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun out8(RTC_PORT_ADDR0, reg & 0xFF);
32*4882a593Smuzhiyun out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
33*4882a593Smuzhiyun out8(RTC_PORT_DATA, val);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #elif defined(CONFIG_EVAL5200)
37*4882a593Smuzhiyun
rtc_read(short reg)38*4882a593Smuzhiyun static uchar rtc_read (short reg)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return in8(RTC(reg));
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
rtc_write(short reg,uchar val)43*4882a593Smuzhiyun static void rtc_write (short reg, uchar val)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun out8(RTC(reg),val);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #else
49*4882a593Smuzhiyun # error Board specific rtc access functions should be supplied
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
53*4882a593Smuzhiyun
nvram_read(void * dest,const short src,size_t count)54*4882a593Smuzhiyun void *nvram_read(void *dest, const short src, size_t count)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun uchar *d = (uchar *) dest;
57*4882a593Smuzhiyun short s = src;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun while (count--)
60*4882a593Smuzhiyun *d++ = rtc_read(s++);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return dest;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
nvram_write(short dest,const void * src,size_t count)65*4882a593Smuzhiyun void nvram_write(short dest, const void *src, size_t count)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun short d = dest;
68*4882a593Smuzhiyun uchar *s = (uchar *) src;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun while (count--)
71*4882a593Smuzhiyun rtc_write(d++, *s++);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #if defined(CONFIG_CMD_DATE)
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
77*4882a593Smuzhiyun
rtc_get(struct rtc_time * tmp)78*4882a593Smuzhiyun int rtc_get (struct rtc_time *tmp)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun uchar save_ctrl_a;
81*4882a593Smuzhiyun uchar sec, min, hour, mday, wday, mon, year;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* Simple: freeze the clock, read it and allow updates again */
84*4882a593Smuzhiyun save_ctrl_a = rtc_read(RTC_CONTROLA);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* Set the register to read the value. */
87*4882a593Smuzhiyun save_ctrl_a |= RTC_CA_READ;
88*4882a593Smuzhiyun rtc_write(RTC_CONTROLA, save_ctrl_a);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun sec = rtc_read (RTC_SECONDS);
91*4882a593Smuzhiyun min = rtc_read (RTC_MINUTES);
92*4882a593Smuzhiyun hour = rtc_read (RTC_HOURS);
93*4882a593Smuzhiyun mday = rtc_read (RTC_DAY_OF_MONTH);
94*4882a593Smuzhiyun wday = rtc_read (RTC_DAY_OF_WEEK);
95*4882a593Smuzhiyun mon = rtc_read (RTC_MONTH);
96*4882a593Smuzhiyun year = rtc_read (RTC_YEAR);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* re-enable update */
99*4882a593Smuzhiyun save_ctrl_a &= ~RTC_CA_READ;
100*4882a593Smuzhiyun rtc_write(RTC_CONTROLA, save_ctrl_a);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun #ifdef RTC_DEBUG
103*4882a593Smuzhiyun printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
104*4882a593Smuzhiyun "hr: %02x min: %02x sec: %02x\n",
105*4882a593Smuzhiyun year, mon, mday, wday,
106*4882a593Smuzhiyun hour, min, sec );
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun tmp->tm_sec = bcd2bin (sec & 0x7F);
109*4882a593Smuzhiyun tmp->tm_min = bcd2bin (min & 0x7F);
110*4882a593Smuzhiyun tmp->tm_hour = bcd2bin (hour & 0x3F);
111*4882a593Smuzhiyun tmp->tm_mday = bcd2bin (mday & 0x3F);
112*4882a593Smuzhiyun tmp->tm_mon = bcd2bin (mon & 0x1F);
113*4882a593Smuzhiyun tmp->tm_year = bcd2bin (year);
114*4882a593Smuzhiyun tmp->tm_wday = bcd2bin (wday & 0x07);
115*4882a593Smuzhiyun if(tmp->tm_year<70)
116*4882a593Smuzhiyun tmp->tm_year+=2000;
117*4882a593Smuzhiyun else
118*4882a593Smuzhiyun tmp->tm_year+=1900;
119*4882a593Smuzhiyun tmp->tm_yday = 0;
120*4882a593Smuzhiyun tmp->tm_isdst= 0;
121*4882a593Smuzhiyun #ifdef RTC_DEBUG
122*4882a593Smuzhiyun printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
123*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
124*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
rtc_set(struct rtc_time * tmp)130*4882a593Smuzhiyun int rtc_set (struct rtc_time *tmp)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun uchar save_ctrl_a;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #ifdef RTC_DEBUG
135*4882a593Smuzhiyun printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
136*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
137*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
138*4882a593Smuzhiyun #endif
139*4882a593Smuzhiyun save_ctrl_a = rtc_read(RTC_CONTROLA);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun save_ctrl_a |= RTC_CA_WRITE;
142*4882a593Smuzhiyun rtc_write(RTC_CONTROLA, save_ctrl_a); /* disables the RTC to update the regs */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
145*4882a593Smuzhiyun rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
148*4882a593Smuzhiyun rtc_write (RTC_DAY_OF_MONTH, bin2bcd(tmp->tm_mday));
149*4882a593Smuzhiyun rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
150*4882a593Smuzhiyun rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
151*4882a593Smuzhiyun rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec ));
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun save_ctrl_a &= ~RTC_CA_WRITE;
154*4882a593Smuzhiyun rtc_write(RTC_CONTROLA, save_ctrl_a); /* enables the RTC to update the regs */
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
rtc_reset(void)159*4882a593Smuzhiyun void rtc_reset (void)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun uchar control_b;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /*
164*4882a593Smuzhiyun * Start oscillator here.
165*4882a593Smuzhiyun */
166*4882a593Smuzhiyun control_b = rtc_read(RTC_CONTROLB);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun control_b &= ~RTC_CB_STOP;
169*4882a593Smuzhiyun rtc_write(RTC_CONTROLB, control_b);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
rtc_set_watchdog(short multi,short res)172*4882a593Smuzhiyun void rtc_set_watchdog(short multi, short res)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun uchar wd_value;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3);
177*4882a593Smuzhiyun rtc_write(RTC_WATCHDOG, wd_value);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun #endif
181