1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2004
3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Date & Time support for MAXIM MAX6900 RTC
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* #define DEBUG */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <command.h>
16*4882a593Smuzhiyun #include <rtc.h>
17*4882a593Smuzhiyun #include <i2c.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #if defined(CONFIG_CMD_DATE)
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #ifndef CONFIG_SYS_I2C_RTC_ADDR
22*4882a593Smuzhiyun #define CONFIG_SYS_I2C_RTC_ADDR 0x50
23*4882a593Smuzhiyun #endif
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
26*4882a593Smuzhiyun
rtc_read(uchar reg)27*4882a593Smuzhiyun static uchar rtc_read (uchar reg)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
rtc_write(uchar reg,uchar val)32*4882a593Smuzhiyun static void rtc_write (uchar reg, uchar val)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
35*4882a593Smuzhiyun udelay(2500);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
39*4882a593Smuzhiyun
rtc_get(struct rtc_time * tmp)40*4882a593Smuzhiyun int rtc_get (struct rtc_time *tmp)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun uchar sec, min, hour, mday, wday, mon, cent, year;
43*4882a593Smuzhiyun int retry = 1;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun do {
46*4882a593Smuzhiyun sec = rtc_read (0x80);
47*4882a593Smuzhiyun min = rtc_read (0x82);
48*4882a593Smuzhiyun hour = rtc_read (0x84);
49*4882a593Smuzhiyun mday = rtc_read (0x86);
50*4882a593Smuzhiyun mon = rtc_read (0x88);
51*4882a593Smuzhiyun wday = rtc_read (0x8a);
52*4882a593Smuzhiyun year = rtc_read (0x8c);
53*4882a593Smuzhiyun cent = rtc_read (0x92);
54*4882a593Smuzhiyun /*
55*4882a593Smuzhiyun * Check for seconds rollover
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun if ((sec != 59) || (rtc_read(0x80) == sec)){
58*4882a593Smuzhiyun retry = 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun } while (retry);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun debug ( "Get RTC year: %02x mon: %02x cent: %02x mday: %02x wday: %02x "
63*4882a593Smuzhiyun "hr: %02x min: %02x sec: %02x\n",
64*4882a593Smuzhiyun year, mon, cent, mday, wday,
65*4882a593Smuzhiyun hour, min, sec );
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun tmp->tm_sec = bcd2bin (sec & 0x7F);
68*4882a593Smuzhiyun tmp->tm_min = bcd2bin (min & 0x7F);
69*4882a593Smuzhiyun tmp->tm_hour = bcd2bin (hour & 0x3F);
70*4882a593Smuzhiyun tmp->tm_mday = bcd2bin (mday & 0x3F);
71*4882a593Smuzhiyun tmp->tm_mon = bcd2bin (mon & 0x1F);
72*4882a593Smuzhiyun tmp->tm_year = bcd2bin (year) + bcd2bin(cent) * 100;
73*4882a593Smuzhiyun tmp->tm_wday = bcd2bin (wday & 0x07);
74*4882a593Smuzhiyun tmp->tm_yday = 0;
75*4882a593Smuzhiyun tmp->tm_isdst= 0;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
78*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
79*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
rtc_set(struct rtc_time * tmp)84*4882a593Smuzhiyun int rtc_set (struct rtc_time *tmp)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
88*4882a593Smuzhiyun tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
89*4882a593Smuzhiyun tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun rtc_write (0x9E, 0x00);
92*4882a593Smuzhiyun rtc_write (0x80, 0); /* Clear seconds to ensure no rollover */
93*4882a593Smuzhiyun rtc_write (0x92, bin2bcd(tmp->tm_year / 100));
94*4882a593Smuzhiyun rtc_write (0x8c, bin2bcd(tmp->tm_year % 100));
95*4882a593Smuzhiyun rtc_write (0x8a, bin2bcd(tmp->tm_wday));
96*4882a593Smuzhiyun rtc_write (0x88, bin2bcd(tmp->tm_mon));
97*4882a593Smuzhiyun rtc_write (0x86, bin2bcd(tmp->tm_mday));
98*4882a593Smuzhiyun rtc_write (0x84, bin2bcd(tmp->tm_hour));
99*4882a593Smuzhiyun rtc_write (0x82, bin2bcd(tmp->tm_min ));
100*4882a593Smuzhiyun rtc_write (0x80, bin2bcd(tmp->tm_sec ));
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
rtc_reset(void)105*4882a593Smuzhiyun void rtc_reset (void)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #endif
110