1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Driver for ST M41T94 SPI RTC
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Taken from the Linux kernel drivier:
5*4882a593Smuzhiyun * Copyright (C) 2008 Kim B. Heino
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Adaptation for U-Boot:
8*4882a593Smuzhiyun * Copyright (C) 2009
9*4882a593Smuzhiyun * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
12*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
13*4882a593Smuzhiyun * published by the Free Software Foundation.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <common.h>
17*4882a593Smuzhiyun #include <rtc.h>
18*4882a593Smuzhiyun #include <spi.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static struct spi_slave *slave;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define M41T94_REG_SECONDS 0x01
23*4882a593Smuzhiyun #define M41T94_REG_MINUTES 0x02
24*4882a593Smuzhiyun #define M41T94_REG_HOURS 0x03
25*4882a593Smuzhiyun #define M41T94_REG_WDAY 0x04
26*4882a593Smuzhiyun #define M41T94_REG_DAY 0x05
27*4882a593Smuzhiyun #define M41T94_REG_MONTH 0x06
28*4882a593Smuzhiyun #define M41T94_REG_YEAR 0x07
29*4882a593Smuzhiyun #define M41T94_REG_HT 0x0c
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define M41T94_BIT_HALT 0x40
32*4882a593Smuzhiyun #define M41T94_BIT_STOP 0x80
33*4882a593Smuzhiyun #define M41T94_BIT_CB 0x40
34*4882a593Smuzhiyun #define M41T94_BIT_CEB 0x80
35*4882a593Smuzhiyun
rtc_set(struct rtc_time * tm)36*4882a593Smuzhiyun int rtc_set(struct rtc_time *tm)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun u8 buf[8]; /* write cmd + 7 registers */
39*4882a593Smuzhiyun int ret;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (!slave) {
42*4882a593Smuzhiyun slave = spi_setup_slave(CONFIG_M41T94_SPI_BUS,
43*4882a593Smuzhiyun CONFIG_M41T94_SPI_CS, 1000000,
44*4882a593Smuzhiyun SPI_MODE_3);
45*4882a593Smuzhiyun if (!slave)
46*4882a593Smuzhiyun return -1;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun spi_claim_bus(slave);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_SECONDS; /* write time + date */
51*4882a593Smuzhiyun buf[M41T94_REG_SECONDS] = bin2bcd(tm->tm_sec);
52*4882a593Smuzhiyun buf[M41T94_REG_MINUTES] = bin2bcd(tm->tm_min);
53*4882a593Smuzhiyun buf[M41T94_REG_HOURS] = bin2bcd(tm->tm_hour);
54*4882a593Smuzhiyun buf[M41T94_REG_WDAY] = bin2bcd(tm->tm_wday + 1);
55*4882a593Smuzhiyun buf[M41T94_REG_DAY] = bin2bcd(tm->tm_mday);
56*4882a593Smuzhiyun buf[M41T94_REG_MONTH] = bin2bcd(tm->tm_mon + 1);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun buf[M41T94_REG_HOURS] |= M41T94_BIT_CEB;
59*4882a593Smuzhiyun if (tm->tm_year >= 100)
60*4882a593Smuzhiyun buf[M41T94_REG_HOURS] |= M41T94_BIT_CB;
61*4882a593Smuzhiyun buf[M41T94_REG_YEAR] = bin2bcd(tm->tm_year % 100);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun ret = spi_xfer(slave, 64, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
64*4882a593Smuzhiyun spi_release_bus(slave);
65*4882a593Smuzhiyun return ret;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
rtc_get(struct rtc_time * tm)68*4882a593Smuzhiyun int rtc_get(struct rtc_time *tm)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun u8 buf[2];
71*4882a593Smuzhiyun int ret, hour;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun if (!slave) {
74*4882a593Smuzhiyun slave = spi_setup_slave(CONFIG_M41T94_SPI_BUS,
75*4882a593Smuzhiyun CONFIG_M41T94_SPI_CS, 1000000,
76*4882a593Smuzhiyun SPI_MODE_3);
77*4882a593Smuzhiyun if (!slave)
78*4882a593Smuzhiyun return -1;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun spi_claim_bus(slave);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* clear halt update bit */
83*4882a593Smuzhiyun ret = spi_w8r8(slave, M41T94_REG_HT);
84*4882a593Smuzhiyun if (ret < 0)
85*4882a593Smuzhiyun return ret;
86*4882a593Smuzhiyun if (ret & M41T94_BIT_HALT) {
87*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_HT;
88*4882a593Smuzhiyun buf[1] = ret & ~M41T94_BIT_HALT;
89*4882a593Smuzhiyun spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* clear stop bit */
93*4882a593Smuzhiyun ret = spi_w8r8(slave, M41T94_REG_SECONDS);
94*4882a593Smuzhiyun if (ret < 0)
95*4882a593Smuzhiyun return ret;
96*4882a593Smuzhiyun if (ret & M41T94_BIT_STOP) {
97*4882a593Smuzhiyun buf[0] = 0x80 | M41T94_REG_SECONDS;
98*4882a593Smuzhiyun buf[1] = ret & ~M41T94_BIT_STOP;
99*4882a593Smuzhiyun spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun tm->tm_sec = bcd2bin(spi_w8r8(slave, M41T94_REG_SECONDS));
103*4882a593Smuzhiyun tm->tm_min = bcd2bin(spi_w8r8(slave, M41T94_REG_MINUTES));
104*4882a593Smuzhiyun hour = spi_w8r8(slave, M41T94_REG_HOURS);
105*4882a593Smuzhiyun tm->tm_hour = bcd2bin(hour & 0x3f);
106*4882a593Smuzhiyun tm->tm_wday = bcd2bin(spi_w8r8(slave, M41T94_REG_WDAY)) - 1;
107*4882a593Smuzhiyun tm->tm_mday = bcd2bin(spi_w8r8(slave, M41T94_REG_DAY));
108*4882a593Smuzhiyun tm->tm_mon = bcd2bin(spi_w8r8(slave, M41T94_REG_MONTH)) - 1;
109*4882a593Smuzhiyun tm->tm_year = bcd2bin(spi_w8r8(slave, M41T94_REG_YEAR));
110*4882a593Smuzhiyun if ((hour & M41T94_BIT_CB) || !(hour & M41T94_BIT_CEB))
111*4882a593Smuzhiyun tm->tm_year += 100;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun spi_release_bus(slave);
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
rtc_reset(void)117*4882a593Smuzhiyun void rtc_reset(void)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun * Could not be tested as the reset pin is not wired on
121*4882a593Smuzhiyun * the sbc35-ag20 board
122*4882a593Smuzhiyun */
123*4882a593Smuzhiyun }
124