1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Simulate an I2C real time clock
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2015 Google, Inc
5*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * This is a test driver. It starts off with the current time of the machine,
12*4882a593Smuzhiyun * but also supports setting the time, using an offset from the current
13*4882a593Smuzhiyun * clock. This driver is only intended for testing, not accurate
14*4882a593Smuzhiyun * time-keeping. It does not change the system time.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <common.h>
18*4882a593Smuzhiyun #include <dm.h>
19*4882a593Smuzhiyun #include <i2c.h>
20*4882a593Smuzhiyun #include <os.h>
21*4882a593Smuzhiyun #include <rtc.h>
22*4882a593Smuzhiyun #include <asm/rtc.h>
23*4882a593Smuzhiyun #include <asm/test.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #ifdef DEBUG
26*4882a593Smuzhiyun #define debug_buffer print_buffer
27*4882a593Smuzhiyun #else
28*4882a593Smuzhiyun #define debug_buffer(x, ...)
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /**
34*4882a593Smuzhiyun * struct sandbox_i2c_rtc_plat_data - platform data for the RTC
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * @base_time: Base system time when RTC device was bound
37*4882a593Smuzhiyun * @offset: RTC offset from current system time
38*4882a593Smuzhiyun * @use_system_time: true to use system time, false to use @base_time
39*4882a593Smuzhiyun * @reg: Register values
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data {
42*4882a593Smuzhiyun long base_time;
43*4882a593Smuzhiyun long offset;
44*4882a593Smuzhiyun bool use_system_time;
45*4882a593Smuzhiyun u8 reg[REG_COUNT];
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun struct sandbox_i2c_rtc {
49*4882a593Smuzhiyun unsigned int offset_secs;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
sandbox_i2c_rtc_set_offset(struct udevice * dev,bool use_system_time,int offset)52*4882a593Smuzhiyun long sandbox_i2c_rtc_set_offset(struct udevice *dev, bool use_system_time,
53*4882a593Smuzhiyun int offset)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
56*4882a593Smuzhiyun long old_offset;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun old_offset = plat->offset;
59*4882a593Smuzhiyun plat->use_system_time = use_system_time;
60*4882a593Smuzhiyun if (offset != -1)
61*4882a593Smuzhiyun plat->offset = offset;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return old_offset;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
sandbox_i2c_rtc_get_set_base_time(struct udevice * dev,long base_time)66*4882a593Smuzhiyun long sandbox_i2c_rtc_get_set_base_time(struct udevice *dev, long base_time)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
69*4882a593Smuzhiyun long old_base_time;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun old_base_time = plat->base_time;
72*4882a593Smuzhiyun if (base_time != -1)
73*4882a593Smuzhiyun plat->base_time = base_time;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return old_base_time;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
reset_time(struct udevice * dev)78*4882a593Smuzhiyun static void reset_time(struct udevice *dev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
81*4882a593Smuzhiyun struct rtc_time now;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun os_localtime(&now);
84*4882a593Smuzhiyun plat->base_time = rtc_mktime(&now);
85*4882a593Smuzhiyun plat->offset = 0;
86*4882a593Smuzhiyun plat->use_system_time = true;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
sandbox_i2c_rtc_get(struct udevice * dev,struct rtc_time * time)89*4882a593Smuzhiyun static int sandbox_i2c_rtc_get(struct udevice *dev, struct rtc_time *time)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
92*4882a593Smuzhiyun struct rtc_time tm_now;
93*4882a593Smuzhiyun long now;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (plat->use_system_time) {
96*4882a593Smuzhiyun os_localtime(&tm_now);
97*4882a593Smuzhiyun now = rtc_mktime(&tm_now);
98*4882a593Smuzhiyun } else {
99*4882a593Smuzhiyun now = plat->base_time;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return rtc_to_tm(now + plat->offset, time);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
sandbox_i2c_rtc_set(struct udevice * dev,const struct rtc_time * time)105*4882a593Smuzhiyun static int sandbox_i2c_rtc_set(struct udevice *dev, const struct rtc_time *time)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(dev);
108*4882a593Smuzhiyun struct rtc_time tm_now;
109*4882a593Smuzhiyun long now;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun if (plat->use_system_time) {
112*4882a593Smuzhiyun os_localtime(&tm_now);
113*4882a593Smuzhiyun now = rtc_mktime(&tm_now);
114*4882a593Smuzhiyun } else {
115*4882a593Smuzhiyun now = plat->base_time;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun plat->offset = rtc_mktime(time) - now;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* Update the current time in the registers */
sandbox_i2c_rtc_prepare_read(struct udevice * emul)123*4882a593Smuzhiyun static int sandbox_i2c_rtc_prepare_read(struct udevice *emul)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
126*4882a593Smuzhiyun struct rtc_time time;
127*4882a593Smuzhiyun int ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = sandbox_i2c_rtc_get(emul, &time);
130*4882a593Smuzhiyun if (ret)
131*4882a593Smuzhiyun return ret;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun plat->reg[REG_SEC] = time.tm_sec;
134*4882a593Smuzhiyun plat->reg[REG_MIN] = time.tm_min;
135*4882a593Smuzhiyun plat->reg[REG_HOUR] = time.tm_hour;
136*4882a593Smuzhiyun plat->reg[REG_MDAY] = time.tm_mday;
137*4882a593Smuzhiyun plat->reg[REG_MON] = time.tm_mon;
138*4882a593Smuzhiyun plat->reg[REG_YEAR] = time.tm_year - 1900;
139*4882a593Smuzhiyun plat->reg[REG_WDAY] = time.tm_wday;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
sandbox_i2c_rtc_complete_write(struct udevice * emul)144*4882a593Smuzhiyun static int sandbox_i2c_rtc_complete_write(struct udevice *emul)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
147*4882a593Smuzhiyun struct rtc_time time;
148*4882a593Smuzhiyun int ret;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun time.tm_sec = plat->reg[REG_SEC];
151*4882a593Smuzhiyun time.tm_min = plat->reg[REG_MIN];
152*4882a593Smuzhiyun time.tm_hour = plat->reg[REG_HOUR];
153*4882a593Smuzhiyun time.tm_mday = plat->reg[REG_MDAY];
154*4882a593Smuzhiyun time.tm_mon = plat->reg[REG_MON];
155*4882a593Smuzhiyun time.tm_year = plat->reg[REG_YEAR] + 1900;
156*4882a593Smuzhiyun time.tm_wday = plat->reg[REG_WDAY];
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun ret = sandbox_i2c_rtc_set(emul, &time);
159*4882a593Smuzhiyun if (ret)
160*4882a593Smuzhiyun return ret;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return 0;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
sandbox_i2c_rtc_xfer(struct udevice * emul,struct i2c_msg * msg,int nmsgs)165*4882a593Smuzhiyun static int sandbox_i2c_rtc_xfer(struct udevice *emul, struct i2c_msg *msg,
166*4882a593Smuzhiyun int nmsgs)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun struct sandbox_i2c_rtc_plat_data *plat = dev_get_platdata(emul);
169*4882a593Smuzhiyun uint offset = 0;
170*4882a593Smuzhiyun int ret;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun debug("\n%s\n", __func__);
173*4882a593Smuzhiyun ret = sandbox_i2c_rtc_prepare_read(emul);
174*4882a593Smuzhiyun if (ret)
175*4882a593Smuzhiyun return ret;
176*4882a593Smuzhiyun for (; nmsgs > 0; nmsgs--, msg++) {
177*4882a593Smuzhiyun int len;
178*4882a593Smuzhiyun u8 *ptr;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun len = msg->len;
181*4882a593Smuzhiyun debug(" %s: msg->len=%d",
182*4882a593Smuzhiyun msg->flags & I2C_M_RD ? "read" : "write",
183*4882a593Smuzhiyun msg->len);
184*4882a593Smuzhiyun if (msg->flags & I2C_M_RD) {
185*4882a593Smuzhiyun debug(", offset %x, len %x: ", offset, len);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Read the register */
188*4882a593Smuzhiyun memcpy(msg->buf, plat->reg + offset, len);
189*4882a593Smuzhiyun memset(msg->buf + len, '\xff', msg->len - len);
190*4882a593Smuzhiyun debug_buffer(0, msg->buf, 1, msg->len, 0);
191*4882a593Smuzhiyun } else if (len >= 1) {
192*4882a593Smuzhiyun ptr = msg->buf;
193*4882a593Smuzhiyun offset = *ptr++ & (REG_COUNT - 1);
194*4882a593Smuzhiyun len--;
195*4882a593Smuzhiyun debug(", set offset %x: ", offset);
196*4882a593Smuzhiyun debug_buffer(0, msg->buf, 1, msg->len, 0);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* Write the register */
199*4882a593Smuzhiyun memcpy(plat->reg + offset, ptr, len);
200*4882a593Smuzhiyun if (offset == REG_RESET)
201*4882a593Smuzhiyun reset_time(emul);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun ret = sandbox_i2c_rtc_complete_write(emul);
205*4882a593Smuzhiyun if (ret)
206*4882a593Smuzhiyun return ret;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun return 0;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun struct dm_i2c_ops sandbox_i2c_rtc_emul_ops = {
212*4882a593Smuzhiyun .xfer = sandbox_i2c_rtc_xfer,
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
sandbox_i2c_rtc_bind(struct udevice * dev)215*4882a593Smuzhiyun static int sandbox_i2c_rtc_bind(struct udevice *dev)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun reset_time(dev);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static const struct udevice_id sandbox_i2c_rtc_ids[] = {
223*4882a593Smuzhiyun { .compatible = "sandbox,i2c-rtc" },
224*4882a593Smuzhiyun { }
225*4882a593Smuzhiyun };
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun U_BOOT_DRIVER(sandbox_i2c_rtc_emul) = {
228*4882a593Smuzhiyun .name = "sandbox_i2c_rtc_emul",
229*4882a593Smuzhiyun .id = UCLASS_I2C_EMUL,
230*4882a593Smuzhiyun .of_match = sandbox_i2c_rtc_ids,
231*4882a593Smuzhiyun .bind = sandbox_i2c_rtc_bind,
232*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct sandbox_i2c_rtc),
233*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct sandbox_i2c_rtc_plat_data),
234*4882a593Smuzhiyun .ops = &sandbox_i2c_rtc_emul_ops,
235*4882a593Smuzhiyun };
236