1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __RKFLASH_BLK_H__ 8*4882a593Smuzhiyun #define __RKFLASH_BLK_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun enum flash_con_type { 11*4882a593Smuzhiyun FLASH_CON_TYPE_NANDC = 0, 12*4882a593Smuzhiyun FLASH_CON_TYPE_SFC, 13*4882a593Smuzhiyun FLASH_CON_TYPE_MAX, 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun enum flash_type { 17*4882a593Smuzhiyun FLASH_TYPE_NANDC_NAND = 0, 18*4882a593Smuzhiyun FLASH_TYPE_SFC_NOR, 19*4882a593Smuzhiyun FLASH_TYPE_SFC_NAND, 20*4882a593Smuzhiyun FLASH_TYPE_MAX, 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun struct flash_operation { 24*4882a593Smuzhiyun int id; 25*4882a593Smuzhiyun int (*flash_init)(struct udevice *udev); 26*4882a593Smuzhiyun u32 (*flash_get_capacity)(struct udevice *udev); 27*4882a593Smuzhiyun int (*flash_read)(struct udevice *udev, 28*4882a593Smuzhiyun u32 start, 29*4882a593Smuzhiyun u32 blkcnt, 30*4882a593Smuzhiyun void *buffer); 31*4882a593Smuzhiyun int (*flash_write)(struct udevice *udev, 32*4882a593Smuzhiyun u32 start, 33*4882a593Smuzhiyun u32 blkcnt, 34*4882a593Smuzhiyun const void *buffer); 35*4882a593Smuzhiyun int (*flash_erase)(struct udevice *udev, 36*4882a593Smuzhiyun u32 start, 37*4882a593Smuzhiyun u32 blkcnt); 38*4882a593Smuzhiyun int (*vendor_read)(struct blk_desc *dev_desc, 39*4882a593Smuzhiyun u32 start, 40*4882a593Smuzhiyun u32 blkcnt, 41*4882a593Smuzhiyun void *buffer); 42*4882a593Smuzhiyun int (*vendor_write)(struct blk_desc *dev_desc, 43*4882a593Smuzhiyun u32 start, 44*4882a593Smuzhiyun u32 blkcnt, 45*4882a593Smuzhiyun void *buffer); 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct rkflash_dev { 49*4882a593Smuzhiyun u8 reserved[128]; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct rkflash_info { 53*4882a593Smuzhiyun void *ioaddr; 54*4882a593Smuzhiyun u32 flash_con_type; 55*4882a593Smuzhiyun u32 freq; 56*4882a593Smuzhiyun u32 density; 57*4882a593Smuzhiyun struct udevice *child_dev; 58*4882a593Smuzhiyun struct rkflash_dev flash_dev_info; 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * read() - read from a block device 61*4882a593Smuzhiyun * 62*4882a593Smuzhiyun * @start: Start block number to read (0=first) 63*4882a593Smuzhiyun * @blkcnt: Number of blocks to read 64*4882a593Smuzhiyun * @buffer: Destination buffer for data read 65*4882a593Smuzhiyun * @return 0 is OK, -1 is error. 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun int (*read)(struct udevice *udev, 68*4882a593Smuzhiyun u32 start, 69*4882a593Smuzhiyun u32 blkcnt, 70*4882a593Smuzhiyun void *buffer); 71*4882a593Smuzhiyun /* 72*4882a593Smuzhiyun * write() - write to a block device 73*4882a593Smuzhiyun * 74*4882a593Smuzhiyun * @dev: Device to write to 75*4882a593Smuzhiyun * @start: Start block number to write (0=first) 76*4882a593Smuzhiyun * @blkcnt: Number of blocks to write 77*4882a593Smuzhiyun * @buffer: Source buffer for data to write 78*4882a593Smuzhiyun * @return 0 is OK, -1 is error. 79*4882a593Smuzhiyun */ 80*4882a593Smuzhiyun int (*write)(struct udevice *udev, 81*4882a593Smuzhiyun u32 start, 82*4882a593Smuzhiyun u32 blkcnt, 83*4882a593Smuzhiyun const void *buffer); 84*4882a593Smuzhiyun /* 85*4882a593Smuzhiyun * erase() - erase a section of a block device 86*4882a593Smuzhiyun * 87*4882a593Smuzhiyun * @dev: Device to (partially) erase 88*4882a593Smuzhiyun * @start: Start block number to erase (0=first) 89*4882a593Smuzhiyun * @blkcnt: Number of blocks to erase 90*4882a593Smuzhiyun * @return 0 is OK, -1 is error. 91*4882a593Smuzhiyun */ 92*4882a593Smuzhiyun int (*erase)(struct udevice *udev, 93*4882a593Smuzhiyun u32 start, 94*4882a593Smuzhiyun u32 blkcnt); 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun struct rkflash_uclass_priv { 98*4882a593Smuzhiyun struct rkflash_info *ndev; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #endif /* __RKSFC_BLK_H__ */ 102