1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2017 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <reset-uclass.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun struct rockchip_reset_priv {
13*4882a593Smuzhiyun void __iomem *base;
14*4882a593Smuzhiyun unsigned int sf_reset_offset;
15*4882a593Smuzhiyun unsigned int sf_reset_num;
16*4882a593Smuzhiyun };
17*4882a593Smuzhiyun
rockchip_reset_request(struct reset_ctl * reset_ctl)18*4882a593Smuzhiyun static int rockchip_reset_request(struct reset_ctl *reset_ctl)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (sf_reset_num=%d)\n", __func__,
23*4882a593Smuzhiyun reset_ctl, reset_ctl->dev, reset_ctl->id, priv->sf_reset_num);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun if (reset_ctl->id / 16 >= priv->sf_reset_num)
26*4882a593Smuzhiyun return -EINVAL;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun return 0;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
rockchip_reset_free(struct reset_ctl * reset_ctl)31*4882a593Smuzhiyun static int rockchip_reset_free(struct reset_ctl *reset_ctl)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
34*4882a593Smuzhiyun reset_ctl->dev, reset_ctl->id);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
rockchip_reset_assert(struct reset_ctl * reset_ctl)39*4882a593Smuzhiyun static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
42*4882a593Smuzhiyun int bank = reset_ctl->id / 16;
43*4882a593Smuzhiyun int offset = reset_ctl->id % 16;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
46*4882a593Smuzhiyun reset_ctl, reset_ctl->dev, reset_ctl->id,
47*4882a593Smuzhiyun priv->base + (bank * 4));
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun writel(BIT(offset) | (BIT(offset) << 16), priv->base + (bank * 4));
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun return 0;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
rockchip_reset_deassert(struct reset_ctl * reset_ctl)54*4882a593Smuzhiyun static int rockchip_reset_deassert(struct reset_ctl *reset_ctl)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
57*4882a593Smuzhiyun int bank = reset_ctl->id / 16;
58*4882a593Smuzhiyun int offset = reset_ctl->id % 16;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
61*4882a593Smuzhiyun reset_ctl, reset_ctl->dev, reset_ctl->id,
62*4882a593Smuzhiyun priv->base + (bank * 4));
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun writel((BIT(offset) << 16), priv->base + (bank * 4));
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return 0;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun struct reset_ops rockchip_reset_ops = {
70*4882a593Smuzhiyun .request = rockchip_reset_request,
71*4882a593Smuzhiyun .free = rockchip_reset_free,
72*4882a593Smuzhiyun .rst_assert = rockchip_reset_assert,
73*4882a593Smuzhiyun .rst_deassert = rockchip_reset_deassert,
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
rockchip_reset_probe(struct udevice * dev)76*4882a593Smuzhiyun static int rockchip_reset_probe(struct udevice *dev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct rockchip_reset_priv *priv = dev_get_priv(dev);
79*4882a593Smuzhiyun fdt_addr_t addr;
80*4882a593Smuzhiyun fdt_size_t size;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun addr = dev_read_addr_size(dev, "reg", &size);
83*4882a593Smuzhiyun if (addr == FDT_ADDR_T_NONE)
84*4882a593Smuzhiyun return -EINVAL;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun if ((priv->sf_reset_offset == 0) && (priv->sf_reset_num == 0))
87*4882a593Smuzhiyun return -EINVAL;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun addr += priv->sf_reset_offset;
90*4882a593Smuzhiyun priv->base = ioremap(addr, size);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun debug("%s(base=%p) (sf_reset_offset=%x, sf_reset_num=%d)\n", __func__,
93*4882a593Smuzhiyun priv->base, priv->sf_reset_offset, priv->sf_reset_num);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_reset) = {
99*4882a593Smuzhiyun .name = "rockchip_reset",
100*4882a593Smuzhiyun .id = UCLASS_RESET,
101*4882a593Smuzhiyun .probe = rockchip_reset_probe,
102*4882a593Smuzhiyun .ops = &rockchip_reset_ops,
103*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct rockchip_reset_priv),
104*4882a593Smuzhiyun };
105