1*4882a593Smuzhiyun{ 2*4882a593Smuzhiyun .start_tag = 0x12345678, 3*4882a593Smuzhiyun .version_info = 0, 4*4882a593Smuzhiyun .gcpu_gen_freq = 0, 5*4882a593Smuzhiyun .g_d2_lp2_freq = (451 << 16) | 451, 6*4882a593Smuzhiyun .g_d3_lp3_freq = (589 << 16) | 0, 7*4882a593Smuzhiyun .g_d4_lp4_freq = 0x00000000, 8*4882a593Smuzhiyun .g_uart_info = (2 << 28) | (1 << 24) | 1500000, 9*4882a593Smuzhiyun .g_sr_pd_idle = (48 << 16) | 10, 10*4882a593Smuzhiyun .g_ch_info = 0 | 128, 11*4882a593Smuzhiyun .g_2t_info = 1, 12*4882a593Smuzhiyun .reserved11 = 0, 13*4882a593Smuzhiyun .reserved12 = 0, 14*4882a593Smuzhiyun .reserved13 = 0 15*4882a593Smuzhiyun}, 16*4882a593Smuzhiyun{ 17*4882a593Smuzhiyun {/*cmd,addr de-skew*/ 18*4882a593Smuzhiyun 0x22, 19*4882a593Smuzhiyun 0x22, 20*4882a593Smuzhiyun 0x21, 21*4882a593Smuzhiyun 0x21, 22*4882a593Smuzhiyun 0x21, 23*4882a593Smuzhiyun 0x10, 24*4882a593Smuzhiyun 0x21, 25*4882a593Smuzhiyun 0x21, 26*4882a593Smuzhiyun 0x13, 27*4882a593Smuzhiyun 0x23, 28*4882a593Smuzhiyun 0x10, 29*4882a593Smuzhiyun 0x99,/*clk*/ 30*4882a593Smuzhiyun 0x03, 31*4882a593Smuzhiyun 0x30, 32*4882a593Smuzhiyun }, 33*4882a593Smuzhiyun {/*cs0 dq0~7,dm,dqs*/ 34*4882a593Smuzhiyun 0xaa, 35*4882a593Smuzhiyun 0xaa, 36*4882a593Smuzhiyun 0x88, 37*4882a593Smuzhiyun 0xbb, 38*4882a593Smuzhiyun 0x88, 39*4882a593Smuzhiyun 0x88, 40*4882a593Smuzhiyun 0x99, 41*4882a593Smuzhiyun 0x88, 42*4882a593Smuzhiyun 0x88, 43*4882a593Smuzhiyun 0x7a,/*dqs0 rx tx*/ 44*4882a593Smuzhiyun 0xa,/*dqsb0 tx*/ 45*4882a593Smuzhiyun /*cs0 dq8~15,dm,dqs*/ 46*4882a593Smuzhiyun 0x88, 47*4882a593Smuzhiyun 0xaa, 48*4882a593Smuzhiyun 0x99, 49*4882a593Smuzhiyun 0x68, 50*4882a593Smuzhiyun 0x89, 51*4882a593Smuzhiyun 0x88, 52*4882a593Smuzhiyun 0x99, 53*4882a593Smuzhiyun 0x87, 54*4882a593Smuzhiyun 0x89, 55*4882a593Smuzhiyun 0x56,/*dqs1 rx tx*/ 56*4882a593Smuzhiyun 0x6,/*dqsb1 tx*/ 57*4882a593Smuzhiyun }, 58*4882a593Smuzhiyun} 59