1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2016 Google, Inc
3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <pwm.h>
11*4882a593Smuzhiyun
pwm_set_invert(struct udevice * dev,uint channel,bool polarity)12*4882a593Smuzhiyun int pwm_set_invert(struct udevice *dev, uint channel, bool polarity)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun struct pwm_ops *ops = pwm_get_ops(dev);
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun if (!ops->set_invert)
17*4882a593Smuzhiyun return -ENOSYS;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun return ops->set_invert(dev, channel, polarity);
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
pwm_set_config(struct udevice * dev,uint channel,uint period_ns,uint duty_ns)22*4882a593Smuzhiyun int pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
23*4882a593Smuzhiyun uint duty_ns)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun struct pwm_ops *ops = pwm_get_ops(dev);
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun if (!ops->set_config)
28*4882a593Smuzhiyun return -ENOSYS;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun return ops->set_config(dev, channel, period_ns, duty_ns);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
pwm_set_enable(struct udevice * dev,uint channel,bool enable)33*4882a593Smuzhiyun int pwm_set_enable(struct udevice *dev, uint channel, bool enable)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun struct pwm_ops *ops = pwm_get_ops(dev);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (!ops->set_enable)
38*4882a593Smuzhiyun return -ENOSYS;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return ops->set_enable(dev, channel, enable);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun UCLASS_DRIVER(pwm) = {
44*4882a593Smuzhiyun .id = UCLASS_PWM,
45*4882a593Smuzhiyun .name = "pwm",
46*4882a593Smuzhiyun };
47