1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2014
3*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Basic support for the pwm module on imx6.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on linux:drivers/pwm/pwm-imx.c
8*4882a593Smuzhiyun * from
9*4882a593Smuzhiyun * Sascha Hauer <s.hauer@pengutronix.de>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <div64.h>
16*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* pwm_id from 0..7 */
pwm_id_to_reg(int pwm_id)19*4882a593Smuzhiyun struct pwm_regs *pwm_id_to_reg(int pwm_id)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun switch (pwm_id) {
22*4882a593Smuzhiyun case 0:
23*4882a593Smuzhiyun return (struct pwm_regs *)PWM1_BASE_ADDR;
24*4882a593Smuzhiyun case 1:
25*4882a593Smuzhiyun return (struct pwm_regs *)PWM2_BASE_ADDR;
26*4882a593Smuzhiyun case 2:
27*4882a593Smuzhiyun return (struct pwm_regs *)PWM3_BASE_ADDR;
28*4882a593Smuzhiyun case 3:
29*4882a593Smuzhiyun return (struct pwm_regs *)PWM4_BASE_ADDR;
30*4882a593Smuzhiyun #ifdef CONFIG_MX6SX
31*4882a593Smuzhiyun case 4:
32*4882a593Smuzhiyun return (struct pwm_regs *)PWM5_BASE_ADDR;
33*4882a593Smuzhiyun case 5:
34*4882a593Smuzhiyun return (struct pwm_regs *)PWM6_BASE_ADDR;
35*4882a593Smuzhiyun case 6:
36*4882a593Smuzhiyun return (struct pwm_regs *)PWM7_BASE_ADDR;
37*4882a593Smuzhiyun case 7:
38*4882a593Smuzhiyun return (struct pwm_regs *)PWM8_BASE_ADDR;
39*4882a593Smuzhiyun #endif
40*4882a593Smuzhiyun default:
41*4882a593Smuzhiyun printf("unknown pwm_id: %d\n", pwm_id);
42*4882a593Smuzhiyun break;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun return NULL;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
pwm_imx_get_parms(int period_ns,int duty_ns,unsigned long * period_c,unsigned long * duty_c,unsigned long * prescale)47*4882a593Smuzhiyun int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c,
48*4882a593Smuzhiyun unsigned long *duty_c, unsigned long *prescale)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun unsigned long long c;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * we have not yet a clock framework for imx6, so add the clock
54*4882a593Smuzhiyun * value here as a define. Replace it when we have the clock
55*4882a593Smuzhiyun * framework.
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun c = CONFIG_IMX6_PWM_PER_CLK;
58*4882a593Smuzhiyun c = c * period_ns;
59*4882a593Smuzhiyun do_div(c, 1000000000);
60*4882a593Smuzhiyun *period_c = c;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun *prescale = *period_c / 0x10000 + 1;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun *period_c /= *prescale;
65*4882a593Smuzhiyun c = *period_c * (unsigned long long)duty_ns;
66*4882a593Smuzhiyun do_div(c, period_ns);
67*4882a593Smuzhiyun *duty_c = c;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /*
70*4882a593Smuzhiyun * according to imx pwm RM, the real period value should be
71*4882a593Smuzhiyun * PERIOD value in PWMPR plus 2.
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun if (*period_c > 2)
74*4882a593Smuzhiyun *period_c -= 2;
75*4882a593Smuzhiyun else
76*4882a593Smuzhiyun *period_c = 0;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80