1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Samsung Electronics
3*4882a593Smuzhiyun * Przemyslaw Marczak <p.marczak@samsung.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <fdtdec.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <dm.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun #include <power/pmic.h>
14*4882a593Smuzhiyun #include <power/regulator.h>
15*4882a593Smuzhiyun #include <power/sandbox_pmic.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define MODE(_id, _val, _name) [_id] = { \
20*4882a593Smuzhiyun .id = _id, \
21*4882a593Smuzhiyun .register_value = _val, \
22*4882a593Smuzhiyun .name = _name, \
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define RANGE(_min, _max, _step) { \
26*4882a593Smuzhiyun .min = _min, \
27*4882a593Smuzhiyun .max = _max, \
28*4882a593Smuzhiyun .step = _step, \
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * struct output_range - helper structure type to define the range of output
33*4882a593Smuzhiyun * operating values (current/voltage), limited by the PMIC IC design.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * @min - minimum value
36*4882a593Smuzhiyun * @max - maximum value
37*4882a593Smuzhiyun * @step - step value
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun struct output_range {
40*4882a593Smuzhiyun int min;
41*4882a593Smuzhiyun int max;
42*4882a593Smuzhiyun int step;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /* BUCK: 1,2 - voltage range */
46*4882a593Smuzhiyun static struct output_range buck_voltage_range[] = {
47*4882a593Smuzhiyun RANGE(OUT_BUCK1_UV_MIN, OUT_BUCK1_UV_MAX, OUT_BUCK1_UV_STEP),
48*4882a593Smuzhiyun RANGE(OUT_BUCK2_UV_MIN, OUT_BUCK2_UV_MAX, OUT_BUCK2_UV_STEP),
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* BUCK: 1 - current range */
52*4882a593Smuzhiyun static struct output_range buck_current_range[] = {
53*4882a593Smuzhiyun RANGE(OUT_BUCK1_UA_MIN, OUT_BUCK1_UA_MAX, OUT_BUCK1_UA_STEP),
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* BUCK operating modes */
57*4882a593Smuzhiyun static struct dm_regulator_mode sandbox_buck_modes[] = {
58*4882a593Smuzhiyun MODE(BUCK_OM_OFF, OM2REG(BUCK_OM_OFF), "OFF"),
59*4882a593Smuzhiyun MODE(BUCK_OM_ON, OM2REG(BUCK_OM_ON), "ON"),
60*4882a593Smuzhiyun MODE(BUCK_OM_PWM, OM2REG(BUCK_OM_PWM), "PWM"),
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* LDO: 1,2 - voltage range */
64*4882a593Smuzhiyun static struct output_range ldo_voltage_range[] = {
65*4882a593Smuzhiyun RANGE(OUT_LDO1_UV_MIN, OUT_LDO1_UV_MAX, OUT_LDO1_UV_STEP),
66*4882a593Smuzhiyun RANGE(OUT_LDO2_UV_MIN, OUT_LDO2_UV_MAX, OUT_LDO2_UV_STEP),
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* LDO: 1 - current range */
70*4882a593Smuzhiyun static struct output_range ldo_current_range[] = {
71*4882a593Smuzhiyun RANGE(OUT_LDO1_UA_MIN, OUT_LDO1_UA_MAX, OUT_LDO1_UA_STEP),
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* LDO operating modes */
75*4882a593Smuzhiyun static struct dm_regulator_mode sandbox_ldo_modes[] = {
76*4882a593Smuzhiyun MODE(LDO_OM_OFF, OM2REG(LDO_OM_OFF), "OFF"),
77*4882a593Smuzhiyun MODE(LDO_OM_ON, OM2REG(LDO_OM_ON), "ON"),
78*4882a593Smuzhiyun MODE(LDO_OM_SLEEP, OM2REG(LDO_OM_SLEEP), "SLEEP"),
79*4882a593Smuzhiyun MODE(LDO_OM_STANDBY, OM2REG(LDO_OM_STANDBY), "STANDBY"),
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
out_get_value(struct udevice * dev,int output_count,int reg_type,struct output_range * range)82*4882a593Smuzhiyun int out_get_value(struct udevice *dev, int output_count, int reg_type,
83*4882a593Smuzhiyun struct output_range *range)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun uint8_t reg_val;
86*4882a593Smuzhiyun uint reg;
87*4882a593Smuzhiyun int ret;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun if (dev->driver_data > output_count) {
90*4882a593Smuzhiyun pr_err("Unknown regulator number: %lu for PMIC %s!",
91*4882a593Smuzhiyun dev->driver_data, dev->name);
92*4882a593Smuzhiyun return -EINVAL;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
96*4882a593Smuzhiyun ret = pmic_read(dev->parent, reg, ®_val, 1);
97*4882a593Smuzhiyun if (ret) {
98*4882a593Smuzhiyun pr_err("PMIC read failed: %d\n", ret);
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun ret = REG2VAL(range[dev->driver_data - 1].min,
103*4882a593Smuzhiyun range[dev->driver_data - 1].step,
104*4882a593Smuzhiyun reg_val);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return ret;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
out_set_value(struct udevice * dev,int output_count,int reg_type,struct output_range * range,int value)109*4882a593Smuzhiyun static int out_set_value(struct udevice *dev, int output_count, int reg_type,
110*4882a593Smuzhiyun struct output_range *range, int value)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun uint8_t reg_val;
113*4882a593Smuzhiyun uint reg;
114*4882a593Smuzhiyun int ret;
115*4882a593Smuzhiyun int max_value;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (dev->driver_data > output_count) {
118*4882a593Smuzhiyun pr_err("Unknown regulator number: %lu for PMIC %s!",
119*4882a593Smuzhiyun dev->driver_data, dev->name);
120*4882a593Smuzhiyun return -EINVAL;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun max_value = range[dev->driver_data - 1].max;
124*4882a593Smuzhiyun if (value > max_value) {
125*4882a593Smuzhiyun pr_err("Wrong value for %s: %lu. Max is: %d.",
126*4882a593Smuzhiyun dev->name, dev->driver_data, max_value);
127*4882a593Smuzhiyun return -EINVAL;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun reg_val = VAL2REG(range[dev->driver_data - 1].min,
131*4882a593Smuzhiyun range[dev->driver_data - 1].step,
132*4882a593Smuzhiyun value);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
135*4882a593Smuzhiyun ret = pmic_write(dev->parent, reg, ®_val, 1);
136*4882a593Smuzhiyun if (ret) {
137*4882a593Smuzhiyun pr_err("PMIC write failed: %d\n", ret);
138*4882a593Smuzhiyun return ret;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
out_get_mode(struct udevice * dev)144*4882a593Smuzhiyun static int out_get_mode(struct udevice *dev)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
147*4882a593Smuzhiyun uint8_t reg_val;
148*4882a593Smuzhiyun uint reg;
149*4882a593Smuzhiyun int ret;
150*4882a593Smuzhiyun int i;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
155*4882a593Smuzhiyun ret = pmic_read(dev->parent, reg, ®_val, 1);
156*4882a593Smuzhiyun if (ret) {
157*4882a593Smuzhiyun pr_err("PMIC read failed: %d\n", ret);
158*4882a593Smuzhiyun return ret;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun for (i = 0; i < uc_pdata->mode_count; i++) {
162*4882a593Smuzhiyun if (reg_val == uc_pdata->mode[i].register_value)
163*4882a593Smuzhiyun return uc_pdata->mode[i].id;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun pr_err("Unknown operation mode for %s!", dev->name);
167*4882a593Smuzhiyun return -EINVAL;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
out_set_mode(struct udevice * dev,int mode)170*4882a593Smuzhiyun static int out_set_mode(struct udevice *dev, int mode)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
173*4882a593Smuzhiyun int reg_val = -1;
174*4882a593Smuzhiyun uint reg;
175*4882a593Smuzhiyun int ret;
176*4882a593Smuzhiyun int i;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (mode >= uc_pdata->mode_count)
181*4882a593Smuzhiyun return -EINVAL;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun for (i = 0; i < uc_pdata->mode_count; i++) {
184*4882a593Smuzhiyun if (mode == uc_pdata->mode[i].id) {
185*4882a593Smuzhiyun reg_val = uc_pdata->mode[i].register_value;
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (reg_val == -1) {
191*4882a593Smuzhiyun pr_err("Unknown operation mode for %s!", dev->name);
192*4882a593Smuzhiyun return -EINVAL;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
196*4882a593Smuzhiyun ret = pmic_write(dev->parent, reg, (uint8_t *)®_val, 1);
197*4882a593Smuzhiyun if (ret) {
198*4882a593Smuzhiyun pr_err("PMIC write failed: %d\n", ret);
199*4882a593Smuzhiyun return ret;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
buck_get_voltage(struct udevice * dev)205*4882a593Smuzhiyun static int buck_get_voltage(struct udevice *dev)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun return out_get_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UV,
208*4882a593Smuzhiyun buck_voltage_range);
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
buck_set_voltage(struct udevice * dev,int uV)211*4882a593Smuzhiyun static int buck_set_voltage(struct udevice *dev, int uV)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun return out_set_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UV,
214*4882a593Smuzhiyun buck_voltage_range, uV);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
buck_get_current(struct udevice * dev)217*4882a593Smuzhiyun static int buck_get_current(struct udevice *dev)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun /* BUCK2 - unsupported */
220*4882a593Smuzhiyun if (dev->driver_data == 2)
221*4882a593Smuzhiyun return -ENOSYS;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun return out_get_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UA,
224*4882a593Smuzhiyun buck_current_range);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
buck_set_current(struct udevice * dev,int uA)227*4882a593Smuzhiyun static int buck_set_current(struct udevice *dev, int uA)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun /* BUCK2 - unsupported */
230*4882a593Smuzhiyun if (dev->driver_data == 2)
231*4882a593Smuzhiyun return -ENOSYS;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun return out_set_value(dev, SANDBOX_BUCK_COUNT, OUT_REG_UA,
234*4882a593Smuzhiyun buck_current_range, uA);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
buck_get_enable(struct udevice * dev)237*4882a593Smuzhiyun static int buck_get_enable(struct udevice *dev)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun if (out_get_mode(dev) == BUCK_OM_OFF)
240*4882a593Smuzhiyun return false;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return true;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
buck_set_enable(struct udevice * dev,bool enable)245*4882a593Smuzhiyun static int buck_set_enable(struct udevice *dev, bool enable)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun return out_set_mode(dev, enable ? BUCK_OM_ON : BUCK_OM_OFF);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
sandbox_buck_probe(struct udevice * dev)250*4882a593Smuzhiyun static int sandbox_buck_probe(struct udevice *dev)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun uc_pdata->type = REGULATOR_TYPE_BUCK;
257*4882a593Smuzhiyun uc_pdata->mode = sandbox_buck_modes;
258*4882a593Smuzhiyun uc_pdata->mode_count = ARRAY_SIZE(sandbox_buck_modes);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun static const struct dm_regulator_ops sandbox_buck_ops = {
264*4882a593Smuzhiyun .get_value = buck_get_voltage,
265*4882a593Smuzhiyun .set_value = buck_set_voltage,
266*4882a593Smuzhiyun .get_current = buck_get_current,
267*4882a593Smuzhiyun .set_current = buck_set_current,
268*4882a593Smuzhiyun .get_enable = buck_get_enable,
269*4882a593Smuzhiyun .set_enable = buck_set_enable,
270*4882a593Smuzhiyun .get_mode = out_get_mode,
271*4882a593Smuzhiyun .set_mode = out_set_mode,
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun U_BOOT_DRIVER(sandbox_buck) = {
275*4882a593Smuzhiyun .name = SANDBOX_BUCK_DRIVER,
276*4882a593Smuzhiyun .id = UCLASS_REGULATOR,
277*4882a593Smuzhiyun .ops = &sandbox_buck_ops,
278*4882a593Smuzhiyun .probe = sandbox_buck_probe,
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun
ldo_get_voltage(struct udevice * dev)281*4882a593Smuzhiyun static int ldo_get_voltage(struct udevice *dev)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun return out_get_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UV,
284*4882a593Smuzhiyun ldo_voltage_range);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
ldo_set_voltage(struct udevice * dev,int uV)287*4882a593Smuzhiyun static int ldo_set_voltage(struct udevice *dev, int uV)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun return out_set_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UV,
290*4882a593Smuzhiyun ldo_voltage_range, uV);
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
ldo_get_current(struct udevice * dev)293*4882a593Smuzhiyun static int ldo_get_current(struct udevice *dev)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun /* LDO2 - unsupported */
296*4882a593Smuzhiyun if (dev->driver_data == 2)
297*4882a593Smuzhiyun return -ENOSYS;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return out_get_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UA,
300*4882a593Smuzhiyun ldo_current_range);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
ldo_set_current(struct udevice * dev,int uA)303*4882a593Smuzhiyun static int ldo_set_current(struct udevice *dev, int uA)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun /* LDO2 - unsupported */
306*4882a593Smuzhiyun if (dev->driver_data == 2)
307*4882a593Smuzhiyun return -ENOSYS;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return out_set_value(dev, SANDBOX_LDO_COUNT, OUT_REG_UA,
310*4882a593Smuzhiyun ldo_current_range, uA);
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
ldo_get_enable(struct udevice * dev)313*4882a593Smuzhiyun static int ldo_get_enable(struct udevice *dev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun if (out_get_mode(dev) == LDO_OM_OFF)
316*4882a593Smuzhiyun return false;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return true;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
ldo_set_enable(struct udevice * dev,bool enable)321*4882a593Smuzhiyun static int ldo_set_enable(struct udevice *dev, bool enable)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun return out_set_mode(dev, enable ? LDO_OM_ON : LDO_OM_OFF);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
sandbox_ldo_probe(struct udevice * dev)326*4882a593Smuzhiyun static int sandbox_ldo_probe(struct udevice *dev)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun uc_pdata->type = REGULATOR_TYPE_LDO;
333*4882a593Smuzhiyun uc_pdata->mode = sandbox_ldo_modes;
334*4882a593Smuzhiyun uc_pdata->mode_count = ARRAY_SIZE(sandbox_ldo_modes);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun return 0;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun static const struct dm_regulator_ops sandbox_ldo_ops = {
340*4882a593Smuzhiyun .get_value = ldo_get_voltage,
341*4882a593Smuzhiyun .set_value = ldo_set_voltage,
342*4882a593Smuzhiyun .get_current = ldo_get_current,
343*4882a593Smuzhiyun .set_current = ldo_set_current,
344*4882a593Smuzhiyun .get_enable = ldo_get_enable,
345*4882a593Smuzhiyun .set_enable = ldo_set_enable,
346*4882a593Smuzhiyun .get_mode = out_get_mode,
347*4882a593Smuzhiyun .set_mode = out_set_mode,
348*4882a593Smuzhiyun };
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun U_BOOT_DRIVER(sandbox_ldo) = {
351*4882a593Smuzhiyun .name = SANDBOX_LDO_DRIVER,
352*4882a593Smuzhiyun .id = UCLASS_REGULATOR,
353*4882a593Smuzhiyun .ops = &sandbox_ldo_ops,
354*4882a593Smuzhiyun .probe = sandbox_ldo_probe,
355*4882a593Smuzhiyun };
356