xref: /OK3568_Linux_fs/u-boot/drivers/power/regulator/rk860x_regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2021 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <common.h>
6*4882a593Smuzhiyun #include <dm.h>
7*4882a593Smuzhiyun #include <errno.h>
8*4882a593Smuzhiyun #include <i2c.h>
9*4882a593Smuzhiyun #include <syscon.h>
10*4882a593Smuzhiyun #include <asm/gpio.h>
11*4882a593Smuzhiyun #include <power/regulator.h>
12*4882a593Smuzhiyun #include <asm/arch/clock.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /* Voltage setting */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define RK860X_VSEL0_A		0x00
20*4882a593Smuzhiyun #define RK860X_VSEL1_A		0x01
21*4882a593Smuzhiyun #define RK860X_VSEL0_B		0x06
22*4882a593Smuzhiyun #define RK860X_VSEL1_B		0x07
23*4882a593Smuzhiyun #define RK860X_MAX_SET		0x08
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* Control register */
26*4882a593Smuzhiyun #define RK860X_CONTROL		0x02
27*4882a593Smuzhiyun /* IC Type */
28*4882a593Smuzhiyun #define RK860X_ID1		0x03
29*4882a593Smuzhiyun /* IC mask version */
30*4882a593Smuzhiyun #define RK860X_ID2		0x04
31*4882a593Smuzhiyun /* Monitor register */
32*4882a593Smuzhiyun #define RK860X_MONITOR		0x05
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* VSEL bit definitions */
35*4882a593Smuzhiyun #define VSEL_BUCK_EN		BIT(7)
36*4882a593Smuzhiyun #define VSEL_MODE		BIT(6)
37*4882a593Smuzhiyun #define VSEL_A_NSEL_MASK	0x3F
38*4882a593Smuzhiyun #define VSEL_B_NSEL_MASK	0xff
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* Chip ID */
41*4882a593Smuzhiyun #define DIE_ID			0x0F
42*4882a593Smuzhiyun #define DIE_REV			0x0F
43*4882a593Smuzhiyun /* Control bit definitions */
44*4882a593Smuzhiyun #define CTL_OUTPUT_DISCHG	BIT(7)
45*4882a593Smuzhiyun #define CTL_SLEW_MASK		(0x7 << 4)
46*4882a593Smuzhiyun #define CTL_SLEW_SHIFT		4
47*4882a593Smuzhiyun #define CTL_RESET		BIT(2)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define RK860X_NVOLTAGES_64	64
50*4882a593Smuzhiyun #define RK860X_NVOLTAGES_160	160
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* IC Type */
53*4882a593Smuzhiyun enum {
54*4882a593Smuzhiyun 	RK860X_CHIP_ID_00 = 0,
55*4882a593Smuzhiyun 	RK860X_CHIP_ID_01,
56*4882a593Smuzhiyun 	RK860X_CHIP_ID_02,
57*4882a593Smuzhiyun 	RK860X_CHIP_ID_03,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun struct rk860x_regulator_info {
61*4882a593Smuzhiyun 	struct udevice *dev;
62*4882a593Smuzhiyun 	/* IC Type and Rev */
63*4882a593Smuzhiyun 	int chip_id;
64*4882a593Smuzhiyun 	/* Voltage setting register */
65*4882a593Smuzhiyun 	unsigned int vol_reg;
66*4882a593Smuzhiyun 	unsigned int sleep_reg;
67*4882a593Smuzhiyun 	unsigned int en_reg;
68*4882a593Smuzhiyun 	unsigned int sleep_en_reg;
69*4882a593Smuzhiyun 	unsigned int mode_reg;
70*4882a593Smuzhiyun 	unsigned int vol_mask;
71*4882a593Smuzhiyun 	unsigned int mode_mask;
72*4882a593Smuzhiyun 	unsigned int n_voltages;
73*4882a593Smuzhiyun 	/* Voltage range and step(linear) */
74*4882a593Smuzhiyun 	unsigned int vsel_min;
75*4882a593Smuzhiyun 	unsigned int vsel_step;
76*4882a593Smuzhiyun 	struct gpio_desc vsel_gpio;
77*4882a593Smuzhiyun 	struct gpio_desc en_gpio;
78*4882a593Smuzhiyun 	unsigned int sleep_vsel_id;
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun 
rk860x_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)81*4882a593Smuzhiyun static int rk860x_write(struct udevice *dev, uint reg, const uint8_t *buff,
82*4882a593Smuzhiyun 			int len)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	int ret;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	ret = dm_i2c_write(dev, reg, buff, len);
87*4882a593Smuzhiyun 	if (ret) {
88*4882a593Smuzhiyun 		dev_err(dev, "write reg[0x%02x] failed, ret=%d\n", reg, ret);
89*4882a593Smuzhiyun 		return ret;
90*4882a593Smuzhiyun 	}
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
rk860x_read(struct udevice * dev,uint reg,uint8_t * buff,int len)95*4882a593Smuzhiyun static int rk860x_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	int ret;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	ret = dm_i2c_read(dev, reg, buff, len);
100*4882a593Smuzhiyun 	if (ret) {
101*4882a593Smuzhiyun 		dev_err(dev, "read reg[0x%02x] failed, ret=%d\n", reg, ret);
102*4882a593Smuzhiyun 		return ret;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
rk860x_reg_read(struct udevice * dev,uint reg,u8 * val)108*4882a593Smuzhiyun static int rk860x_reg_read(struct udevice *dev, uint reg, u8 *val)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	int ret;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	debug("%s: reg=%x", __func__, reg);
113*4882a593Smuzhiyun 	ret = rk860x_read(dev, reg, val, 1);
114*4882a593Smuzhiyun 	debug(", value=%x, ret=%d\n", *val, ret);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return ret;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
rk860x_reg_write(struct udevice * dev,uint reg,uint value)119*4882a593Smuzhiyun static int rk860x_reg_write(struct udevice *dev, uint reg, uint value)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	u8 byte = value;
122*4882a593Smuzhiyun 	int ret;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	debug("%s: reg=%x, value=%x", __func__, reg, value);
125*4882a593Smuzhiyun 	ret = rk860x_write(dev, reg, &byte, 1);
126*4882a593Smuzhiyun 	debug(", ret=%d\n", ret);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return ret;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
rk860x_clrsetbits(struct udevice * dev,uint reg,uint clr,uint set)131*4882a593Smuzhiyun static int  rk860x_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	u8 byte, val;
134*4882a593Smuzhiyun 	int ret;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, reg, &val);
137*4882a593Smuzhiyun 	if (ret < 0)
138*4882a593Smuzhiyun 		return ret;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	byte = (val & ~clr) | set;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return rk860x_reg_write(dev, reg, byte);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
rk860x_regulator_set_enable(struct udevice * dev,bool enable)145*4882a593Smuzhiyun static int rk860x_regulator_set_enable(struct udevice *dev, bool enable)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
148*4882a593Smuzhiyun 	int val, sleep_vsel_id;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	if (enable) {
151*4882a593Smuzhiyun 		val = VSEL_BUCK_EN;
152*4882a593Smuzhiyun 		sleep_vsel_id = !priv->sleep_vsel_id;
153*4882a593Smuzhiyun 	} else {
154*4882a593Smuzhiyun 		val = 0;
155*4882a593Smuzhiyun 		sleep_vsel_id = priv->sleep_vsel_id;
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
159*4882a593Smuzhiyun 		dm_gpio_set_value(&priv->vsel_gpio, sleep_vsel_id);
160*4882a593Smuzhiyun 		return 0;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 	rk860x_clrsetbits(dev, priv->en_reg, VSEL_BUCK_EN, val);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
rk860x_regulator_get_enable(struct udevice * dev)167*4882a593Smuzhiyun static int rk860x_regulator_get_enable(struct udevice *dev)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
170*4882a593Smuzhiyun 	u8 val;
171*4882a593Smuzhiyun 	int ret;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
174*4882a593Smuzhiyun 		if (priv->sleep_vsel_id)
175*4882a593Smuzhiyun 			return !dm_gpio_get_value(&priv->vsel_gpio);
176*4882a593Smuzhiyun 		else
177*4882a593Smuzhiyun 			return dm_gpio_get_value(&priv->vsel_gpio);
178*4882a593Smuzhiyun 	}
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, priv->en_reg, &val);
181*4882a593Smuzhiyun 	if (ret)
182*4882a593Smuzhiyun 		return ret;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (val & VSEL_BUCK_EN)
185*4882a593Smuzhiyun 		return 1;
186*4882a593Smuzhiyun 	else
187*4882a593Smuzhiyun 		return 0;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
rk860x_regulator_set_suspend_enable(struct udevice * dev,bool enable)190*4882a593Smuzhiyun static int rk860x_regulator_set_suspend_enable(struct udevice *dev,
191*4882a593Smuzhiyun 					       bool enable)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
194*4882a593Smuzhiyun 	int val;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	if (enable)
197*4882a593Smuzhiyun 		val = VSEL_BUCK_EN;
198*4882a593Smuzhiyun 	else
199*4882a593Smuzhiyun 		val = 0;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	rk860x_clrsetbits(dev, priv->sleep_en_reg, VSEL_BUCK_EN, val);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
rk860x_regulator_get_suspend_enable(struct udevice * dev)206*4882a593Smuzhiyun static int rk860x_regulator_get_suspend_enable(struct udevice *dev)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
209*4882a593Smuzhiyun 	int ret;
210*4882a593Smuzhiyun 	u8 val;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, priv->sleep_en_reg, &val);
213*4882a593Smuzhiyun 	if (ret)
214*4882a593Smuzhiyun 		return ret;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	if (val & VSEL_BUCK_EN)
217*4882a593Smuzhiyun 		return 1;
218*4882a593Smuzhiyun 	else
219*4882a593Smuzhiyun 		return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
rk860x_regulator_get_voltage(struct udevice * dev)222*4882a593Smuzhiyun static int rk860x_regulator_get_voltage(struct udevice *dev)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
225*4882a593Smuzhiyun 	int uvolt = 0, ret;
226*4882a593Smuzhiyun 	u8 val;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, priv->vol_reg, &val);
229*4882a593Smuzhiyun 	if (ret)
230*4882a593Smuzhiyun 		return ret;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	val &= priv->vol_mask;
233*4882a593Smuzhiyun 	uvolt = (val * priv->vsel_step) + priv->vsel_min;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	return uvolt;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun 
rk860x_regulator_set_voltage(struct udevice * dev,int uvolt)238*4882a593Smuzhiyun static int rk860x_regulator_set_voltage(struct udevice *dev, int uvolt)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
241*4882a593Smuzhiyun 	int val;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
244*4882a593Smuzhiyun 	rk860x_clrsetbits(dev, priv->vol_reg, priv->vol_mask, val);
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
rk860x_regulator_get_suspend_voltage(struct udevice * dev)249*4882a593Smuzhiyun static int rk860x_regulator_get_suspend_voltage(struct udevice *dev)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
252*4882a593Smuzhiyun 	int uvolt = 0, ret;
253*4882a593Smuzhiyun 	u8 val;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, priv->sleep_reg, &val);
256*4882a593Smuzhiyun 	if (ret)
257*4882a593Smuzhiyun 		return ret;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	val &= priv->vol_mask;
260*4882a593Smuzhiyun 	uvolt = (val * priv->vsel_step) + priv->vsel_min;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	return uvolt;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun 
rk860x_regulator_set_suspend_voltage(struct udevice * dev,int uvolt)265*4882a593Smuzhiyun static int rk860x_regulator_set_suspend_voltage(struct udevice *dev,
266*4882a593Smuzhiyun 						int uvolt)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
269*4882a593Smuzhiyun 	int val;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
272*4882a593Smuzhiyun 	rk860x_clrsetbits(dev, priv->sleep_reg, priv->vol_mask, val);
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	return 0;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun /* For 00,01 options:
278*4882a593Smuzhiyun  * VOUT = 0.7125V + NSELx * 12.5mV, from 0.7125 to 1.5V.
279*4882a593Smuzhiyun  * For 02,03 options:
280*4882a593Smuzhiyun  * VOUT = 0.5V + NSELx * 6.25mV, from 0.5 to 1.5V.
281*4882a593Smuzhiyun  */
rk860x_device_setup(struct rk860x_regulator_info * di)282*4882a593Smuzhiyun static int rk860x_device_setup(struct rk860x_regulator_info *di)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	int ret = 0;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	switch (di->chip_id) {
287*4882a593Smuzhiyun 	case RK860X_CHIP_ID_00:
288*4882a593Smuzhiyun 	case RK860X_CHIP_ID_01:
289*4882a593Smuzhiyun 		di->vsel_min = 712500;
290*4882a593Smuzhiyun 		di->vsel_step = 12500;
291*4882a593Smuzhiyun 		di->n_voltages = RK860X_NVOLTAGES_64;
292*4882a593Smuzhiyun 		di->vol_mask = VSEL_A_NSEL_MASK;
293*4882a593Smuzhiyun 		if (di->sleep_vsel_id) {
294*4882a593Smuzhiyun 			di->sleep_reg = RK860X_VSEL1_A;
295*4882a593Smuzhiyun 			di->vol_reg = RK860X_VSEL0_A;
296*4882a593Smuzhiyun 			di->mode_reg = RK860X_VSEL0_A;
297*4882a593Smuzhiyun 			di->en_reg = RK860X_VSEL0_A;
298*4882a593Smuzhiyun 			di->sleep_en_reg = RK860X_VSEL1_A;
299*4882a593Smuzhiyun 		} else {
300*4882a593Smuzhiyun 			di->sleep_reg = RK860X_VSEL0_A;
301*4882a593Smuzhiyun 			di->vol_reg = RK860X_VSEL1_A;
302*4882a593Smuzhiyun 			di->mode_reg = RK860X_VSEL1_A;
303*4882a593Smuzhiyun 			di->en_reg = RK860X_VSEL1_A;
304*4882a593Smuzhiyun 			di->sleep_en_reg = RK860X_VSEL0_A;
305*4882a593Smuzhiyun 		}
306*4882a593Smuzhiyun 		break;
307*4882a593Smuzhiyun 	case RK860X_CHIP_ID_02:
308*4882a593Smuzhiyun 	case RK860X_CHIP_ID_03:
309*4882a593Smuzhiyun 		di->vsel_min = 500000;
310*4882a593Smuzhiyun 		di->vsel_step = 6250;
311*4882a593Smuzhiyun 		di->n_voltages = RK860X_NVOLTAGES_160;
312*4882a593Smuzhiyun 		di->vol_mask = VSEL_B_NSEL_MASK;
313*4882a593Smuzhiyun 		if (di->sleep_vsel_id) {
314*4882a593Smuzhiyun 			di->sleep_reg = RK860X_VSEL1_B;
315*4882a593Smuzhiyun 			di->vol_reg = RK860X_VSEL0_B;
316*4882a593Smuzhiyun 			di->mode_reg = RK860X_VSEL0_A;
317*4882a593Smuzhiyun 			di->en_reg = RK860X_VSEL0_A;
318*4882a593Smuzhiyun 			di->sleep_en_reg = RK860X_VSEL1_A;
319*4882a593Smuzhiyun 		} else {
320*4882a593Smuzhiyun 			di->sleep_reg = RK860X_VSEL0_B;
321*4882a593Smuzhiyun 			di->vol_reg = RK860X_VSEL1_B;
322*4882a593Smuzhiyun 			di->mode_reg = RK860X_VSEL1_A;
323*4882a593Smuzhiyun 			di->en_reg = RK860X_VSEL1_A;
324*4882a593Smuzhiyun 			di->sleep_en_reg = RK860X_VSEL0_A;
325*4882a593Smuzhiyun 		}
326*4882a593Smuzhiyun 		break;
327*4882a593Smuzhiyun 	default:
328*4882a593Smuzhiyun 		dev_err(di->dev,
329*4882a593Smuzhiyun 			"Chip ID %d not supported!\n",
330*4882a593Smuzhiyun 			di->chip_id);
331*4882a593Smuzhiyun 		return -EINVAL;
332*4882a593Smuzhiyun 	}
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	di->mode_mask = VSEL_MODE;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	return ret;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
rk860x_regulator_ofdata_to_platdata(struct udevice * dev)339*4882a593Smuzhiyun static int rk860x_regulator_ofdata_to_platdata(struct udevice *dev)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun 	struct rk860x_regulator_info *priv = dev_get_priv(dev);
342*4882a593Smuzhiyun 	int ret;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	priv->sleep_vsel_id = dev_read_u32_default(dev,
345*4882a593Smuzhiyun 						   "rockchip,suspend-voltage-selector",
346*4882a593Smuzhiyun 						   1);
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	ret = gpio_request_by_name(dev, "vsel-gpios", 0,
349*4882a593Smuzhiyun 				   &priv->vsel_gpio, GPIOD_IS_OUT);
350*4882a593Smuzhiyun 	if (ret)
351*4882a593Smuzhiyun 		dev_err(dev, "vsel-gpios- not found!\n");
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->vsel_gpio))
354*4882a593Smuzhiyun 		dm_gpio_set_value(&priv->vsel_gpio, !priv->sleep_vsel_id);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	ret = gpio_request_by_name(dev, "en-gpios", 0,
357*4882a593Smuzhiyun 				   &priv->en_gpio, GPIOD_IS_OUT);
358*4882a593Smuzhiyun 	if (ret)
359*4882a593Smuzhiyun 		dev_err(dev, "en-gpios- not found!\n");
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->en_gpio))
362*4882a593Smuzhiyun 		dm_gpio_set_value(&priv->en_gpio, 1);
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
rk860x_regulator_probe(struct udevice * dev)367*4882a593Smuzhiyun static int rk860x_regulator_probe(struct udevice *dev)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	struct rk860x_regulator_info *di = dev_get_priv(dev);
370*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
371*4882a593Smuzhiyun 	u8 val;
372*4882a593Smuzhiyun 	int ret;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
375*4882a593Smuzhiyun 	uc_pdata->type = REGULATOR_TYPE_BUCK;
376*4882a593Smuzhiyun 	uc_pdata->mode_count = 0;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	/* Get chip ID */
379*4882a593Smuzhiyun 	ret = rk860x_reg_read(dev, RK860X_ID1, &val);
380*4882a593Smuzhiyun 	if (ret) {
381*4882a593Smuzhiyun 		dev_err(dev, "Failed to get chip ID!\n");
382*4882a593Smuzhiyun 		return ret;
383*4882a593Smuzhiyun 	}
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	if ((val & DIE_ID) == 0x8)
386*4882a593Smuzhiyun 		di->chip_id = RK860X_CHIP_ID_00;
387*4882a593Smuzhiyun 	else
388*4882a593Smuzhiyun 		di->chip_id = RK860X_CHIP_ID_02;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	debug("RK860X Option[%d] Detected!\n", val & DIE_ID);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	/* Device init */
393*4882a593Smuzhiyun 	ret = rk860x_device_setup(di);
394*4882a593Smuzhiyun 	if (ret < 0) {
395*4882a593Smuzhiyun 		dev_err(dev, "Failed to setup device!\n");
396*4882a593Smuzhiyun 		return ret;
397*4882a593Smuzhiyun 	}
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	return 0;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun static const struct udevice_id rk860x_id[] = {
403*4882a593Smuzhiyun 	{
404*4882a593Smuzhiyun 		.compatible = "rockchip,rk8600",
405*4882a593Smuzhiyun 	},
406*4882a593Smuzhiyun 	{
407*4882a593Smuzhiyun 		.compatible = "rockchip,rk8601",
408*4882a593Smuzhiyun 	},
409*4882a593Smuzhiyun 	{
410*4882a593Smuzhiyun 		.compatible = "rockchip,rk8602",
411*4882a593Smuzhiyun 	},
412*4882a593Smuzhiyun 	{
413*4882a593Smuzhiyun 		.compatible = "rockchip,rk8603",
414*4882a593Smuzhiyun 	},
415*4882a593Smuzhiyun 	{ },
416*4882a593Smuzhiyun };
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun static const struct dm_regulator_ops rk860x_regulator_ops = {
419*4882a593Smuzhiyun 	.get_value  = rk860x_regulator_get_voltage,
420*4882a593Smuzhiyun 	.set_value  = rk860x_regulator_set_voltage,
421*4882a593Smuzhiyun 	.set_suspend_value = rk860x_regulator_set_suspend_voltage,
422*4882a593Smuzhiyun 	.get_suspend_value = rk860x_regulator_get_suspend_voltage,
423*4882a593Smuzhiyun 	.set_enable = rk860x_regulator_set_enable,
424*4882a593Smuzhiyun 	.get_enable = rk860x_regulator_get_enable,
425*4882a593Smuzhiyun 	.set_suspend_enable = rk860x_regulator_set_suspend_enable,
426*4882a593Smuzhiyun 	.get_suspend_enable = rk860x_regulator_get_suspend_enable,
427*4882a593Smuzhiyun };
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun U_BOOT_DRIVER(rk860x_regulator) = {
430*4882a593Smuzhiyun 	.name = "rk860x_regulator",
431*4882a593Smuzhiyun 	.id = UCLASS_REGULATOR,
432*4882a593Smuzhiyun 	.ops = &rk860x_regulator_ops,
433*4882a593Smuzhiyun 	.probe = rk860x_regulator_probe,
434*4882a593Smuzhiyun 	.of_match = rk860x_id,
435*4882a593Smuzhiyun 	.ofdata_to_platdata = rk860x_regulator_ofdata_to_platdata,
436*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct rk860x_regulator_info),
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun 
439