1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2012-2015 Samsung Electronics
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Rajeshwari Shinde <rajeshwari.s@samsung.com>
5*4882a593Smuzhiyun * Przemyslaw Marczak <p.marczak@samsung.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <fdtdec.h>
12*4882a593Smuzhiyun #include <errno.h>
13*4882a593Smuzhiyun #include <dm.h>
14*4882a593Smuzhiyun #include <i2c.h>
15*4882a593Smuzhiyun #include <power/pmic.h>
16*4882a593Smuzhiyun #include <power/regulator.h>
17*4882a593Smuzhiyun #include <power/max77686_pmic.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define MODE(_id, _val, _name) { \
22*4882a593Smuzhiyun .id = _id, \
23*4882a593Smuzhiyun .register_value = _val, \
24*4882a593Smuzhiyun .name = _name, \
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* LDO: 1,3,4,5,9,17,18,19,20,21,22,23,24,26,26,27 */
28*4882a593Smuzhiyun static struct dm_regulator_mode max77686_ldo_mode_standby1[] = {
29*4882a593Smuzhiyun MODE(OPMODE_OFF, MAX77686_LDO_MODE_OFF, "OFF"),
30*4882a593Smuzhiyun MODE(OPMODE_LPM, MAX77686_LDO_MODE_LPM, "LPM"),
31*4882a593Smuzhiyun MODE(OPMODE_STANDBY_LPM, MAX77686_LDO_MODE_STANDBY_LPM, "ON/LPM"),
32*4882a593Smuzhiyun MODE(OPMODE_ON, MAX77686_LDO_MODE_ON, "ON"),
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* LDO: 2,6,7,8,10,11,12,14,15,16 */
36*4882a593Smuzhiyun static struct dm_regulator_mode max77686_ldo_mode_standby2[] = {
37*4882a593Smuzhiyun MODE(OPMODE_OFF, MAX77686_LDO_MODE_OFF, "OFF"),
38*4882a593Smuzhiyun MODE(OPMODE_STANDBY, MAX77686_LDO_MODE_STANDBY, "ON/OFF"),
39*4882a593Smuzhiyun MODE(OPMODE_STANDBY_LPM, MAX77686_LDO_MODE_STANDBY_LPM, "ON/LPM"),
40*4882a593Smuzhiyun MODE(OPMODE_ON, MAX77686_LDO_MODE_ON, "ON"),
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Buck: 1 */
44*4882a593Smuzhiyun static struct dm_regulator_mode max77686_buck_mode_standby[] = {
45*4882a593Smuzhiyun MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, "OFF"),
46*4882a593Smuzhiyun MODE(OPMODE_STANDBY, MAX77686_BUCK_MODE_STANDBY, "ON/OFF"),
47*4882a593Smuzhiyun MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, "ON"),
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Buck: 2,3,4 */
51*4882a593Smuzhiyun static struct dm_regulator_mode max77686_buck_mode_lpm[] = {
52*4882a593Smuzhiyun MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, "OFF"),
53*4882a593Smuzhiyun MODE(OPMODE_STANDBY, MAX77686_BUCK_MODE_STANDBY, "ON/OFF"),
54*4882a593Smuzhiyun MODE(OPMODE_LPM, MAX77686_BUCK_MODE_LPM, "LPM"),
55*4882a593Smuzhiyun MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, "ON"),
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* Buck: 5,6,7,8,9 */
59*4882a593Smuzhiyun static struct dm_regulator_mode max77686_buck_mode_onoff[] = {
60*4882a593Smuzhiyun MODE(OPMODE_OFF, MAX77686_BUCK_MODE_OFF, "OFF"),
61*4882a593Smuzhiyun MODE(OPMODE_ON, MAX77686_BUCK_MODE_ON, "ON"),
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static const char max77686_buck_ctrl[] = {
65*4882a593Smuzhiyun 0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static const char max77686_buck_out[] = {
69*4882a593Smuzhiyun 0xff, 0x11, 0x14, 0x1e, 0x28, 0x31, 0x33, 0x35, 0x37, 0x39
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
max77686_buck_volt2hex(int buck,int uV)72*4882a593Smuzhiyun static int max77686_buck_volt2hex(int buck, int uV)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun int hex = 0;
75*4882a593Smuzhiyun int hex_max = 0;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun switch (buck) {
78*4882a593Smuzhiyun case 2:
79*4882a593Smuzhiyun case 3:
80*4882a593Smuzhiyun case 4:
81*4882a593Smuzhiyun /* hex = (uV - 600000) / 12500; */
82*4882a593Smuzhiyun hex = (uV - MAX77686_BUCK_UV_LMIN) / MAX77686_BUCK_UV_LSTEP;
83*4882a593Smuzhiyun hex_max = MAX77686_BUCK234_VOLT_MAX_HEX;
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun default:
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun * hex = (uV - 750000) / 50000. We assume that dynamic voltage
88*4882a593Smuzhiyun * scaling via GPIOs is not enabled and don't support that.
89*4882a593Smuzhiyun * If this is enabled then the driver will need to take that
90*4882a593Smuzhiyun * into account and check different registers depending on
91*4882a593Smuzhiyun * the current setting. See the datasheet for details.
92*4882a593Smuzhiyun */
93*4882a593Smuzhiyun hex = (uV - MAX77686_BUCK_UV_HMIN) / MAX77686_BUCK_UV_HSTEP;
94*4882a593Smuzhiyun hex_max = MAX77686_BUCK_VOLT_MAX_HEX;
95*4882a593Smuzhiyun break;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (hex >= 0 && hex <= hex_max)
99*4882a593Smuzhiyun return hex;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun pr_err("Value: %d uV is wrong for BUCK%d", uV, buck);
102*4882a593Smuzhiyun return -EINVAL;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
max77686_buck_hex2volt(int buck,int hex)105*4882a593Smuzhiyun static int max77686_buck_hex2volt(int buck, int hex)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun unsigned uV = 0;
108*4882a593Smuzhiyun int hex_max = 0;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (hex < 0)
111*4882a593Smuzhiyun goto bad_hex;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun switch (buck) {
114*4882a593Smuzhiyun case 2:
115*4882a593Smuzhiyun case 3:
116*4882a593Smuzhiyun case 4:
117*4882a593Smuzhiyun hex_max = MAX77686_BUCK234_VOLT_MAX_HEX;
118*4882a593Smuzhiyun if (hex > hex_max)
119*4882a593Smuzhiyun goto bad_hex;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* uV = hex * 12500 + 600000; */
122*4882a593Smuzhiyun uV = hex * MAX77686_BUCK_UV_LSTEP + MAX77686_BUCK_UV_LMIN;
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun default:
125*4882a593Smuzhiyun hex_max = MAX77686_BUCK_VOLT_MAX_HEX;
126*4882a593Smuzhiyun if (hex > hex_max)
127*4882a593Smuzhiyun goto bad_hex;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* uV = hex * 50000 + 750000; */
130*4882a593Smuzhiyun uV = hex * MAX77686_BUCK_UV_HSTEP + MAX77686_BUCK_UV_HMIN;
131*4882a593Smuzhiyun break;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return uV;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun bad_hex:
137*4882a593Smuzhiyun pr_err("Value: %#x is wrong for BUCK%d", hex, buck);
138*4882a593Smuzhiyun return -EINVAL;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
max77686_ldo_volt2hex(int ldo,int uV)141*4882a593Smuzhiyun static int max77686_ldo_volt2hex(int ldo, int uV)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun int hex = 0;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun switch (ldo) {
146*4882a593Smuzhiyun case 1:
147*4882a593Smuzhiyun case 2:
148*4882a593Smuzhiyun case 6:
149*4882a593Smuzhiyun case 7:
150*4882a593Smuzhiyun case 8:
151*4882a593Smuzhiyun case 15:
152*4882a593Smuzhiyun hex = (uV - MAX77686_LDO_UV_MIN) / MAX77686_LDO_UV_LSTEP;
153*4882a593Smuzhiyun /* hex = (uV - 800000) / 25000; */
154*4882a593Smuzhiyun break;
155*4882a593Smuzhiyun default:
156*4882a593Smuzhiyun hex = (uV - MAX77686_LDO_UV_MIN) / MAX77686_LDO_UV_HSTEP;
157*4882a593Smuzhiyun /* hex = (uV - 800000) / 50000; */
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX)
161*4882a593Smuzhiyun return hex;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun pr_err("Value: %d uV is wrong for LDO%d", uV, ldo);
164*4882a593Smuzhiyun return -EINVAL;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
max77686_ldo_hex2volt(int ldo,int hex)167*4882a593Smuzhiyun static int max77686_ldo_hex2volt(int ldo, int hex)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun unsigned int uV = 0;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (hex > MAX77686_LDO_VOLT_MAX_HEX)
172*4882a593Smuzhiyun goto bad_hex;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun switch (ldo) {
175*4882a593Smuzhiyun case 1:
176*4882a593Smuzhiyun case 2:
177*4882a593Smuzhiyun case 6:
178*4882a593Smuzhiyun case 7:
179*4882a593Smuzhiyun case 8:
180*4882a593Smuzhiyun case 15:
181*4882a593Smuzhiyun /* uV = hex * 25000 + 800000; */
182*4882a593Smuzhiyun uV = hex * MAX77686_LDO_UV_LSTEP + MAX77686_LDO_UV_MIN;
183*4882a593Smuzhiyun break;
184*4882a593Smuzhiyun default:
185*4882a593Smuzhiyun /* uV = hex * 50000 + 800000; */
186*4882a593Smuzhiyun uV = hex * MAX77686_LDO_UV_HSTEP + MAX77686_LDO_UV_MIN;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return uV;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun bad_hex:
192*4882a593Smuzhiyun pr_err("Value: %#x is wrong for ldo%d", hex, ldo);
193*4882a593Smuzhiyun return -EINVAL;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
max77686_ldo_hex2mode(int ldo,int hex)196*4882a593Smuzhiyun static int max77686_ldo_hex2mode(int ldo, int hex)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun if (hex > MAX77686_LDO_MODE_MASK)
199*4882a593Smuzhiyun return -EINVAL;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun switch (hex) {
202*4882a593Smuzhiyun case MAX77686_LDO_MODE_OFF:
203*4882a593Smuzhiyun return OPMODE_OFF;
204*4882a593Smuzhiyun case MAX77686_LDO_MODE_LPM: /* == MAX77686_LDO_MODE_STANDBY: */
205*4882a593Smuzhiyun /* The same mode values but different meaning for each ldo */
206*4882a593Smuzhiyun switch (ldo) {
207*4882a593Smuzhiyun case 2:
208*4882a593Smuzhiyun case 6:
209*4882a593Smuzhiyun case 7:
210*4882a593Smuzhiyun case 8:
211*4882a593Smuzhiyun case 10:
212*4882a593Smuzhiyun case 11:
213*4882a593Smuzhiyun case 12:
214*4882a593Smuzhiyun case 14:
215*4882a593Smuzhiyun case 15:
216*4882a593Smuzhiyun case 16:
217*4882a593Smuzhiyun return OPMODE_STANDBY;
218*4882a593Smuzhiyun default:
219*4882a593Smuzhiyun return OPMODE_LPM;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun case MAX77686_LDO_MODE_STANDBY_LPM:
222*4882a593Smuzhiyun return OPMODE_STANDBY_LPM;
223*4882a593Smuzhiyun case MAX77686_LDO_MODE_ON:
224*4882a593Smuzhiyun return OPMODE_ON;
225*4882a593Smuzhiyun default:
226*4882a593Smuzhiyun return -EINVAL;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
max77686_buck_hex2mode(int buck,int hex)230*4882a593Smuzhiyun static int max77686_buck_hex2mode(int buck, int hex)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun if (hex > MAX77686_BUCK_MODE_MASK)
233*4882a593Smuzhiyun return -EINVAL;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun switch (hex) {
236*4882a593Smuzhiyun case MAX77686_BUCK_MODE_OFF:
237*4882a593Smuzhiyun return OPMODE_OFF;
238*4882a593Smuzhiyun case MAX77686_BUCK_MODE_ON:
239*4882a593Smuzhiyun return OPMODE_ON;
240*4882a593Smuzhiyun case MAX77686_BUCK_MODE_STANDBY:
241*4882a593Smuzhiyun switch (buck) {
242*4882a593Smuzhiyun case 1:
243*4882a593Smuzhiyun case 2:
244*4882a593Smuzhiyun case 3:
245*4882a593Smuzhiyun case 4:
246*4882a593Smuzhiyun return OPMODE_STANDBY;
247*4882a593Smuzhiyun default:
248*4882a593Smuzhiyun return -EINVAL;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun case MAX77686_BUCK_MODE_LPM:
251*4882a593Smuzhiyun switch (buck) {
252*4882a593Smuzhiyun case 2:
253*4882a593Smuzhiyun case 3:
254*4882a593Smuzhiyun case 4:
255*4882a593Smuzhiyun return OPMODE_LPM;
256*4882a593Smuzhiyun default:
257*4882a593Smuzhiyun return -EINVAL;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun default:
260*4882a593Smuzhiyun return -EINVAL;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
max77686_buck_modes(int buck,struct dm_regulator_mode ** modesp)264*4882a593Smuzhiyun static int max77686_buck_modes(int buck, struct dm_regulator_mode **modesp)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun int ret = -EINVAL;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun if (buck < 1 || buck > MAX77686_BUCK_NUM)
269*4882a593Smuzhiyun return ret;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun switch (buck) {
272*4882a593Smuzhiyun case 1:
273*4882a593Smuzhiyun *modesp = max77686_buck_mode_standby;
274*4882a593Smuzhiyun ret = ARRAY_SIZE(max77686_buck_mode_standby);
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun case 2:
277*4882a593Smuzhiyun case 3:
278*4882a593Smuzhiyun case 4:
279*4882a593Smuzhiyun *modesp = max77686_buck_mode_lpm;
280*4882a593Smuzhiyun ret = ARRAY_SIZE(max77686_buck_mode_lpm);
281*4882a593Smuzhiyun break;
282*4882a593Smuzhiyun default:
283*4882a593Smuzhiyun *modesp = max77686_buck_mode_onoff;
284*4882a593Smuzhiyun ret = ARRAY_SIZE(max77686_buck_mode_onoff);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun return ret;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
max77686_ldo_modes(int ldo,struct dm_regulator_mode ** modesp,struct udevice * dev)290*4882a593Smuzhiyun static int max77686_ldo_modes(int ldo, struct dm_regulator_mode **modesp,
291*4882a593Smuzhiyun struct udevice *dev)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun int ret = -EINVAL;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun if (ldo < 1 || ldo > MAX77686_LDO_NUM)
296*4882a593Smuzhiyun return ret;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun switch (ldo) {
299*4882a593Smuzhiyun case 2:
300*4882a593Smuzhiyun case 6:
301*4882a593Smuzhiyun case 7:
302*4882a593Smuzhiyun case 8:
303*4882a593Smuzhiyun case 10:
304*4882a593Smuzhiyun case 11:
305*4882a593Smuzhiyun case 12:
306*4882a593Smuzhiyun case 14:
307*4882a593Smuzhiyun case 15:
308*4882a593Smuzhiyun case 16:
309*4882a593Smuzhiyun *modesp = max77686_ldo_mode_standby2;
310*4882a593Smuzhiyun ret = ARRAY_SIZE(max77686_ldo_mode_standby2);
311*4882a593Smuzhiyun break;
312*4882a593Smuzhiyun default:
313*4882a593Smuzhiyun *modesp = max77686_ldo_mode_standby1;
314*4882a593Smuzhiyun ret = ARRAY_SIZE(max77686_ldo_mode_standby1);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
max77686_ldo_val(struct udevice * dev,int op,int * uV)320*4882a593Smuzhiyun static int max77686_ldo_val(struct udevice *dev, int op, int *uV)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun unsigned int adr;
323*4882a593Smuzhiyun unsigned char val;
324*4882a593Smuzhiyun int hex, ldo, ret;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (op == PMIC_OP_GET)
327*4882a593Smuzhiyun *uV = 0;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun ldo = dev->driver_data;
330*4882a593Smuzhiyun if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
331*4882a593Smuzhiyun pr_err("Wrong ldo number: %d", ldo);
332*4882a593Smuzhiyun return -EINVAL;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun ret = pmic_read(dev->parent, adr, &val, 1);
338*4882a593Smuzhiyun if (ret)
339*4882a593Smuzhiyun return ret;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
342*4882a593Smuzhiyun val &= MAX77686_LDO_VOLT_MASK;
343*4882a593Smuzhiyun ret = max77686_ldo_hex2volt(ldo, val);
344*4882a593Smuzhiyun if (ret < 0)
345*4882a593Smuzhiyun return ret;
346*4882a593Smuzhiyun *uV = ret;
347*4882a593Smuzhiyun return 0;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun hex = max77686_ldo_volt2hex(ldo, *uV);
351*4882a593Smuzhiyun if (hex < 0)
352*4882a593Smuzhiyun return hex;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun val &= ~MAX77686_LDO_VOLT_MASK;
355*4882a593Smuzhiyun val |= hex;
356*4882a593Smuzhiyun ret = pmic_write(dev->parent, adr, &val, 1);
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun return ret;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
max77686_buck_val(struct udevice * dev,int op,int * uV)361*4882a593Smuzhiyun static int max77686_buck_val(struct udevice *dev, int op, int *uV)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun unsigned int mask, adr;
364*4882a593Smuzhiyun unsigned char val;
365*4882a593Smuzhiyun int hex, buck, ret;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun buck = dev->driver_data;
368*4882a593Smuzhiyun if (buck < 1 || buck > MAX77686_BUCK_NUM) {
369*4882a593Smuzhiyun pr_err("Wrong buck number: %d", buck);
370*4882a593Smuzhiyun return -EINVAL;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun if (op == PMIC_OP_GET)
374*4882a593Smuzhiyun *uV = 0;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun /* &buck_out = ctrl + 1 */
377*4882a593Smuzhiyun adr = max77686_buck_out[buck];
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun /* mask */
380*4882a593Smuzhiyun switch (buck) {
381*4882a593Smuzhiyun case 2:
382*4882a593Smuzhiyun case 3:
383*4882a593Smuzhiyun case 4:
384*4882a593Smuzhiyun mask = MAX77686_BUCK234_VOLT_MASK;
385*4882a593Smuzhiyun break;
386*4882a593Smuzhiyun default:
387*4882a593Smuzhiyun mask = MAX77686_BUCK_VOLT_MASK;
388*4882a593Smuzhiyun break;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun ret = pmic_read(dev->parent, adr, &val, 1);
392*4882a593Smuzhiyun if (ret)
393*4882a593Smuzhiyun return ret;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
396*4882a593Smuzhiyun val &= mask;
397*4882a593Smuzhiyun ret = max77686_buck_hex2volt(buck, val);
398*4882a593Smuzhiyun if (ret < 0)
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun *uV = ret;
401*4882a593Smuzhiyun return 0;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun hex = max77686_buck_volt2hex(buck, *uV);
405*4882a593Smuzhiyun if (hex < 0)
406*4882a593Smuzhiyun return hex;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun val &= ~mask;
409*4882a593Smuzhiyun val |= hex;
410*4882a593Smuzhiyun ret = pmic_write(dev->parent, adr, &val, 1);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun return ret;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
max77686_ldo_mode(struct udevice * dev,int op,int * opmode)415*4882a593Smuzhiyun static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun unsigned int adr, mode;
418*4882a593Smuzhiyun unsigned char val;
419*4882a593Smuzhiyun int ldo, ret;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun if (op == PMIC_OP_GET)
422*4882a593Smuzhiyun *opmode = -EINVAL;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun ldo = dev->driver_data;
425*4882a593Smuzhiyun if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
426*4882a593Smuzhiyun pr_err("Wrong ldo number: %d", ldo);
427*4882a593Smuzhiyun return -EINVAL;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun ret = pmic_read(dev->parent, adr, &val, 1);
433*4882a593Smuzhiyun if (ret)
434*4882a593Smuzhiyun return ret;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
437*4882a593Smuzhiyun val &= MAX77686_LDO_MODE_MASK;
438*4882a593Smuzhiyun ret = max77686_ldo_hex2mode(ldo, val);
439*4882a593Smuzhiyun if (ret < 0)
440*4882a593Smuzhiyun return ret;
441*4882a593Smuzhiyun *opmode = ret;
442*4882a593Smuzhiyun return 0;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun /* mode */
446*4882a593Smuzhiyun switch (*opmode) {
447*4882a593Smuzhiyun case OPMODE_OFF:
448*4882a593Smuzhiyun mode = MAX77686_LDO_MODE_OFF;
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun case OPMODE_LPM:
451*4882a593Smuzhiyun switch (ldo) {
452*4882a593Smuzhiyun case 2:
453*4882a593Smuzhiyun case 6:
454*4882a593Smuzhiyun case 7:
455*4882a593Smuzhiyun case 8:
456*4882a593Smuzhiyun case 10:
457*4882a593Smuzhiyun case 11:
458*4882a593Smuzhiyun case 12:
459*4882a593Smuzhiyun case 14:
460*4882a593Smuzhiyun case 15:
461*4882a593Smuzhiyun case 16:
462*4882a593Smuzhiyun return -EINVAL;
463*4882a593Smuzhiyun default:
464*4882a593Smuzhiyun mode = MAX77686_LDO_MODE_LPM;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun break;
467*4882a593Smuzhiyun case OPMODE_STANDBY:
468*4882a593Smuzhiyun switch (ldo) {
469*4882a593Smuzhiyun case 2:
470*4882a593Smuzhiyun case 6:
471*4882a593Smuzhiyun case 7:
472*4882a593Smuzhiyun case 8:
473*4882a593Smuzhiyun case 10:
474*4882a593Smuzhiyun case 11:
475*4882a593Smuzhiyun case 12:
476*4882a593Smuzhiyun case 14:
477*4882a593Smuzhiyun case 15:
478*4882a593Smuzhiyun case 16:
479*4882a593Smuzhiyun mode = MAX77686_LDO_MODE_STANDBY;
480*4882a593Smuzhiyun break;
481*4882a593Smuzhiyun default:
482*4882a593Smuzhiyun return -EINVAL;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun break;
485*4882a593Smuzhiyun case OPMODE_STANDBY_LPM:
486*4882a593Smuzhiyun mode = MAX77686_LDO_MODE_STANDBY_LPM;
487*4882a593Smuzhiyun break;
488*4882a593Smuzhiyun case OPMODE_ON:
489*4882a593Smuzhiyun mode = MAX77686_LDO_MODE_ON;
490*4882a593Smuzhiyun break;
491*4882a593Smuzhiyun default:
492*4882a593Smuzhiyun mode = 0xff;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun if (mode == 0xff) {
496*4882a593Smuzhiyun pr_err("Wrong mode: %d for ldo%d", *opmode, ldo);
497*4882a593Smuzhiyun return -EINVAL;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun val &= ~MAX77686_LDO_MODE_MASK;
501*4882a593Smuzhiyun val |= mode;
502*4882a593Smuzhiyun ret = pmic_write(dev->parent, adr, &val, 1);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return ret;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
max77686_ldo_enable(struct udevice * dev,int op,bool * enable)507*4882a593Smuzhiyun static int max77686_ldo_enable(struct udevice *dev, int op, bool *enable)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun int ret, on_off;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
512*4882a593Smuzhiyun ret = max77686_ldo_mode(dev, op, &on_off);
513*4882a593Smuzhiyun if (ret)
514*4882a593Smuzhiyun return ret;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun switch (on_off) {
517*4882a593Smuzhiyun case OPMODE_OFF:
518*4882a593Smuzhiyun *enable = false;
519*4882a593Smuzhiyun break;
520*4882a593Smuzhiyun case OPMODE_ON:
521*4882a593Smuzhiyun *enable = true;
522*4882a593Smuzhiyun break;
523*4882a593Smuzhiyun default:
524*4882a593Smuzhiyun return -EINVAL;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun } else if (op == PMIC_OP_SET) {
527*4882a593Smuzhiyun if (*enable)
528*4882a593Smuzhiyun on_off = OPMODE_ON;
529*4882a593Smuzhiyun else
530*4882a593Smuzhiyun on_off = OPMODE_OFF;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun ret = max77686_ldo_mode(dev, op, &on_off);
533*4882a593Smuzhiyun if (ret)
534*4882a593Smuzhiyun return ret;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return 0;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
max77686_buck_mode(struct udevice * dev,int op,int * opmode)540*4882a593Smuzhiyun static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun unsigned int mask, adr, mode, mode_shift;
543*4882a593Smuzhiyun unsigned char val;
544*4882a593Smuzhiyun int buck, ret;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun buck = dev->driver_data;
547*4882a593Smuzhiyun if (buck < 1 || buck > MAX77686_BUCK_NUM) {
548*4882a593Smuzhiyun pr_err("Wrong buck number: %d", buck);
549*4882a593Smuzhiyun return -EINVAL;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun adr = max77686_buck_ctrl[buck];
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /* mask */
555*4882a593Smuzhiyun switch (buck) {
556*4882a593Smuzhiyun case 2:
557*4882a593Smuzhiyun case 3:
558*4882a593Smuzhiyun case 4:
559*4882a593Smuzhiyun mode_shift = MAX77686_BUCK_MODE_SHIFT_2;
560*4882a593Smuzhiyun break;
561*4882a593Smuzhiyun default:
562*4882a593Smuzhiyun mode_shift = MAX77686_BUCK_MODE_SHIFT_1;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun mask = MAX77686_BUCK_MODE_MASK << mode_shift;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun ret = pmic_read(dev->parent, adr, &val, 1);
568*4882a593Smuzhiyun if (ret)
569*4882a593Smuzhiyun return ret;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
572*4882a593Smuzhiyun val &= mask;
573*4882a593Smuzhiyun val >>= mode_shift;
574*4882a593Smuzhiyun ret = max77686_buck_hex2mode(buck, val);
575*4882a593Smuzhiyun if (ret < 0)
576*4882a593Smuzhiyun return ret;
577*4882a593Smuzhiyun *opmode = ret;
578*4882a593Smuzhiyun return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun /* mode */
582*4882a593Smuzhiyun switch (*opmode) {
583*4882a593Smuzhiyun case OPMODE_OFF:
584*4882a593Smuzhiyun mode = MAX77686_BUCK_MODE_OFF;
585*4882a593Smuzhiyun break;
586*4882a593Smuzhiyun case OPMODE_STANDBY:
587*4882a593Smuzhiyun switch (buck) {
588*4882a593Smuzhiyun case 1:
589*4882a593Smuzhiyun case 2:
590*4882a593Smuzhiyun case 3:
591*4882a593Smuzhiyun case 4:
592*4882a593Smuzhiyun mode = MAX77686_BUCK_MODE_STANDBY << mode_shift;
593*4882a593Smuzhiyun break;
594*4882a593Smuzhiyun default:
595*4882a593Smuzhiyun mode = 0xff;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun break;
598*4882a593Smuzhiyun case OPMODE_LPM:
599*4882a593Smuzhiyun switch (buck) {
600*4882a593Smuzhiyun case 2:
601*4882a593Smuzhiyun case 3:
602*4882a593Smuzhiyun case 4:
603*4882a593Smuzhiyun mode = MAX77686_BUCK_MODE_LPM << mode_shift;
604*4882a593Smuzhiyun break;
605*4882a593Smuzhiyun default:
606*4882a593Smuzhiyun mode = 0xff;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun break;
609*4882a593Smuzhiyun case OPMODE_ON:
610*4882a593Smuzhiyun mode = MAX77686_BUCK_MODE_ON << mode_shift;
611*4882a593Smuzhiyun break;
612*4882a593Smuzhiyun default:
613*4882a593Smuzhiyun mode = 0xff;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun if (mode == 0xff) {
617*4882a593Smuzhiyun pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck);
618*4882a593Smuzhiyun return -EINVAL;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun val &= ~mask;
622*4882a593Smuzhiyun val |= mode;
623*4882a593Smuzhiyun ret = pmic_write(dev->parent, adr, &val, 1);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun return ret;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
max77686_buck_enable(struct udevice * dev,int op,bool * enable)628*4882a593Smuzhiyun static int max77686_buck_enable(struct udevice *dev, int op, bool *enable)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun int ret, on_off;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun if (op == PMIC_OP_GET) {
633*4882a593Smuzhiyun ret = max77686_buck_mode(dev, op, &on_off);
634*4882a593Smuzhiyun if (ret)
635*4882a593Smuzhiyun return ret;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun switch (on_off) {
638*4882a593Smuzhiyun case OPMODE_OFF:
639*4882a593Smuzhiyun *enable = false;
640*4882a593Smuzhiyun break;
641*4882a593Smuzhiyun case OPMODE_ON:
642*4882a593Smuzhiyun *enable = true;
643*4882a593Smuzhiyun break;
644*4882a593Smuzhiyun default:
645*4882a593Smuzhiyun return -EINVAL;
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun } else if (op == PMIC_OP_SET) {
648*4882a593Smuzhiyun if (*enable)
649*4882a593Smuzhiyun on_off = OPMODE_ON;
650*4882a593Smuzhiyun else
651*4882a593Smuzhiyun on_off = OPMODE_OFF;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun ret = max77686_buck_mode(dev, op, &on_off);
654*4882a593Smuzhiyun if (ret)
655*4882a593Smuzhiyun return ret;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
max77686_ldo_probe(struct udevice * dev)661*4882a593Smuzhiyun static int max77686_ldo_probe(struct udevice *dev)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun uc_pdata->type = REGULATOR_TYPE_LDO;
668*4882a593Smuzhiyun uc_pdata->mode_count = max77686_ldo_modes(dev->driver_data,
669*4882a593Smuzhiyun &uc_pdata->mode, dev);
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun return 0;
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun
ldo_get_value(struct udevice * dev)674*4882a593Smuzhiyun static int ldo_get_value(struct udevice *dev)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun int uV;
677*4882a593Smuzhiyun int ret;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun ret = max77686_ldo_val(dev, PMIC_OP_GET, &uV);
680*4882a593Smuzhiyun if (ret)
681*4882a593Smuzhiyun return ret;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun return uV;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun
ldo_set_value(struct udevice * dev,int uV)686*4882a593Smuzhiyun static int ldo_set_value(struct udevice *dev, int uV)
687*4882a593Smuzhiyun {
688*4882a593Smuzhiyun return max77686_ldo_val(dev, PMIC_OP_SET, &uV);
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
ldo_get_enable(struct udevice * dev)691*4882a593Smuzhiyun static int ldo_get_enable(struct udevice *dev)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun bool enable = false;
694*4882a593Smuzhiyun int ret;
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun ret = max77686_ldo_enable(dev, PMIC_OP_GET, &enable);
697*4882a593Smuzhiyun if (ret)
698*4882a593Smuzhiyun return ret;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun return enable;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
ldo_set_enable(struct udevice * dev,bool enable)703*4882a593Smuzhiyun static int ldo_set_enable(struct udevice *dev, bool enable)
704*4882a593Smuzhiyun {
705*4882a593Smuzhiyun return max77686_ldo_enable(dev, PMIC_OP_SET, &enable);
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun
ldo_get_mode(struct udevice * dev)708*4882a593Smuzhiyun static int ldo_get_mode(struct udevice *dev)
709*4882a593Smuzhiyun {
710*4882a593Smuzhiyun int mode;
711*4882a593Smuzhiyun int ret;
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun ret = max77686_ldo_mode(dev, PMIC_OP_GET, &mode);
714*4882a593Smuzhiyun if (ret)
715*4882a593Smuzhiyun return ret;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun return mode;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
ldo_set_mode(struct udevice * dev,int mode)720*4882a593Smuzhiyun static int ldo_set_mode(struct udevice *dev, int mode)
721*4882a593Smuzhiyun {
722*4882a593Smuzhiyun return max77686_ldo_mode(dev, PMIC_OP_SET, &mode);
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
max77686_buck_probe(struct udevice * dev)725*4882a593Smuzhiyun static int max77686_buck_probe(struct udevice *dev)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun struct dm_regulator_uclass_platdata *uc_pdata;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun uc_pdata = dev_get_uclass_platdata(dev);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun uc_pdata->type = REGULATOR_TYPE_BUCK;
732*4882a593Smuzhiyun uc_pdata->mode_count = max77686_buck_modes(dev->driver_data,
733*4882a593Smuzhiyun &uc_pdata->mode);
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun return 0;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
buck_get_value(struct udevice * dev)738*4882a593Smuzhiyun static int buck_get_value(struct udevice *dev)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun int uV;
741*4882a593Smuzhiyun int ret;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun ret = max77686_buck_val(dev, PMIC_OP_GET, &uV);
744*4882a593Smuzhiyun if (ret)
745*4882a593Smuzhiyun return ret;
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun return uV;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun
buck_set_value(struct udevice * dev,int uV)750*4882a593Smuzhiyun static int buck_set_value(struct udevice *dev, int uV)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun return max77686_buck_val(dev, PMIC_OP_SET, &uV);
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
buck_get_enable(struct udevice * dev)755*4882a593Smuzhiyun static int buck_get_enable(struct udevice *dev)
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun bool enable = false;
758*4882a593Smuzhiyun int ret;
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun ret = max77686_buck_enable(dev, PMIC_OP_GET, &enable);
761*4882a593Smuzhiyun if (ret)
762*4882a593Smuzhiyun return ret;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun return enable;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
buck_set_enable(struct udevice * dev,bool enable)767*4882a593Smuzhiyun static int buck_set_enable(struct udevice *dev, bool enable)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun return max77686_buck_enable(dev, PMIC_OP_SET, &enable);
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
buck_get_mode(struct udevice * dev)772*4882a593Smuzhiyun static int buck_get_mode(struct udevice *dev)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun int mode;
775*4882a593Smuzhiyun int ret;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun ret = max77686_buck_mode(dev, PMIC_OP_GET, &mode);
778*4882a593Smuzhiyun if (ret)
779*4882a593Smuzhiyun return ret;
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun return mode;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun
buck_set_mode(struct udevice * dev,int mode)784*4882a593Smuzhiyun static int buck_set_mode(struct udevice *dev, int mode)
785*4882a593Smuzhiyun {
786*4882a593Smuzhiyun return max77686_buck_mode(dev, PMIC_OP_SET, &mode);
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun static const struct dm_regulator_ops max77686_ldo_ops = {
790*4882a593Smuzhiyun .get_value = ldo_get_value,
791*4882a593Smuzhiyun .set_value = ldo_set_value,
792*4882a593Smuzhiyun .get_enable = ldo_get_enable,
793*4882a593Smuzhiyun .set_enable = ldo_set_enable,
794*4882a593Smuzhiyun .get_mode = ldo_get_mode,
795*4882a593Smuzhiyun .set_mode = ldo_set_mode,
796*4882a593Smuzhiyun };
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun U_BOOT_DRIVER(max77686_ldo) = {
799*4882a593Smuzhiyun .name = MAX77686_LDO_DRIVER,
800*4882a593Smuzhiyun .id = UCLASS_REGULATOR,
801*4882a593Smuzhiyun .ops = &max77686_ldo_ops,
802*4882a593Smuzhiyun .probe = max77686_ldo_probe,
803*4882a593Smuzhiyun };
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun static const struct dm_regulator_ops max77686_buck_ops = {
806*4882a593Smuzhiyun .get_value = buck_get_value,
807*4882a593Smuzhiyun .set_value = buck_set_value,
808*4882a593Smuzhiyun .get_enable = buck_get_enable,
809*4882a593Smuzhiyun .set_enable = buck_set_enable,
810*4882a593Smuzhiyun .get_mode = buck_get_mode,
811*4882a593Smuzhiyun .set_mode = buck_set_mode,
812*4882a593Smuzhiyun };
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun U_BOOT_DRIVER(max77686_buck) = {
815*4882a593Smuzhiyun .name = MAX77686_BUCK_DRIVER,
816*4882a593Smuzhiyun .id = UCLASS_REGULATOR,
817*4882a593Smuzhiyun .ops = &max77686_buck_ops,
818*4882a593Smuzhiyun .probe = max77686_buck_probe,
819*4882a593Smuzhiyun };
820