xref: /OK3568_Linux_fs/u-boot/drivers/power/regulator/lp873x_regulator.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2016
3*4882a593Smuzhiyun  * Texas Instruments Incorporated, <www.ti.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Keerthy <j-keerthy@ti.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <fdtdec.h>
12*4882a593Smuzhiyun #include <errno.h>
13*4882a593Smuzhiyun #include <dm.h>
14*4882a593Smuzhiyun #include <i2c.h>
15*4882a593Smuzhiyun #include <power/pmic.h>
16*4882a593Smuzhiyun #include <power/regulator.h>
17*4882a593Smuzhiyun #include <power/lp873x.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun static const char lp873x_buck_ctrl[LP873X_BUCK_NUM] = {0x2, 0x4};
22*4882a593Smuzhiyun static const char lp873x_buck_volt[LP873X_BUCK_NUM] = {0x6, 0x7};
23*4882a593Smuzhiyun static const char lp873x_ldo_ctrl[LP873X_LDO_NUM] = {0x8, 0x9};
24*4882a593Smuzhiyun static const char lp873x_ldo_volt[LP873X_LDO_NUM] = {0xA, 0xB};
25*4882a593Smuzhiyun 
lp873x_buck_enable(struct udevice * dev,int op,bool * enable)26*4882a593Smuzhiyun static int lp873x_buck_enable(struct udevice *dev, int op, bool *enable)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	int ret;
29*4882a593Smuzhiyun 	unsigned int adr;
30*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
33*4882a593Smuzhiyun 	adr = uc_pdata->ctrl_reg;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	ret = pmic_reg_read(dev->parent, adr);
36*4882a593Smuzhiyun 	if (ret < 0)
37*4882a593Smuzhiyun 		return ret;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	if (op == PMIC_OP_GET) {
40*4882a593Smuzhiyun 		ret &= LP873X_BUCK_MODE_MASK;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 		if (ret)
43*4882a593Smuzhiyun 			*enable = true;
44*4882a593Smuzhiyun 		else
45*4882a593Smuzhiyun 			*enable = false;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 		return 0;
48*4882a593Smuzhiyun 	} else if (op == PMIC_OP_SET) {
49*4882a593Smuzhiyun 		if (*enable)
50*4882a593Smuzhiyun 			ret |= LP873X_BUCK_MODE_MASK;
51*4882a593Smuzhiyun 		else
52*4882a593Smuzhiyun 			ret &= ~(LP873X_BUCK_MODE_MASK);
53*4882a593Smuzhiyun 		ret = pmic_reg_write(dev->parent, adr, ret);
54*4882a593Smuzhiyun 		if (ret)
55*4882a593Smuzhiyun 			return ret;
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
lp873x_buck_volt2hex(int uV)61*4882a593Smuzhiyun static int lp873x_buck_volt2hex(int uV)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	if (uV > LP873X_BUCK_VOLT_MAX)
64*4882a593Smuzhiyun 		return -EINVAL;
65*4882a593Smuzhiyun 	else if (uV > 1400000)
66*4882a593Smuzhiyun 		return (uV - 1420000) / 20000 + 0x9E;
67*4882a593Smuzhiyun 	else if (uV > 730000)
68*4882a593Smuzhiyun 		return (uV - 735000) / 5000 + 0x18;
69*4882a593Smuzhiyun 	else if (uV >= 700000)
70*4882a593Smuzhiyun 		return (uV - 700000) / 10000 + 0x1;
71*4882a593Smuzhiyun 	else
72*4882a593Smuzhiyun 		return -EINVAL;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
lp873x_buck_hex2volt(int hex)75*4882a593Smuzhiyun static int lp873x_buck_hex2volt(int hex)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	if (hex > LP873X_BUCK_VOLT_MAX_HEX)
78*4882a593Smuzhiyun 		return -EINVAL;
79*4882a593Smuzhiyun 	else if (hex > 0x9D)
80*4882a593Smuzhiyun 		return 1400000 + (hex - 0x9D) * 20000;
81*4882a593Smuzhiyun 	else if (hex > 0x17)
82*4882a593Smuzhiyun 		return 730000 + (hex - 0x17) * 5000;
83*4882a593Smuzhiyun 	else if (hex >= 0x14)
84*4882a593Smuzhiyun 		return 700000 + (hex - 0x14) * 10000;
85*4882a593Smuzhiyun 	else
86*4882a593Smuzhiyun 		return -EINVAL;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
lp873x_buck_val(struct udevice * dev,int op,int * uV)89*4882a593Smuzhiyun static int lp873x_buck_val(struct udevice *dev, int op, int *uV)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	unsigned int hex, adr;
92*4882a593Smuzhiyun 	int ret;
93*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (op == PMIC_OP_GET)
98*4882a593Smuzhiyun 		*uV = 0;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	adr = uc_pdata->volt_reg;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	ret = pmic_reg_read(dev->parent, adr);
103*4882a593Smuzhiyun 	if (ret < 0)
104*4882a593Smuzhiyun 		return ret;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (op == PMIC_OP_GET) {
107*4882a593Smuzhiyun 		ret &= LP873X_BUCK_VOLT_MASK;
108*4882a593Smuzhiyun 		ret = lp873x_buck_hex2volt(ret);
109*4882a593Smuzhiyun 		if (ret < 0)
110*4882a593Smuzhiyun 			return ret;
111*4882a593Smuzhiyun 		*uV = ret;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 		return 0;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	hex = lp873x_buck_volt2hex(*uV);
117*4882a593Smuzhiyun 	if (hex < 0)
118*4882a593Smuzhiyun 		return hex;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ret &= 0x0;
121*4882a593Smuzhiyun 	ret |= hex;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	ret = pmic_reg_write(dev->parent, adr, ret);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	return ret;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
lp873x_ldo_enable(struct udevice * dev,int op,bool * enable)128*4882a593Smuzhiyun static int lp873x_ldo_enable(struct udevice *dev, int op, bool *enable)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	int ret;
131*4882a593Smuzhiyun 	unsigned int adr;
132*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
135*4882a593Smuzhiyun 	adr = uc_pdata->ctrl_reg;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	ret = pmic_reg_read(dev->parent, adr);
138*4882a593Smuzhiyun 	if (ret < 0)
139*4882a593Smuzhiyun 		return ret;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (op == PMIC_OP_GET) {
142*4882a593Smuzhiyun 		ret &= LP873X_LDO_MODE_MASK;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 		if (ret)
145*4882a593Smuzhiyun 			*enable = true;
146*4882a593Smuzhiyun 		else
147*4882a593Smuzhiyun 			*enable = false;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 		return 0;
150*4882a593Smuzhiyun 	} else if (op == PMIC_OP_SET) {
151*4882a593Smuzhiyun 		if (*enable)
152*4882a593Smuzhiyun 			ret |= LP873X_LDO_MODE_MASK;
153*4882a593Smuzhiyun 		else
154*4882a593Smuzhiyun 			ret &= ~(LP873X_LDO_MODE_MASK);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 		ret = pmic_reg_write(dev->parent, adr, ret);
157*4882a593Smuzhiyun 		if (ret)
158*4882a593Smuzhiyun 			return ret;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	return 0;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
lp873x_ldo_volt2hex(int uV)164*4882a593Smuzhiyun static int lp873x_ldo_volt2hex(int uV)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	if (uV > LP873X_LDO_VOLT_MAX)
167*4882a593Smuzhiyun 		return -EINVAL;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	return (uV - 800000) / 100000;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
lp873x_ldo_hex2volt(int hex)172*4882a593Smuzhiyun static int lp873x_ldo_hex2volt(int hex)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	if (hex > LP873X_LDO_VOLT_MAX_HEX)
175*4882a593Smuzhiyun 		return -EINVAL;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	if (!hex)
178*4882a593Smuzhiyun 		return 0;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	return (hex * 100000) + 800000;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
lp873x_ldo_val(struct udevice * dev,int op,int * uV)183*4882a593Smuzhiyun static int lp873x_ldo_val(struct udevice *dev, int op, int *uV)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	unsigned int hex, adr;
186*4882a593Smuzhiyun 	int ret;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	if (op == PMIC_OP_GET)
191*4882a593Smuzhiyun 		*uV = 0;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	adr = uc_pdata->volt_reg;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	ret = pmic_reg_read(dev->parent, adr);
198*4882a593Smuzhiyun 	if (ret < 0)
199*4882a593Smuzhiyun 		return ret;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (op == PMIC_OP_GET) {
202*4882a593Smuzhiyun 		ret &= LP873X_LDO_VOLT_MASK;
203*4882a593Smuzhiyun 		ret = lp873x_ldo_hex2volt(ret);
204*4882a593Smuzhiyun 		if (ret < 0)
205*4882a593Smuzhiyun 			return ret;
206*4882a593Smuzhiyun 		*uV = ret;
207*4882a593Smuzhiyun 		return 0;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	hex = lp873x_ldo_volt2hex(*uV);
211*4882a593Smuzhiyun 	if (hex < 0)
212*4882a593Smuzhiyun 		return hex;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	ret &= ~LP873X_LDO_VOLT_MASK;
215*4882a593Smuzhiyun 	ret |= hex;
216*4882a593Smuzhiyun 	if (*uV > 1650000)
217*4882a593Smuzhiyun 		ret |= 0x80;
218*4882a593Smuzhiyun 	ret = pmic_reg_write(dev->parent, adr, ret);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	return ret;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
lp873x_ldo_probe(struct udevice * dev)223*4882a593Smuzhiyun static int lp873x_ldo_probe(struct udevice *dev)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
228*4882a593Smuzhiyun 	uc_pdata->type = REGULATOR_TYPE_LDO;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	int idx = dev->driver_data;
231*4882a593Smuzhiyun 	if (idx >= LP873X_LDO_NUM) {
232*4882a593Smuzhiyun 		printf("Wrong ID for regulator\n");
233*4882a593Smuzhiyun 		return -1;
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	uc_pdata->ctrl_reg = lp873x_ldo_ctrl[idx];
237*4882a593Smuzhiyun 	uc_pdata->volt_reg = lp873x_ldo_volt[idx];
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
ldo_get_value(struct udevice * dev)242*4882a593Smuzhiyun static int ldo_get_value(struct udevice *dev)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	int uV;
245*4882a593Smuzhiyun 	int ret;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	ret = lp873x_ldo_val(dev, PMIC_OP_GET, &uV);
248*4882a593Smuzhiyun 	if (ret)
249*4882a593Smuzhiyun 		return ret;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	return uV;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
ldo_set_value(struct udevice * dev,int uV)254*4882a593Smuzhiyun static int ldo_set_value(struct udevice *dev, int uV)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	return lp873x_ldo_val(dev, PMIC_OP_SET, &uV);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun 
ldo_get_enable(struct udevice * dev)259*4882a593Smuzhiyun static int ldo_get_enable(struct udevice *dev)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	bool enable = false;
262*4882a593Smuzhiyun 	int ret;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	ret = lp873x_ldo_enable(dev, PMIC_OP_GET, &enable);
265*4882a593Smuzhiyun 	if (ret)
266*4882a593Smuzhiyun 		return ret;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	return enable;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
ldo_set_enable(struct udevice * dev,bool enable)271*4882a593Smuzhiyun static int ldo_set_enable(struct udevice *dev, bool enable)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	return lp873x_ldo_enable(dev, PMIC_OP_SET, &enable);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun 
lp873x_buck_probe(struct udevice * dev)276*4882a593Smuzhiyun static int lp873x_buck_probe(struct udevice *dev)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *uc_pdata;
279*4882a593Smuzhiyun 	int idx;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	uc_pdata = dev_get_uclass_platdata(dev);
282*4882a593Smuzhiyun 	uc_pdata->type = REGULATOR_TYPE_BUCK;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	idx = dev->driver_data;
285*4882a593Smuzhiyun 	if (idx >= LP873X_BUCK_NUM) {
286*4882a593Smuzhiyun 		printf("Wrong ID for regulator\n");
287*4882a593Smuzhiyun 		return -1;
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	uc_pdata->ctrl_reg = lp873x_buck_ctrl[idx];
291*4882a593Smuzhiyun 	uc_pdata->volt_reg = lp873x_buck_volt[idx];
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	return 0;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
buck_get_value(struct udevice * dev)296*4882a593Smuzhiyun static int buck_get_value(struct udevice *dev)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	int uV;
299*4882a593Smuzhiyun 	int ret;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	ret = lp873x_buck_val(dev, PMIC_OP_GET, &uV);
302*4882a593Smuzhiyun 	if (ret)
303*4882a593Smuzhiyun 		return ret;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	return uV;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun 
buck_set_value(struct udevice * dev,int uV)308*4882a593Smuzhiyun static int buck_set_value(struct udevice *dev, int uV)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	return lp873x_buck_val(dev, PMIC_OP_SET, &uV);
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun 
buck_get_enable(struct udevice * dev)313*4882a593Smuzhiyun static int buck_get_enable(struct udevice *dev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	bool enable = false;
316*4882a593Smuzhiyun 	int ret;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	ret = lp873x_buck_enable(dev, PMIC_OP_GET, &enable);
320*4882a593Smuzhiyun 	if (ret)
321*4882a593Smuzhiyun 		return ret;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	return enable;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun 
buck_set_enable(struct udevice * dev,bool enable)326*4882a593Smuzhiyun static int buck_set_enable(struct udevice *dev, bool enable)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun 	return lp873x_buck_enable(dev, PMIC_OP_SET, &enable);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun static const struct dm_regulator_ops lp873x_ldo_ops = {
332*4882a593Smuzhiyun 	.get_value  = ldo_get_value,
333*4882a593Smuzhiyun 	.set_value  = ldo_set_value,
334*4882a593Smuzhiyun 	.get_enable = ldo_get_enable,
335*4882a593Smuzhiyun 	.set_enable = ldo_set_enable,
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun U_BOOT_DRIVER(lp873x_ldo) = {
339*4882a593Smuzhiyun 	.name = LP873X_LDO_DRIVER,
340*4882a593Smuzhiyun 	.id = UCLASS_REGULATOR,
341*4882a593Smuzhiyun 	.ops = &lp873x_ldo_ops,
342*4882a593Smuzhiyun 	.probe = lp873x_ldo_probe,
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun static const struct dm_regulator_ops lp873x_buck_ops = {
346*4882a593Smuzhiyun 	.get_value  = buck_get_value,
347*4882a593Smuzhiyun 	.set_value  = buck_set_value,
348*4882a593Smuzhiyun 	.get_enable = buck_get_enable,
349*4882a593Smuzhiyun 	.set_enable = buck_set_enable,
350*4882a593Smuzhiyun };
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun U_BOOT_DRIVER(lp873x_buck) = {
353*4882a593Smuzhiyun 	.name = LP873X_BUCK_DRIVER,
354*4882a593Smuzhiyun 	.id = UCLASS_REGULATOR,
355*4882a593Smuzhiyun 	.ops = &lp873x_buck_ops,
356*4882a593Smuzhiyun 	.probe = lp873x_buck_probe,
357*4882a593Smuzhiyun };
358