1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Samsung Electronics
3*4882a593Smuzhiyun * Lukasz Majewski <l.majewski@samsung.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2010
6*4882a593Smuzhiyun * Stefano Babic, DENX Software Engineering, sbabic@denx.de
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <linux/types.h>
15*4882a593Smuzhiyun #include <power/pmic.h>
16*4882a593Smuzhiyun #include <spi.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static struct spi_slave *slave;
19*4882a593Smuzhiyun
pmic_reg(struct pmic * p,u32 reg,u32 * val,u32 write)20*4882a593Smuzhiyun static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun u32 pmic_tx, pmic_rx;
23*4882a593Smuzhiyun u32 tmp;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun if (!slave) {
26*4882a593Smuzhiyun slave = spi_setup_slave(p->bus, p->hw.spi.cs, p->hw.spi.clk,
27*4882a593Smuzhiyun p->hw.spi.mode);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun if (!slave)
30*4882a593Smuzhiyun return -ENODEV;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun if (check_reg(p, reg))
34*4882a593Smuzhiyun return -EINVAL;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun if (spi_claim_bus(slave))
37*4882a593Smuzhiyun return -EBUSY;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun pmic_tx = p->hw.spi.prepare_tx(reg, val, write);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun tmp = cpu_to_be32(pmic_tx);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
44*4882a593Smuzhiyun pmic_spi_flags))
45*4882a593Smuzhiyun goto err;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (write) {
48*4882a593Smuzhiyun pmic_tx = p->hw.spi.prepare_tx(reg, val, 0);
49*4882a593Smuzhiyun tmp = cpu_to_be32(pmic_tx);
50*4882a593Smuzhiyun if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx,
51*4882a593Smuzhiyun pmic_spi_flags))
52*4882a593Smuzhiyun goto err;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun spi_release_bus(slave);
56*4882a593Smuzhiyun *val = cpu_to_be32(pmic_rx);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun err:
61*4882a593Smuzhiyun spi_release_bus(slave);
62*4882a593Smuzhiyun return -ENOTSUPP;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
pmic_reg_write(struct pmic * p,u32 reg,u32 val)65*4882a593Smuzhiyun int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun return pmic_reg(p, reg, &val, 1);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
pmic_reg_read(struct pmic * p,u32 reg,u32 * val)70*4882a593Smuzhiyun int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return pmic_reg(p, reg, val, 0);
73*4882a593Smuzhiyun }
74