xref: /OK3568_Linux_fs/u-boot/drivers/power/power_i2c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011 Samsung Electronics
3*4882a593Smuzhiyun  * Lukasz Majewski <l.majewski@samsung.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (C) Copyright 2010
6*4882a593Smuzhiyun  * Stefano Babic, DENX Software Engineering, sbabic@denx.de
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <linux/types.h>
15*4882a593Smuzhiyun #include <power/pmic.h>
16*4882a593Smuzhiyun #include <i2c.h>
17*4882a593Smuzhiyun #include <linux/compiler.h>
18*4882a593Smuzhiyun 
pmic_reg_write(struct pmic * p,u32 reg,u32 val)19*4882a593Smuzhiyun int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun 	unsigned char buf[4] = { 0 };
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	if (check_reg(p, reg))
24*4882a593Smuzhiyun 		return -EINVAL;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	I2C_SET_BUS(p->bus);
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	switch (pmic_i2c_tx_num) {
29*4882a593Smuzhiyun 	case 3:
30*4882a593Smuzhiyun 		if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG) {
31*4882a593Smuzhiyun 			buf[2] = (cpu_to_le32(val) >> 16) & 0xff;
32*4882a593Smuzhiyun 			buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
33*4882a593Smuzhiyun 			buf[0] = cpu_to_le32(val) & 0xff;
34*4882a593Smuzhiyun 		} else {
35*4882a593Smuzhiyun 			buf[0] = (cpu_to_le32(val) >> 16) & 0xff;
36*4882a593Smuzhiyun 			buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
37*4882a593Smuzhiyun 			buf[2] = cpu_to_le32(val) & 0xff;
38*4882a593Smuzhiyun 		}
39*4882a593Smuzhiyun 		break;
40*4882a593Smuzhiyun 	case 2:
41*4882a593Smuzhiyun 		if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG) {
42*4882a593Smuzhiyun 			buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
43*4882a593Smuzhiyun 			buf[0] = cpu_to_le32(val) & 0xff;
44*4882a593Smuzhiyun 		} else {
45*4882a593Smuzhiyun 			buf[0] = (cpu_to_le32(val) >> 8) & 0xff;
46*4882a593Smuzhiyun 			buf[1] = cpu_to_le32(val) & 0xff;
47*4882a593Smuzhiyun 		}
48*4882a593Smuzhiyun 		break;
49*4882a593Smuzhiyun 	case 1:
50*4882a593Smuzhiyun 		buf[0] = cpu_to_le32(val) & 0xff;
51*4882a593Smuzhiyun 		break;
52*4882a593Smuzhiyun 	default:
53*4882a593Smuzhiyun 		printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);
54*4882a593Smuzhiyun 		return -EINVAL;
55*4882a593Smuzhiyun 	}
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
pmic_reg_read(struct pmic * p,u32 reg,u32 * val)60*4882a593Smuzhiyun int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	unsigned char buf[4] = { 0 };
63*4882a593Smuzhiyun 	u32 ret_val = 0;
64*4882a593Smuzhiyun 	int ret;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	if (check_reg(p, reg))
67*4882a593Smuzhiyun 		return -EINVAL;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	I2C_SET_BUS(p->bus);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
72*4882a593Smuzhiyun 	if (ret)
73*4882a593Smuzhiyun 		return ret;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	switch (pmic_i2c_tx_num) {
76*4882a593Smuzhiyun 	case 3:
77*4882a593Smuzhiyun 		if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG)
78*4882a593Smuzhiyun 			ret_val = le32_to_cpu(buf[2] << 16
79*4882a593Smuzhiyun 					      | buf[1] << 8 | buf[0]);
80*4882a593Smuzhiyun 		else
81*4882a593Smuzhiyun 			ret_val = le32_to_cpu(buf[0] << 16 |
82*4882a593Smuzhiyun 					      buf[1] << 8 | buf[2]);
83*4882a593Smuzhiyun 		break;
84*4882a593Smuzhiyun 	case 2:
85*4882a593Smuzhiyun 		if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG)
86*4882a593Smuzhiyun 			ret_val = le32_to_cpu(buf[1] << 8 | buf[0]);
87*4882a593Smuzhiyun 		else
88*4882a593Smuzhiyun 			ret_val = le32_to_cpu(buf[0] << 8 | buf[1]);
89*4882a593Smuzhiyun 		break;
90*4882a593Smuzhiyun 	case 1:
91*4882a593Smuzhiyun 		ret_val = le32_to_cpu(buf[0]);
92*4882a593Smuzhiyun 		break;
93*4882a593Smuzhiyun 	default:
94*4882a593Smuzhiyun 		printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);
95*4882a593Smuzhiyun 		return -EINVAL;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun 	memcpy(val, &ret_val, sizeof(ret_val));
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
pmic_probe(struct pmic * p)102*4882a593Smuzhiyun int pmic_probe(struct pmic *p)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	i2c_set_bus_num(p->bus);
105*4882a593Smuzhiyun 	debug("Bus: %d PMIC:%s probed!\n", p->bus, p->name);
106*4882a593Smuzhiyun 	if (i2c_probe(pmic_i2c_addr)) {
107*4882a593Smuzhiyun 		printf("Can't find PMIC:%s\n", p->name);
108*4882a593Smuzhiyun 		return -ENODEV;
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	return 0;
112*4882a593Smuzhiyun }
113