1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2016-2017 Google, Inc
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Fairchild FUSB302 Type-C Chip Driver
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <i2c.h>
10*4882a593Smuzhiyun #include <asm/gpio.h>
11*4882a593Smuzhiyun #include <power/power_delivery/tcpm.h>
12*4882a593Smuzhiyun #include <power/power_delivery/power_delivery.h>
13*4882a593Smuzhiyun #include "fusb302_reg.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * When the device is SNK, BC_LVL interrupt is used to monitor cc pins
17*4882a593Smuzhiyun * for the current capability offered by the SRC. As FUSB302 chip fires
18*4882a593Smuzhiyun * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
19*4882a593Smuzhiyun * a delay to avoid measuring on PD activities. The delay is slightly
20*4882a593Smuzhiyun * longer than PD_T_PD_DEBPUNCE (10-20ms).
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun #define T_BC_LVL_DEBOUNCE_DELAY_MS 30
23*4882a593Smuzhiyun #define msleep(a) udelay(a * 1000)
24*4882a593Smuzhiyun #define usleep_range(a, b) udelay((b))
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun enum toggling_mode {
27*4882a593Smuzhiyun TOGGLING_MODE_OFF,
28*4882a593Smuzhiyun TOGGLING_MODE_DRP,
29*4882a593Smuzhiyun TOGGLING_MODE_SNK,
30*4882a593Smuzhiyun TOGGLING_MODE_SRC,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun enum src_current_status {
34*4882a593Smuzhiyun SRC_CURRENT_DEFAULT,
35*4882a593Smuzhiyun SRC_CURRENT_MEDIUM,
36*4882a593Smuzhiyun SRC_CURRENT_HIGH,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static const u8 ra_mda_value[] = {
40*4882a593Smuzhiyun [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
41*4882a593Smuzhiyun [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
42*4882a593Smuzhiyun [SRC_CURRENT_HIGH] = 18, /* 798mV */
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static const u8 rd_mda_value[] = {
46*4882a593Smuzhiyun [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
47*4882a593Smuzhiyun [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
48*4882a593Smuzhiyun [SRC_CURRENT_HIGH] = 61, /* 2604mV */
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define LOG_BUFFER_ENTRIES 1024
52*4882a593Smuzhiyun #define LOG_BUFFER_ENTRY_SIZE 128
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun struct fusb302_chip {
55*4882a593Smuzhiyun struct udevice *udev;
56*4882a593Smuzhiyun struct udevice *vbus_regulator;
57*4882a593Smuzhiyun struct ofnode *child_node;
58*4882a593Smuzhiyun struct tcpm_port *tcpm_port;
59*4882a593Smuzhiyun struct tcpc_dev tcpc_dev;
60*4882a593Smuzhiyun struct gpio_desc gpio_cc_int;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun int irq;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun enum toggling_mode toggling_mode;
65*4882a593Smuzhiyun enum src_current_status src_current_status;
66*4882a593Smuzhiyun bool intr_togdone;
67*4882a593Smuzhiyun bool intr_bc_lvl;
68*4882a593Smuzhiyun bool intr_comp_chng;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* port status */
71*4882a593Smuzhiyun bool vconn_on;
72*4882a593Smuzhiyun bool vbus_on;
73*4882a593Smuzhiyun bool charge_on;
74*4882a593Smuzhiyun bool vbus_present;
75*4882a593Smuzhiyun bool gpio_cc_int_present;
76*4882a593Smuzhiyun enum typec_cc_polarity cc_polarity;
77*4882a593Smuzhiyun enum typec_cc_status cc1;
78*4882a593Smuzhiyun enum typec_cc_status cc2;
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
fusb302_i2c_write(struct fusb302_chip * chip,u8 address,u8 data)81*4882a593Smuzhiyun static int fusb302_i2c_write(struct fusb302_chip *chip,
82*4882a593Smuzhiyun u8 address, u8 data)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun int ret = 0;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun ret = dm_i2c_write(chip->udev, address, &data, 1);
87*4882a593Smuzhiyun if (ret)
88*4882a593Smuzhiyun printf("%s: cannot write 0x%02x to 0x%02x, ret=%d\n",
89*4882a593Smuzhiyun __func__, data, address, ret);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
fusb302_i2c_block_write(struct fusb302_chip * chip,u8 address,u8 length,const u8 * data)94*4882a593Smuzhiyun static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
95*4882a593Smuzhiyun u8 length, const u8 *data)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun int ret = 0;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (length <= 0)
100*4882a593Smuzhiyun return ret;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun ret = dm_i2c_write(chip->udev, address, data, length);
103*4882a593Smuzhiyun if (ret)
104*4882a593Smuzhiyun printf("%s: cannot block write 0x%02x, len=%d, ret=%d\n",
105*4882a593Smuzhiyun __func__, address, length, ret);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return ret;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
fusb302_i2c_read(struct fusb302_chip * chip,u8 address,u8 * data)110*4882a593Smuzhiyun static int fusb302_i2c_read(struct fusb302_chip *chip,
111*4882a593Smuzhiyun u8 address, u8 *data)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun int ret = 0;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ret = dm_i2c_read(chip->udev, address, data, 1);
116*4882a593Smuzhiyun if (ret)
117*4882a593Smuzhiyun printf("%s: cannot read %02x, ret=%d\n",
118*4882a593Smuzhiyun __func__, address, ret);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun return ret;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
fusb302_i2c_block_read(struct fusb302_chip * chip,u8 address,u8 length,u8 * data)123*4882a593Smuzhiyun static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
124*4882a593Smuzhiyun u8 length, u8 *data)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun int ret = 0;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (length <= 0)
129*4882a593Smuzhiyun return ret;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun ret = dm_i2c_read(chip->udev, address, data, length);
132*4882a593Smuzhiyun if (ret)
133*4882a593Smuzhiyun printf("%s: cannot block read 0x%02x, len=%d, ret=%d\n",
134*4882a593Smuzhiyun __func__, address, length, ret);
135*4882a593Smuzhiyun return ret;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
fusb302_i2c_mask_write(struct fusb302_chip * chip,u8 address,u8 mask,u8 value)138*4882a593Smuzhiyun static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
139*4882a593Smuzhiyun u8 mask, u8 value)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int ret = 0;
142*4882a593Smuzhiyun u8 data;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, address, &data);
145*4882a593Smuzhiyun if (ret)
146*4882a593Smuzhiyun return ret;
147*4882a593Smuzhiyun data &= ~mask;
148*4882a593Smuzhiyun data |= value;
149*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, address, data);
150*4882a593Smuzhiyun if (ret)
151*4882a593Smuzhiyun return ret;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return ret;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
fusb302_i2c_set_bits(struct fusb302_chip * chip,u8 address,u8 set_bits)156*4882a593Smuzhiyun static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
157*4882a593Smuzhiyun u8 set_bits)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
fusb302_i2c_clear_bits(struct fusb302_chip * chip,u8 address,u8 clear_bits)162*4882a593Smuzhiyun static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
163*4882a593Smuzhiyun u8 clear_bits)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
fusb302_sw_reset(struct fusb302_chip * chip)168*4882a593Smuzhiyun static int fusb302_sw_reset(struct fusb302_chip *chip)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun int ret = 0;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
173*4882a593Smuzhiyun FUSB_REG_RESET_SW_RESET);
174*4882a593Smuzhiyun if (ret)
175*4882a593Smuzhiyun printf("cannot sw reset the fusb302(%d)\n", ret);
176*4882a593Smuzhiyun else
177*4882a593Smuzhiyun debug("fusb302 sw reset finished\n");
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun return ret;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
fusb302_enable_tx_auto_retries(struct fusb302_chip * chip,u8 retry_count)182*4882a593Smuzhiyun static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip, u8 retry_count)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun int ret = 0;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, retry_count |
187*4882a593Smuzhiyun FUSB_REG_CONTROL3_AUTO_RETRY);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return ret;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun * mask all interrupt on the chip
194*4882a593Smuzhiyun */
fusb302_mask_interrupt(struct fusb302_chip * chip)195*4882a593Smuzhiyun static int fusb302_mask_interrupt(struct fusb302_chip *chip)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun int ret = 0;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASK, 0xFF);
200*4882a593Smuzhiyun if (ret)
201*4882a593Smuzhiyun return ret;
202*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
203*4882a593Smuzhiyun if (ret)
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
206*4882a593Smuzhiyun if (ret)
207*4882a593Smuzhiyun return ret;
208*4882a593Smuzhiyun ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
209*4882a593Smuzhiyun FUSB_REG_CONTROL0_INT_MASK);
210*4882a593Smuzhiyun return ret;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun * initialize interrupt on the chip
215*4882a593Smuzhiyun * - unmasked interrupt: VBUS_OK
216*4882a593Smuzhiyun */
fusb302_init_interrupt(struct fusb302_chip * chip)217*4882a593Smuzhiyun static int fusb302_init_interrupt(struct fusb302_chip *chip)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun int ret = 0;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
222*4882a593Smuzhiyun 0xFF & ~FUSB_REG_MASK_VBUSOK);
223*4882a593Smuzhiyun if (ret)
224*4882a593Smuzhiyun return ret;
225*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
226*4882a593Smuzhiyun if (ret)
227*4882a593Smuzhiyun return ret;
228*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
229*4882a593Smuzhiyun if (ret)
230*4882a593Smuzhiyun return ret;
231*4882a593Smuzhiyun ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
232*4882a593Smuzhiyun FUSB_REG_CONTROL0_INT_MASK);
233*4882a593Smuzhiyun return ret;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
fusb302_set_power_mode(struct fusb302_chip * chip,u8 power_mode)236*4882a593Smuzhiyun static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun int ret = 0;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
tcpm_init(struct tcpc_dev * dev)245*4882a593Smuzhiyun static int tcpm_init(struct tcpc_dev *dev)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
248*4882a593Smuzhiyun tcpc_dev);
249*4882a593Smuzhiyun int ret = 0;
250*4882a593Smuzhiyun u8 data;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun ret = fusb302_sw_reset(chip);
253*4882a593Smuzhiyun if (ret)
254*4882a593Smuzhiyun return ret;
255*4882a593Smuzhiyun ret = fusb302_enable_tx_auto_retries(chip, FUSB_REG_CONTROL3_N_RETRIES_3);
256*4882a593Smuzhiyun if (ret)
257*4882a593Smuzhiyun return ret;
258*4882a593Smuzhiyun ret = fusb302_init_interrupt(chip);
259*4882a593Smuzhiyun if (ret)
260*4882a593Smuzhiyun return ret;
261*4882a593Smuzhiyun ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
262*4882a593Smuzhiyun if (ret)
263*4882a593Smuzhiyun return ret;
264*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
265*4882a593Smuzhiyun if (ret)
266*4882a593Smuzhiyun return ret;
267*4882a593Smuzhiyun chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
268*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
269*4882a593Smuzhiyun if (ret)
270*4882a593Smuzhiyun return ret;
271*4882a593Smuzhiyun printf("fusb302 device ID: 0x%02x\n", data);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun return ret;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
tcpm_get_vbus(struct tcpc_dev * dev)276*4882a593Smuzhiyun static int tcpm_get_vbus(struct tcpc_dev *dev)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
279*4882a593Smuzhiyun tcpc_dev);
280*4882a593Smuzhiyun return chip->vbus_present ? 1 : 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun #if 0
284*4882a593Smuzhiyun static int tcpm_get_current_limit(struct tcpc_dev *dev)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
288*4882a593Smuzhiyun tcpc_dev);
289*4882a593Smuzhiyun int current_limit = 0;
290*4882a593Smuzhiyun unsigned long timeout;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (!chip->extcon)
293*4882a593Smuzhiyun return 0;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun /*
296*4882a593Smuzhiyun * USB2 Charger detection may still be in progress when we get here,
297*4882a593Smuzhiyun * this can take upto 600ms, wait 800ms max.
298*4882a593Smuzhiyun */
299*4882a593Smuzhiyun timeout = jiffies + msecs_to_jiffies(800);
300*4882a593Smuzhiyun do {
301*4882a593Smuzhiyun if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
302*4882a593Smuzhiyun current_limit = 500;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
305*4882a593Smuzhiyun extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
306*4882a593Smuzhiyun current_limit = 1500;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
309*4882a593Smuzhiyun current_limit = 2000;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun msleep(50);
312*4882a593Smuzhiyun } while (current_limit == 0 && time_before(jiffies, timeout));
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun return current_limit;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun #endif
317*4882a593Smuzhiyun
fusb302_set_src_current(struct fusb302_chip * chip,enum src_current_status status)318*4882a593Smuzhiyun static int fusb302_set_src_current(struct fusb302_chip *chip,
319*4882a593Smuzhiyun enum src_current_status status)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun int ret = 0;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun chip->src_current_status = status;
324*4882a593Smuzhiyun switch (status) {
325*4882a593Smuzhiyun case SRC_CURRENT_DEFAULT:
326*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
327*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_MASK,
328*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_DEF);
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun case SRC_CURRENT_MEDIUM:
331*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
332*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_MASK,
333*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_MED);
334*4882a593Smuzhiyun break;
335*4882a593Smuzhiyun case SRC_CURRENT_HIGH:
336*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
337*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_MASK,
338*4882a593Smuzhiyun FUSB_REG_CONTROL0_HOST_CUR_HIGH);
339*4882a593Smuzhiyun break;
340*4882a593Smuzhiyun default:
341*4882a593Smuzhiyun break;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return ret;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
fusb302_set_toggling(struct fusb302_chip * chip,enum toggling_mode mode)347*4882a593Smuzhiyun static int fusb302_set_toggling(struct fusb302_chip *chip,
348*4882a593Smuzhiyun enum toggling_mode mode)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun int ret = 0;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* first disable toggling */
353*4882a593Smuzhiyun ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
354*4882a593Smuzhiyun FUSB_REG_CONTROL2_TOGGLE);
355*4882a593Smuzhiyun if (ret)
356*4882a593Smuzhiyun return ret;
357*4882a593Smuzhiyun /* mask interrupts for SRC or SNK */
358*4882a593Smuzhiyun ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
359*4882a593Smuzhiyun FUSB_REG_MASK_BC_LVL |
360*4882a593Smuzhiyun FUSB_REG_MASK_COMP_CHNG);
361*4882a593Smuzhiyun if (ret)
362*4882a593Smuzhiyun return ret;
363*4882a593Smuzhiyun chip->intr_bc_lvl = false;
364*4882a593Smuzhiyun chip->intr_comp_chng = false;
365*4882a593Smuzhiyun /* configure toggling mode: none/snk/src/drp */
366*4882a593Smuzhiyun switch (mode) {
367*4882a593Smuzhiyun case TOGGLING_MODE_OFF:
368*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
369*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_MASK,
370*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_NONE);
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun case TOGGLING_MODE_SNK:
373*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
374*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_MASK,
375*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_UFP);
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun case TOGGLING_MODE_SRC:
378*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
379*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_MASK,
380*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_DFP);
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun case TOGGLING_MODE_DRP:
383*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
384*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_MASK,
385*4882a593Smuzhiyun FUSB_REG_CONTROL2_MODE_DRP);
386*4882a593Smuzhiyun break;
387*4882a593Smuzhiyun default:
388*4882a593Smuzhiyun break;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun if (ret)
392*4882a593Smuzhiyun return ret;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun if (mode == TOGGLING_MODE_OFF) {
395*4882a593Smuzhiyun /* mask TOGDONE interrupt */
396*4882a593Smuzhiyun ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
397*4882a593Smuzhiyun FUSB_REG_MASKA_TOGDONE);
398*4882a593Smuzhiyun if (ret)
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun chip->intr_togdone = false;
401*4882a593Smuzhiyun } else {
402*4882a593Smuzhiyun /* Datasheet says vconn MUST be off when toggling */
403*4882a593Smuzhiyun if (chip->vconn_on)
404*4882a593Smuzhiyun printf("%s: Vconn is on during toggle start\n", __func__);
405*4882a593Smuzhiyun /* unmask TOGDONE interrupt */
406*4882a593Smuzhiyun ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
407*4882a593Smuzhiyun FUSB_REG_MASKA_TOGDONE);
408*4882a593Smuzhiyun if (ret)
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun chip->intr_togdone = true;
411*4882a593Smuzhiyun /* start toggling */
412*4882a593Smuzhiyun ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
413*4882a593Smuzhiyun FUSB_REG_CONTROL2_TOGGLE);
414*4882a593Smuzhiyun if (ret)
415*4882a593Smuzhiyun return ret;
416*4882a593Smuzhiyun /* during toggling, consider cc as Open */
417*4882a593Smuzhiyun chip->cc1 = TYPEC_CC_OPEN;
418*4882a593Smuzhiyun chip->cc2 = TYPEC_CC_OPEN;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun chip->toggling_mode = mode;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return ret;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun static const char * const typec_cc_status_name[] = {
426*4882a593Smuzhiyun [TYPEC_CC_OPEN] = "Open",
427*4882a593Smuzhiyun [TYPEC_CC_RA] = "Ra",
428*4882a593Smuzhiyun [TYPEC_CC_RD] = "Rd",
429*4882a593Smuzhiyun [TYPEC_CC_RP_DEF] = "Rp-def",
430*4882a593Smuzhiyun [TYPEC_CC_RP_1_5] = "Rp-1.5",
431*4882a593Smuzhiyun [TYPEC_CC_RP_3_0] = "Rp-3.0",
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun static const enum src_current_status cc_src_current[] = {
435*4882a593Smuzhiyun [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
436*4882a593Smuzhiyun [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
437*4882a593Smuzhiyun [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
438*4882a593Smuzhiyun [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
439*4882a593Smuzhiyun [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
440*4882a593Smuzhiyun [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
441*4882a593Smuzhiyun };
442*4882a593Smuzhiyun
tcpm_set_cc(struct tcpc_dev * dev,enum typec_cc_status cc)443*4882a593Smuzhiyun static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
446*4882a593Smuzhiyun tcpc_dev);
447*4882a593Smuzhiyun u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
448*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PU_EN |
449*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC1_PD_EN |
450*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PD_EN;
451*4882a593Smuzhiyun u8 rd_mda, switches0_data = 0x00;
452*4882a593Smuzhiyun int ret = 0;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun switch (cc) {
455*4882a593Smuzhiyun case TYPEC_CC_OPEN:
456*4882a593Smuzhiyun break;
457*4882a593Smuzhiyun case TYPEC_CC_RD:
458*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
459*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PD_EN;
460*4882a593Smuzhiyun break;
461*4882a593Smuzhiyun case TYPEC_CC_RP_DEF:
462*4882a593Smuzhiyun case TYPEC_CC_RP_1_5:
463*4882a593Smuzhiyun case TYPEC_CC_RP_3_0:
464*4882a593Smuzhiyun switches0_data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
465*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC1_PU_EN :
466*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PU_EN;
467*4882a593Smuzhiyun break;
468*4882a593Smuzhiyun default:
469*4882a593Smuzhiyun printf("%s: unsupported cc value %s\n",
470*4882a593Smuzhiyun __func__, typec_cc_status_name[cc]);
471*4882a593Smuzhiyun ret = -EINVAL;
472*4882a593Smuzhiyun goto done;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
476*4882a593Smuzhiyun if (ret) {
477*4882a593Smuzhiyun printf("%s: cannot set toggling mode(%d)\n", __func__, ret);
478*4882a593Smuzhiyun goto done;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
482*4882a593Smuzhiyun switches0_mask, switches0_data);
483*4882a593Smuzhiyun if (ret) {
484*4882a593Smuzhiyun printf("%s: cannot set pull-up/-down(%d)\n", __func__, ret);
485*4882a593Smuzhiyun goto done;
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun /* reset the cc status */
488*4882a593Smuzhiyun chip->cc1 = TYPEC_CC_OPEN;
489*4882a593Smuzhiyun chip->cc2 = TYPEC_CC_OPEN;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* adjust current for SRC */
492*4882a593Smuzhiyun ret = fusb302_set_src_current(chip, cc_src_current[cc]);
493*4882a593Smuzhiyun if (ret) {
494*4882a593Smuzhiyun printf("%s: cannot set src current %s(%d)\n",
495*4882a593Smuzhiyun __func__, typec_cc_status_name[cc], ret);
496*4882a593Smuzhiyun goto done;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
500*4882a593Smuzhiyun switch (cc) {
501*4882a593Smuzhiyun case TYPEC_CC_RP_DEF:
502*4882a593Smuzhiyun case TYPEC_CC_RP_1_5:
503*4882a593Smuzhiyun case TYPEC_CC_RP_3_0:
504*4882a593Smuzhiyun rd_mda = rd_mda_value[cc_src_current[cc]];
505*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
506*4882a593Smuzhiyun if (ret) {
507*4882a593Smuzhiyun printf("%s: cannot set SRC measure value(%d)\n",
508*4882a593Smuzhiyun __func__, ret);
509*4882a593Smuzhiyun goto done;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
512*4882a593Smuzhiyun FUSB_REG_MASK_BC_LVL |
513*4882a593Smuzhiyun FUSB_REG_MASK_COMP_CHNG,
514*4882a593Smuzhiyun FUSB_REG_MASK_BC_LVL);
515*4882a593Smuzhiyun if (ret) {
516*4882a593Smuzhiyun printf("%s: cannot set SRC interrupt(%d)\n",
517*4882a593Smuzhiyun __func__, ret);
518*4882a593Smuzhiyun goto done;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun chip->intr_comp_chng = true;
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun case TYPEC_CC_RD:
523*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
524*4882a593Smuzhiyun FUSB_REG_MASK_BC_LVL |
525*4882a593Smuzhiyun FUSB_REG_MASK_COMP_CHNG,
526*4882a593Smuzhiyun FUSB_REG_MASK_COMP_CHNG);
527*4882a593Smuzhiyun if (ret) {
528*4882a593Smuzhiyun printf("%s: cannot set SRC interrupt(%d)\n",
529*4882a593Smuzhiyun __func__, ret);
530*4882a593Smuzhiyun goto done;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun chip->intr_bc_lvl = true;
533*4882a593Smuzhiyun break;
534*4882a593Smuzhiyun default:
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun done:
538*4882a593Smuzhiyun return ret;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
tcpm_get_cc(struct tcpc_dev * dev,enum typec_cc_status * cc1,enum typec_cc_status * cc2)541*4882a593Smuzhiyun static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
542*4882a593Smuzhiyun enum typec_cc_status *cc2)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
545*4882a593Smuzhiyun tcpc_dev);
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun *cc1 = chip->cc1;
548*4882a593Smuzhiyun *cc2 = chip->cc2;
549*4882a593Smuzhiyun debug("get cc1 = %s, cc2 = %s\n", typec_cc_status_name[*cc1],
550*4882a593Smuzhiyun typec_cc_status_name[*cc2]);
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun return 0;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
tcpm_set_polarity(struct tcpc_dev * dev,enum typec_cc_polarity polarity)555*4882a593Smuzhiyun static int tcpm_set_polarity(struct tcpc_dev *dev,
556*4882a593Smuzhiyun enum typec_cc_polarity polarity)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun return 0;
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
tcpm_set_vconn(struct tcpc_dev * dev,bool on)561*4882a593Smuzhiyun static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
564*4882a593Smuzhiyun tcpc_dev);
565*4882a593Smuzhiyun int ret = 0;
566*4882a593Smuzhiyun u8 switches0_data = 0x00;
567*4882a593Smuzhiyun u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
568*4882a593Smuzhiyun FUSB_REG_SWITCHES0_VCONN_CC2;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun if (chip->vconn_on == on) {
571*4882a593Smuzhiyun printf("vconn is already %s\n", on ? "On" : "Off");
572*4882a593Smuzhiyun goto done;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun if (on) {
575*4882a593Smuzhiyun switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
576*4882a593Smuzhiyun FUSB_REG_SWITCHES0_VCONN_CC2 :
577*4882a593Smuzhiyun FUSB_REG_SWITCHES0_VCONN_CC1;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
580*4882a593Smuzhiyun switches0_mask, switches0_data);
581*4882a593Smuzhiyun if (ret)
582*4882a593Smuzhiyun goto done;
583*4882a593Smuzhiyun debug("%s: vconn := %s\n", __func__, on ? "On" : "Off");
584*4882a593Smuzhiyun done:
585*4882a593Smuzhiyun return ret;
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
tcpm_set_vbus(struct tcpc_dev * dev,bool on,bool charge)588*4882a593Smuzhiyun static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun #if 0
591*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
592*4882a593Smuzhiyun tcpc_dev);
593*4882a593Smuzhiyun int ret = 0;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun mutex_lock(&chip->lock);
596*4882a593Smuzhiyun if (chip->vbus_on == on) {
597*4882a593Smuzhiyun printf("%s: vbus is already %s\n", __func__, on ? "On" : "Off");
598*4882a593Smuzhiyun } else {
599*4882a593Smuzhiyun if (on)
600*4882a593Smuzhiyun ret = regulator_enable(chip->vbus);
601*4882a593Smuzhiyun else
602*4882a593Smuzhiyun ret = regulator_disable(chip->vbus);
603*4882a593Smuzhiyun if (ret < 0) {
604*4882a593Smuzhiyun printf("%s: cannot %s vbus regulator(%d)\n",
605*4882a593Smuzhiyun __func__, on ? "enable" : "disable", ret);
606*4882a593Smuzhiyun goto done;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun chip->vbus_on = on;
609*4882a593Smuzhiyun debug("%s: vbus := %s\n", __func__, on ? "On" : "Off");
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun if (chip->charge_on == charge)
612*4882a593Smuzhiyun debug("%s: charge is already %s\n",
613*4882a593Smuzhiyun __func__, charge ? "On" : "Off");
614*4882a593Smuzhiyun else
615*4882a593Smuzhiyun chip->charge_on = charge;
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun done:
618*4882a593Smuzhiyun mutex_unlock(&chip->lock);
619*4882a593Smuzhiyun #endif
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun return 0;
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun
fusb302_pd_tx_flush(struct fusb302_chip * chip)624*4882a593Smuzhiyun static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
627*4882a593Smuzhiyun FUSB_REG_CONTROL0_TX_FLUSH);
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun
fusb302_pd_rx_flush(struct fusb302_chip * chip)630*4882a593Smuzhiyun static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
633*4882a593Smuzhiyun FUSB_REG_CONTROL1_RX_FLUSH);
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
fusb302_pd_set_auto_goodcrc(struct fusb302_chip * chip,bool on)636*4882a593Smuzhiyun static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun if (on)
639*4882a593Smuzhiyun return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
640*4882a593Smuzhiyun FUSB_REG_SWITCHES1_AUTO_GCRC);
641*4882a593Smuzhiyun return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
642*4882a593Smuzhiyun FUSB_REG_SWITCHES1_AUTO_GCRC);
643*4882a593Smuzhiyun }
644*4882a593Smuzhiyun
fusb302_pd_set_interrupts(struct fusb302_chip * chip,bool on)645*4882a593Smuzhiyun static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun int ret = 0;
648*4882a593Smuzhiyun u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
649*4882a593Smuzhiyun u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
650*4882a593Smuzhiyun FUSB_REG_MASKA_HARDSENT |
651*4882a593Smuzhiyun FUSB_REG_MASKA_TX_SUCCESS |
652*4882a593Smuzhiyun FUSB_REG_MASKA_HARDRESET;
653*4882a593Smuzhiyun u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun ret = on ?
656*4882a593Smuzhiyun fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
657*4882a593Smuzhiyun fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
658*4882a593Smuzhiyun if (ret)
659*4882a593Smuzhiyun return ret;
660*4882a593Smuzhiyun ret = on ?
661*4882a593Smuzhiyun fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
662*4882a593Smuzhiyun fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
663*4882a593Smuzhiyun if (ret)
664*4882a593Smuzhiyun return ret;
665*4882a593Smuzhiyun ret = on ?
666*4882a593Smuzhiyun fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
667*4882a593Smuzhiyun fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
668*4882a593Smuzhiyun return ret;
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
tcpm_set_pd_rx(struct tcpc_dev * dev,bool on)671*4882a593Smuzhiyun static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
674*4882a593Smuzhiyun tcpc_dev);
675*4882a593Smuzhiyun int ret = 0;
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun ret = fusb302_pd_rx_flush(chip);
678*4882a593Smuzhiyun if (ret) {
679*4882a593Smuzhiyun printf("%s: cannot flush pd rx buffer(%d)\n", __func__, ret);
680*4882a593Smuzhiyun goto done;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun ret = fusb302_pd_tx_flush(chip);
683*4882a593Smuzhiyun if (ret) {
684*4882a593Smuzhiyun printf("%s: cannot flush pd tx buffer(%d)\n", __func__, ret);
685*4882a593Smuzhiyun goto done;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun ret = fusb302_pd_set_auto_goodcrc(chip, on);
688*4882a593Smuzhiyun if (ret) {
689*4882a593Smuzhiyun printf("%s: cannot turn %s auto GCRC(%d)\n",
690*4882a593Smuzhiyun __func__, on ? "on" : "off", ret);
691*4882a593Smuzhiyun goto done;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun ret = fusb302_pd_set_interrupts(chip, on);
694*4882a593Smuzhiyun if (ret) {
695*4882a593Smuzhiyun printf("%s: cannot turn %s pd interrupts(%d)\n",
696*4882a593Smuzhiyun __func__, on ? "on" : "off", ret);
697*4882a593Smuzhiyun goto done;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun debug("%s: pd := %s\n", __func__, on ? "on" : "off");
700*4882a593Smuzhiyun done:
701*4882a593Smuzhiyun return ret;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun static const char * const typec_role_name[] = {
705*4882a593Smuzhiyun [TYPEC_SINK] = "Sink",
706*4882a593Smuzhiyun [TYPEC_SOURCE] = "Source",
707*4882a593Smuzhiyun };
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun static const char * const typec_data_role_name[] = {
710*4882a593Smuzhiyun [TYPEC_DEVICE] = "Device",
711*4882a593Smuzhiyun [TYPEC_HOST] = "Host",
712*4882a593Smuzhiyun };
713*4882a593Smuzhiyun
tcpm_set_roles(struct tcpc_dev * dev,bool attached,enum typec_role pwr,enum typec_data_role data)714*4882a593Smuzhiyun static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
715*4882a593Smuzhiyun enum typec_role pwr, enum typec_data_role data)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
718*4882a593Smuzhiyun tcpc_dev);
719*4882a593Smuzhiyun int ret = 0;
720*4882a593Smuzhiyun u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
721*4882a593Smuzhiyun FUSB_REG_SWITCHES1_DATAROLE;
722*4882a593Smuzhiyun u8 switches1_data = 0x00;
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun if (pwr == TYPEC_SOURCE)
725*4882a593Smuzhiyun switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
726*4882a593Smuzhiyun if (data == TYPEC_HOST)
727*4882a593Smuzhiyun switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
728*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
729*4882a593Smuzhiyun switches1_mask, switches1_data);
730*4882a593Smuzhiyun if (ret) {
731*4882a593Smuzhiyun printf("unable to set pd header %s, %s, ret= %d\n",
732*4882a593Smuzhiyun typec_role_name[pwr], typec_data_role_name[data], ret);
733*4882a593Smuzhiyun goto done;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun debug("%s: pd header : %s, %s\n", __func__, typec_role_name[pwr],
736*4882a593Smuzhiyun typec_data_role_name[data]);
737*4882a593Smuzhiyun done:
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun return ret;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
tcpm_start_toggling(struct tcpc_dev * dev,enum typec_port_type port_type,enum typec_cc_status cc)742*4882a593Smuzhiyun static int tcpm_start_toggling(struct tcpc_dev *dev,
743*4882a593Smuzhiyun enum typec_port_type port_type,
744*4882a593Smuzhiyun enum typec_cc_status cc)
745*4882a593Smuzhiyun {
746*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
747*4882a593Smuzhiyun tcpc_dev);
748*4882a593Smuzhiyun enum toggling_mode mode = TOGGLING_MODE_OFF;
749*4882a593Smuzhiyun int ret = 0;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun switch (port_type) {
752*4882a593Smuzhiyun case TYPEC_PORT_SRC:
753*4882a593Smuzhiyun mode = TOGGLING_MODE_SRC;
754*4882a593Smuzhiyun break;
755*4882a593Smuzhiyun case TYPEC_PORT_SNK:
756*4882a593Smuzhiyun mode = TOGGLING_MODE_SNK;
757*4882a593Smuzhiyun break;
758*4882a593Smuzhiyun case TYPEC_PORT_DRP:
759*4882a593Smuzhiyun mode = TOGGLING_MODE_DRP;
760*4882a593Smuzhiyun break;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun ret = fusb302_set_src_current(chip, cc_src_current[cc]);
764*4882a593Smuzhiyun if (ret) {
765*4882a593Smuzhiyun printf("%s: unable to set src current %s, ret=%d",
766*4882a593Smuzhiyun __func__, typec_cc_status_name[cc], ret);
767*4882a593Smuzhiyun goto done;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun ret = fusb302_set_toggling(chip, mode);
770*4882a593Smuzhiyun if (ret) {
771*4882a593Smuzhiyun printf("%s: unable to start drp toggling(%d)\n", __func__, ret);
772*4882a593Smuzhiyun goto done;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun printf("fusb302 start drp toggling\n");
775*4882a593Smuzhiyun done:
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun return ret;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun
fusb302_pd_send_message(struct fusb302_chip * chip,const struct pd_message * msg)780*4882a593Smuzhiyun static int fusb302_pd_send_message(struct fusb302_chip *chip,
781*4882a593Smuzhiyun const struct pd_message *msg)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun int ret = 0;
784*4882a593Smuzhiyun u8 buf[40];
785*4882a593Smuzhiyun u8 pos = 0;
786*4882a593Smuzhiyun int len;
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun /* SOP tokens */
789*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_SYNC1;
790*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_SYNC1;
791*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_SYNC1;
792*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_SYNC2;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun len = pd_header_cnt_le(msg->header) * 4;
795*4882a593Smuzhiyun /* plug 2 for header */
796*4882a593Smuzhiyun len += 2;
797*4882a593Smuzhiyun if (len > 0x1F) {
798*4882a593Smuzhiyun printf("PD message too long %d (incl. header)", len);
799*4882a593Smuzhiyun return -EINVAL;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun /* packsym tells the FUSB302 chip that the next X bytes are payload */
802*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
803*4882a593Smuzhiyun memcpy(&buf[pos], &msg->header, sizeof(msg->header));
804*4882a593Smuzhiyun pos += sizeof(msg->header);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun len -= 2;
807*4882a593Smuzhiyun memcpy(&buf[pos], msg->payload, len);
808*4882a593Smuzhiyun pos += len;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun /* CRC */
811*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_JAMCRC;
812*4882a593Smuzhiyun /* EOP */
813*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_EOP;
814*4882a593Smuzhiyun /* turn tx off after sending message */
815*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_TXOFF;
816*4882a593Smuzhiyun /* start transmission */
817*4882a593Smuzhiyun buf[pos++] = FUSB302_TKN_TXON;
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
820*4882a593Smuzhiyun if (ret)
821*4882a593Smuzhiyun return ret;
822*4882a593Smuzhiyun debug("sending PD message header: %x\n", msg->header);
823*4882a593Smuzhiyun debug("sending PD message len: %d\n", len);
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun return ret;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
fusb302_pd_send_hardreset(struct fusb302_chip * chip)828*4882a593Smuzhiyun static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
829*4882a593Smuzhiyun {
830*4882a593Smuzhiyun return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
831*4882a593Smuzhiyun FUSB_REG_CONTROL3_SEND_HARDRESET);
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun static const char * const transmit_type_name[] = {
835*4882a593Smuzhiyun [TCPC_TX_SOP] = "SOP",
836*4882a593Smuzhiyun [TCPC_TX_SOP_PRIME] = "SOP'",
837*4882a593Smuzhiyun [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
838*4882a593Smuzhiyun [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
839*4882a593Smuzhiyun [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
840*4882a593Smuzhiyun [TCPC_TX_HARD_RESET] = "HARD_RESET",
841*4882a593Smuzhiyun [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
842*4882a593Smuzhiyun [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
843*4882a593Smuzhiyun };
844*4882a593Smuzhiyun
tcpm_pd_transmit(struct tcpc_dev * dev,enum tcpm_transmit_type type,const struct pd_message * msg,unsigned int negotiated_rev)845*4882a593Smuzhiyun static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
846*4882a593Smuzhiyun const struct pd_message *msg, unsigned int negotiated_rev)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
849*4882a593Smuzhiyun tcpc_dev);
850*4882a593Smuzhiyun int ret = 0;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun switch (type) {
853*4882a593Smuzhiyun case TCPC_TX_SOP:
854*4882a593Smuzhiyun /* nRetryCount 3 in P2.0 spec, whereas 2 in PD3.0 spec */
855*4882a593Smuzhiyun ret = fusb302_enable_tx_auto_retries(chip, negotiated_rev > PD_REV20 ?
856*4882a593Smuzhiyun FUSB_REG_CONTROL3_N_RETRIES_2 :
857*4882a593Smuzhiyun FUSB_REG_CONTROL3_N_RETRIES_3);
858*4882a593Smuzhiyun if (ret)
859*4882a593Smuzhiyun printf("%s: Cannot update retry count(%d)\n",
860*4882a593Smuzhiyun __func__, ret);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun ret = fusb302_pd_send_message(chip, msg);
863*4882a593Smuzhiyun if (ret)
864*4882a593Smuzhiyun printf("%s: cannot send PD message(%d)\n",
865*4882a593Smuzhiyun __func__, ret);
866*4882a593Smuzhiyun break;
867*4882a593Smuzhiyun case TCPC_TX_HARD_RESET:
868*4882a593Smuzhiyun ret = fusb302_pd_send_hardreset(chip);
869*4882a593Smuzhiyun if (ret)
870*4882a593Smuzhiyun printf("%s: cannot send hardreset(%d)\n",
871*4882a593Smuzhiyun __func__, ret);
872*4882a593Smuzhiyun break;
873*4882a593Smuzhiyun default:
874*4882a593Smuzhiyun printf("%s: type %s not supported",
875*4882a593Smuzhiyun __func__, transmit_type_name[type]);
876*4882a593Smuzhiyun ret = -EINVAL;
877*4882a593Smuzhiyun }
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun return ret;
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun
fusb302_bc_lvl_to_cc(u8 bc_lvl)882*4882a593Smuzhiyun static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
885*4882a593Smuzhiyun return TYPEC_CC_RP_3_0;
886*4882a593Smuzhiyun if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
887*4882a593Smuzhiyun return TYPEC_CC_RP_1_5;
888*4882a593Smuzhiyun if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
889*4882a593Smuzhiyun return TYPEC_CC_RP_DEF;
890*4882a593Smuzhiyun return TYPEC_CC_OPEN;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
fusb302_bc_lvl_handler(struct fusb302_chip * chip)893*4882a593Smuzhiyun static void fusb302_bc_lvl_handler(struct fusb302_chip *chip)
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun int ret = 0;
896*4882a593Smuzhiyun u8 status0;
897*4882a593Smuzhiyun u8 bc_lvl;
898*4882a593Smuzhiyun enum typec_cc_status cc_status;
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun if (!chip->intr_bc_lvl) {
901*4882a593Smuzhiyun printf("BC_LVL interrupt is turned off, abort\n");
902*4882a593Smuzhiyun goto done;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
905*4882a593Smuzhiyun if (ret)
906*4882a593Smuzhiyun goto done;
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun debug("BC_LVL handler, status0 = 0x%02x\n", status0);
909*4882a593Smuzhiyun if (status0 & FUSB_REG_STATUS0_ACTIVITY)
910*4882a593Smuzhiyun printf("CC activities detected, delay handling\n");
911*4882a593Smuzhiyun bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
912*4882a593Smuzhiyun cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
913*4882a593Smuzhiyun if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
914*4882a593Smuzhiyun if (chip->cc1 != cc_status) {
915*4882a593Smuzhiyun debug("cc1: %s -> %s\n",
916*4882a593Smuzhiyun typec_cc_status_name[chip->cc1],
917*4882a593Smuzhiyun typec_cc_status_name[cc_status]);
918*4882a593Smuzhiyun chip->cc1 = cc_status;
919*4882a593Smuzhiyun tcpm_cc_change(chip->tcpm_port);
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun } else {
922*4882a593Smuzhiyun if (chip->cc2 != cc_status) {
923*4882a593Smuzhiyun debug("cc2: %s -> %s\n",
924*4882a593Smuzhiyun typec_cc_status_name[chip->cc2],
925*4882a593Smuzhiyun typec_cc_status_name[cc_status]);
926*4882a593Smuzhiyun chip->cc2 = cc_status;
927*4882a593Smuzhiyun tcpm_cc_change(chip->tcpm_port);
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun }
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun done:
932*4882a593Smuzhiyun return;
933*4882a593Smuzhiyun }
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun static void fusb302_interrupt_handle(struct fusb302_chip *chip);
fusb302_poll_event(struct tcpc_dev * dev)936*4882a593Smuzhiyun static void fusb302_poll_event(struct tcpc_dev *dev)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
939*4882a593Smuzhiyun tcpc_dev);
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun fusb302_interrupt_handle(chip);
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
fusb302_enter_low_power_mode(struct tcpc_dev * dev,bool attached,bool pd_capable)944*4882a593Smuzhiyun static int fusb302_enter_low_power_mode(struct tcpc_dev *dev,
945*4882a593Smuzhiyun bool attached, bool pd_capable)
946*4882a593Smuzhiyun {
947*4882a593Smuzhiyun struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
948*4882a593Smuzhiyun tcpc_dev);
949*4882a593Smuzhiyun int ret = 0;
950*4882a593Smuzhiyun unsigned int reg;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun ret = fusb302_mask_interrupt(chip);
953*4882a593Smuzhiyun if (ret)
954*4882a593Smuzhiyun return ret;
955*4882a593Smuzhiyun if (attached && pd_capable)
956*4882a593Smuzhiyun reg = FUSB_REG_POWER_PWR_MEDIUM;
957*4882a593Smuzhiyun else if (attached)
958*4882a593Smuzhiyun reg = FUSB_REG_POWER_PWR_LOW;
959*4882a593Smuzhiyun else
960*4882a593Smuzhiyun reg = 0;
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun return fusb302_set_power_mode(chip, reg);
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun
init_tcpc_dev(struct tcpc_dev * fusb302_tcpc_dev)965*4882a593Smuzhiyun static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
966*4882a593Smuzhiyun {
967*4882a593Smuzhiyun fusb302_tcpc_dev->init = tcpm_init;
968*4882a593Smuzhiyun fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
969*4882a593Smuzhiyun //fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
970*4882a593Smuzhiyun fusb302_tcpc_dev->set_cc = tcpm_set_cc;
971*4882a593Smuzhiyun fusb302_tcpc_dev->get_cc = tcpm_get_cc;
972*4882a593Smuzhiyun fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
973*4882a593Smuzhiyun fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
974*4882a593Smuzhiyun fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
975*4882a593Smuzhiyun fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
976*4882a593Smuzhiyun fusb302_tcpc_dev->set_roles = tcpm_set_roles;
977*4882a593Smuzhiyun fusb302_tcpc_dev->start_toggling = tcpm_start_toggling;
978*4882a593Smuzhiyun fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
979*4882a593Smuzhiyun fusb302_tcpc_dev->poll_event = fusb302_poll_event;
980*4882a593Smuzhiyun fusb302_tcpc_dev->enter_low_power_mode = fusb302_enter_low_power_mode;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun static const char * const cc_polarity_name[] = {
984*4882a593Smuzhiyun [TYPEC_POLARITY_CC1] = "Polarity_CC1",
985*4882a593Smuzhiyun [TYPEC_POLARITY_CC2] = "Polarity_CC2",
986*4882a593Smuzhiyun };
987*4882a593Smuzhiyun
fusb302_set_cc_polarity_and_pull(struct fusb302_chip * chip,enum typec_cc_polarity cc_polarity,bool pull_up,bool pull_down)988*4882a593Smuzhiyun static int fusb302_set_cc_polarity_and_pull(struct fusb302_chip *chip,
989*4882a593Smuzhiyun enum typec_cc_polarity cc_polarity,
990*4882a593Smuzhiyun bool pull_up, bool pull_down)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun int ret = 0;
993*4882a593Smuzhiyun u8 switches0_data = 0x00;
994*4882a593Smuzhiyun u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
995*4882a593Smuzhiyun FUSB_REG_SWITCHES1_TXCC2_EN;
996*4882a593Smuzhiyun u8 switches1_data = 0x00;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun if (pull_down)
999*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
1000*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PD_EN;
1001*4882a593Smuzhiyun
1002*4882a593Smuzhiyun if (cc_polarity == TYPEC_POLARITY_CC1) {
1003*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC1;
1004*4882a593Smuzhiyun if (chip->vconn_on)
1005*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
1006*4882a593Smuzhiyun if (pull_up)
1007*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
1008*4882a593Smuzhiyun switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
1009*4882a593Smuzhiyun } else {
1010*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_MEAS_CC2;
1011*4882a593Smuzhiyun if (chip->vconn_on)
1012*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
1013*4882a593Smuzhiyun if (pull_up)
1014*4882a593Smuzhiyun switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
1015*4882a593Smuzhiyun switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1018*4882a593Smuzhiyun if (ret)
1019*4882a593Smuzhiyun return ret;
1020*4882a593Smuzhiyun ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
1021*4882a593Smuzhiyun switches1_mask, switches1_data);
1022*4882a593Smuzhiyun if (ret)
1023*4882a593Smuzhiyun return ret;
1024*4882a593Smuzhiyun chip->cc_polarity = cc_polarity;
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun return ret;
1027*4882a593Smuzhiyun }
1028*4882a593Smuzhiyun
fusb302_handle_togdone_snk(struct fusb302_chip * chip,u8 togdone_result)1029*4882a593Smuzhiyun static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
1030*4882a593Smuzhiyun u8 togdone_result)
1031*4882a593Smuzhiyun {
1032*4882a593Smuzhiyun int ret = 0;
1033*4882a593Smuzhiyun u8 status0;
1034*4882a593Smuzhiyun u8 bc_lvl;
1035*4882a593Smuzhiyun enum typec_cc_polarity cc_polarity;
1036*4882a593Smuzhiyun enum typec_cc_status cc_status_active, cc1, cc2;
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun /* set polarity and pull_up, pull_down */
1039*4882a593Smuzhiyun cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
1040*4882a593Smuzhiyun TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1041*4882a593Smuzhiyun ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, false, true);
1042*4882a593Smuzhiyun if (ret) {
1043*4882a593Smuzhiyun printf("cannot set cc polarity %s, ret = %d\n",
1044*4882a593Smuzhiyun cc_polarity_name[cc_polarity], ret);
1045*4882a593Smuzhiyun return ret;
1046*4882a593Smuzhiyun }
1047*4882a593Smuzhiyun /* fusb302_set_cc_polarity() has set the correct measure block */
1048*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1049*4882a593Smuzhiyun if (ret < 0)
1050*4882a593Smuzhiyun return ret;
1051*4882a593Smuzhiyun bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1052*4882a593Smuzhiyun cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
1053*4882a593Smuzhiyun /* restart toggling if the cc status on the active line is OPEN */
1054*4882a593Smuzhiyun if (cc_status_active == TYPEC_CC_OPEN) {
1055*4882a593Smuzhiyun printf("restart toggling as CC_OPEN detected\n");
1056*4882a593Smuzhiyun ret = fusb302_set_toggling(chip, chip->toggling_mode);
1057*4882a593Smuzhiyun return ret;
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun /* update tcpm with the new cc value */
1060*4882a593Smuzhiyun cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1061*4882a593Smuzhiyun cc_status_active : TYPEC_CC_OPEN;
1062*4882a593Smuzhiyun cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1063*4882a593Smuzhiyun cc_status_active : TYPEC_CC_OPEN;
1064*4882a593Smuzhiyun if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1065*4882a593Smuzhiyun chip->cc1 = cc1;
1066*4882a593Smuzhiyun chip->cc2 = cc2;
1067*4882a593Smuzhiyun tcpm_cc_change(chip->tcpm_port);
1068*4882a593Smuzhiyun }
1069*4882a593Smuzhiyun /* turn off toggling */
1070*4882a593Smuzhiyun ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1071*4882a593Smuzhiyun if (ret) {
1072*4882a593Smuzhiyun printf("cannot set toggling mode off, ret=%d\n", ret);
1073*4882a593Smuzhiyun return ret;
1074*4882a593Smuzhiyun }
1075*4882a593Smuzhiyun /* unmask bc_lvl interrupt */
1076*4882a593Smuzhiyun ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
1077*4882a593Smuzhiyun if (ret) {
1078*4882a593Smuzhiyun printf("cannot unmask bc_lcl interrupt, ret=%d\n", ret);
1079*4882a593Smuzhiyun return ret;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun chip->intr_bc_lvl = true;
1082*4882a593Smuzhiyun debug("detected cc1=%s, cc2=%s\n",
1083*4882a593Smuzhiyun typec_cc_status_name[cc1],
1084*4882a593Smuzhiyun typec_cc_status_name[cc2]);
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun return ret;
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun /* On error returns < 0, otherwise a typec_cc_status value */
fusb302_get_src_cc_status(struct fusb302_chip * chip,enum typec_cc_polarity cc_polarity,enum typec_cc_status * cc)1090*4882a593Smuzhiyun static int fusb302_get_src_cc_status(struct fusb302_chip *chip,
1091*4882a593Smuzhiyun enum typec_cc_polarity cc_polarity,
1092*4882a593Smuzhiyun enum typec_cc_status *cc)
1093*4882a593Smuzhiyun {
1094*4882a593Smuzhiyun u8 ra_mda = ra_mda_value[chip->src_current_status];
1095*4882a593Smuzhiyun u8 rd_mda = rd_mda_value[chip->src_current_status];
1096*4882a593Smuzhiyun u8 switches0_data, status0;
1097*4882a593Smuzhiyun int ret;
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun /* Step 1: Set switches so that we measure the right CC pin */
1100*4882a593Smuzhiyun switches0_data = (cc_polarity == TYPEC_POLARITY_CC1) ?
1101*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC1_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC1 :
1102*4882a593Smuzhiyun FUSB_REG_SWITCHES0_CC2_PU_EN | FUSB_REG_SWITCHES0_MEAS_CC2;
1103*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_SWITCHES0, switches0_data);
1104*4882a593Smuzhiyun if (ret < 0)
1105*4882a593Smuzhiyun return ret;
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun fusb302_i2c_read(chip, FUSB_REG_SWITCHES0, &status0);
1108*4882a593Smuzhiyun debug("get_src_cc_status switches: 0x%0x", status0);
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /* Step 2: Set compararator volt to differentiate between Open and Rd */
1111*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1112*4882a593Smuzhiyun if (ret)
1113*4882a593Smuzhiyun return ret;
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun usleep_range(50, 100);
1116*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1117*4882a593Smuzhiyun if (ret)
1118*4882a593Smuzhiyun return ret;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun debug("get_src_cc_status rd_mda status0: 0x%0x", status0);
1121*4882a593Smuzhiyun if (status0 & FUSB_REG_STATUS0_COMP) {
1122*4882a593Smuzhiyun *cc = TYPEC_CC_OPEN;
1123*4882a593Smuzhiyun return 0;
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun /* Step 3: Set compararator input to differentiate between Rd and Ra. */
1127*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
1128*4882a593Smuzhiyun if (ret)
1129*4882a593Smuzhiyun return ret;
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun usleep_range(50, 100);
1132*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1133*4882a593Smuzhiyun if (ret)
1134*4882a593Smuzhiyun return ret;
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun debug("get_src_cc_status ra_mda status0: 0x%0x", status0);
1137*4882a593Smuzhiyun if (status0 & FUSB_REG_STATUS0_COMP)
1138*4882a593Smuzhiyun *cc = TYPEC_CC_RD;
1139*4882a593Smuzhiyun else
1140*4882a593Smuzhiyun *cc = TYPEC_CC_RA;
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun return 0;
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun
fusb302_handle_togdone_src(struct fusb302_chip * chip,u8 togdone_result)1145*4882a593Smuzhiyun static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
1146*4882a593Smuzhiyun u8 togdone_result)
1147*4882a593Smuzhiyun {
1148*4882a593Smuzhiyun /*
1149*4882a593Smuzhiyun * - set polarity (measure cc, vconn, tx)
1150*4882a593Smuzhiyun * - set pull_up, pull_down
1151*4882a593Smuzhiyun * - set cc1, cc2, and update to tcpm_port
1152*4882a593Smuzhiyun * - set I_COMP interrupt on
1153*4882a593Smuzhiyun */
1154*4882a593Smuzhiyun int ret = 0;
1155*4882a593Smuzhiyun u8 rd_mda = rd_mda_value[chip->src_current_status];
1156*4882a593Smuzhiyun enum toggling_mode toggling_mode = chip->toggling_mode;
1157*4882a593Smuzhiyun enum typec_cc_polarity cc_polarity;
1158*4882a593Smuzhiyun enum typec_cc_status cc1, cc2;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun /*
1161*4882a593Smuzhiyun * The toggle-engine will stop in a src state if it sees either Ra or
1162*4882a593Smuzhiyun * Rd. Determine the status for both CC pins, starting with the one
1163*4882a593Smuzhiyun * where toggling stopped, as that is where the switches point now.
1164*4882a593Smuzhiyun */
1165*4882a593Smuzhiyun if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1166*4882a593Smuzhiyun ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1167*4882a593Smuzhiyun else
1168*4882a593Smuzhiyun ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1169*4882a593Smuzhiyun if (ret)
1170*4882a593Smuzhiyun return ret;
1171*4882a593Smuzhiyun /* we must turn off toggling before we can measure the other pin */
1172*4882a593Smuzhiyun ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1173*4882a593Smuzhiyun if (ret) {
1174*4882a593Smuzhiyun printf("cannot set toggling mode off, ret=%d\n", ret);
1175*4882a593Smuzhiyun return ret;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun /* get the status of the other pin */
1178*4882a593Smuzhiyun if (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1)
1179*4882a593Smuzhiyun ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC2, &cc2);
1180*4882a593Smuzhiyun else
1181*4882a593Smuzhiyun ret = fusb302_get_src_cc_status(chip, TYPEC_POLARITY_CC1, &cc1);
1182*4882a593Smuzhiyun if (ret)
1183*4882a593Smuzhiyun return ret;
1184*4882a593Smuzhiyun
1185*4882a593Smuzhiyun /* determine polarity based on the status of both pins */
1186*4882a593Smuzhiyun if (cc1 == TYPEC_CC_RD &&
1187*4882a593Smuzhiyun (cc2 == TYPEC_CC_OPEN || cc2 == TYPEC_CC_RA)) {
1188*4882a593Smuzhiyun cc_polarity = TYPEC_POLARITY_CC1;
1189*4882a593Smuzhiyun } else if (cc2 == TYPEC_CC_RD &&
1190*4882a593Smuzhiyun (cc1 == TYPEC_CC_OPEN || cc1 == TYPEC_CC_RA)) {
1191*4882a593Smuzhiyun cc_polarity = TYPEC_POLARITY_CC2;
1192*4882a593Smuzhiyun } else {
1193*4882a593Smuzhiyun printf("unexpected CC status cc1=%s, cc2=%s, restarting toggling\n",
1194*4882a593Smuzhiyun typec_cc_status_name[cc1],
1195*4882a593Smuzhiyun typec_cc_status_name[cc2]);
1196*4882a593Smuzhiyun return fusb302_set_toggling(chip, toggling_mode);
1197*4882a593Smuzhiyun }
1198*4882a593Smuzhiyun /* set polarity and pull_up, pull_down */
1199*4882a593Smuzhiyun ret = fusb302_set_cc_polarity_and_pull(chip, cc_polarity, true, false);
1200*4882a593Smuzhiyun if (ret < 0) {
1201*4882a593Smuzhiyun printf("cannot set cc polarity %s, ret=%d\n",
1202*4882a593Smuzhiyun cc_polarity_name[cc_polarity], ret);
1203*4882a593Smuzhiyun return ret;
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun /* update tcpm with the new cc value */
1206*4882a593Smuzhiyun if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1207*4882a593Smuzhiyun chip->cc1 = cc1;
1208*4882a593Smuzhiyun chip->cc2 = cc2;
1209*4882a593Smuzhiyun tcpm_cc_change(chip->tcpm_port);
1210*4882a593Smuzhiyun }
1211*4882a593Smuzhiyun /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
1212*4882a593Smuzhiyun ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1213*4882a593Smuzhiyun if (ret)
1214*4882a593Smuzhiyun return ret;
1215*4882a593Smuzhiyun /* unmask comp_chng interrupt */
1216*4882a593Smuzhiyun ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
1217*4882a593Smuzhiyun FUSB_REG_MASK_COMP_CHNG);
1218*4882a593Smuzhiyun if (ret) {
1219*4882a593Smuzhiyun printf("cannot unmask comp_chng interrupt, ret=%d\n", ret);
1220*4882a593Smuzhiyun return ret;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun chip->intr_comp_chng = true;
1223*4882a593Smuzhiyun debug("detected cc1=%s, cc2=%s\n",
1224*4882a593Smuzhiyun typec_cc_status_name[cc1],
1225*4882a593Smuzhiyun typec_cc_status_name[cc2]);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun return ret;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
fusb302_handle_togdone(struct fusb302_chip * chip)1230*4882a593Smuzhiyun static int fusb302_handle_togdone(struct fusb302_chip *chip)
1231*4882a593Smuzhiyun {
1232*4882a593Smuzhiyun int ret = 0;
1233*4882a593Smuzhiyun u8 status1a;
1234*4882a593Smuzhiyun u8 togdone_result;
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
1237*4882a593Smuzhiyun if (ret < 0)
1238*4882a593Smuzhiyun return ret;
1239*4882a593Smuzhiyun togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1240*4882a593Smuzhiyun FUSB_REG_STATUS1A_TOGSS_MASK;
1241*4882a593Smuzhiyun switch (togdone_result) {
1242*4882a593Smuzhiyun case FUSB_REG_STATUS1A_TOGSS_SNK1:
1243*4882a593Smuzhiyun case FUSB_REG_STATUS1A_TOGSS_SNK2:
1244*4882a593Smuzhiyun return fusb302_handle_togdone_snk(chip, togdone_result);
1245*4882a593Smuzhiyun case FUSB_REG_STATUS1A_TOGSS_SRC1:
1246*4882a593Smuzhiyun case FUSB_REG_STATUS1A_TOGSS_SRC2:
1247*4882a593Smuzhiyun return fusb302_handle_togdone_src(chip, togdone_result);
1248*4882a593Smuzhiyun case FUSB_REG_STATUS1A_TOGSS_AA:
1249*4882a593Smuzhiyun /* doesn't support */
1250*4882a593Smuzhiyun printf("AudioAccessory not supported\n");
1251*4882a593Smuzhiyun fusb302_set_toggling(chip, chip->toggling_mode);
1252*4882a593Smuzhiyun break;
1253*4882a593Smuzhiyun default:
1254*4882a593Smuzhiyun printf("TOGDONE with an invalid state: %d\n", togdone_result);
1255*4882a593Smuzhiyun fusb302_set_toggling(chip, chip->toggling_mode);
1256*4882a593Smuzhiyun break;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun return ret;
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun
fusb302_pd_reset(struct fusb302_chip * chip)1261*4882a593Smuzhiyun static int fusb302_pd_reset(struct fusb302_chip *chip)
1262*4882a593Smuzhiyun {
1263*4882a593Smuzhiyun return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
1264*4882a593Smuzhiyun FUSB_REG_RESET_PD_RESET);
1265*4882a593Smuzhiyun }
1266*4882a593Smuzhiyun
fusb302_pd_read_message(struct fusb302_chip * chip,struct pd_message * msg)1267*4882a593Smuzhiyun static int fusb302_pd_read_message(struct fusb302_chip *chip,
1268*4882a593Smuzhiyun struct pd_message *msg)
1269*4882a593Smuzhiyun {
1270*4882a593Smuzhiyun int ret = 0;
1271*4882a593Smuzhiyun u8 token;
1272*4882a593Smuzhiyun u8 crc[4];
1273*4882a593Smuzhiyun int len;
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun /* first SOP token */
1276*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
1277*4882a593Smuzhiyun if (ret)
1278*4882a593Smuzhiyun return ret;
1279*4882a593Smuzhiyun ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
1280*4882a593Smuzhiyun (u8 *)&msg->header);
1281*4882a593Smuzhiyun if (ret)
1282*4882a593Smuzhiyun return ret;
1283*4882a593Smuzhiyun len = pd_header_cnt_le(msg->header) * 4;
1284*4882a593Smuzhiyun /* add 4 to length to include the CRC */
1285*4882a593Smuzhiyun if (len > PD_MAX_PAYLOAD * 4) {
1286*4882a593Smuzhiyun printf("%s: PD message too long %d\n", __func__, len);
1287*4882a593Smuzhiyun return -EINVAL;
1288*4882a593Smuzhiyun }
1289*4882a593Smuzhiyun if (len > 0) {
1290*4882a593Smuzhiyun ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
1291*4882a593Smuzhiyun (u8 *)msg->payload);
1292*4882a593Smuzhiyun if (ret)
1293*4882a593Smuzhiyun return ret;
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun /* another 4 bytes to read CRC out */
1296*4882a593Smuzhiyun ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
1297*4882a593Smuzhiyun if (ret)
1298*4882a593Smuzhiyun return ret;
1299*4882a593Smuzhiyun debug("%s: PD message header: %x\n", __func__, msg->header);
1300*4882a593Smuzhiyun debug("%s: PD message len: %d\n", __func__, len);
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun /*
1303*4882a593Smuzhiyun * Check if we've read off a GoodCRC message. If so then indicate to
1304*4882a593Smuzhiyun * TCPM that the previous transmission has completed. Otherwise we pass
1305*4882a593Smuzhiyun * the received message over to TCPM for processing.
1306*4882a593Smuzhiyun *
1307*4882a593Smuzhiyun * We make this check here instead of basing the reporting decision on
1308*4882a593Smuzhiyun * the IRQ event type, as it's possible for the chip to report the
1309*4882a593Smuzhiyun * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
1310*4882a593Smuzhiyun * to check the message type to ensure correct reporting to TCPM.
1311*4882a593Smuzhiyun */
1312*4882a593Smuzhiyun if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1313*4882a593Smuzhiyun tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1314*4882a593Smuzhiyun else
1315*4882a593Smuzhiyun tcpm_pd_receive(chip->tcpm_port, msg);
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun return ret;
1318*4882a593Smuzhiyun }
1319*4882a593Smuzhiyun
fusb302_interrupt_handle(struct fusb302_chip * chip)1320*4882a593Smuzhiyun static void fusb302_interrupt_handle(struct fusb302_chip *chip)
1321*4882a593Smuzhiyun {
1322*4882a593Smuzhiyun int ret = 0;
1323*4882a593Smuzhiyun u8 interrupt;
1324*4882a593Smuzhiyun u8 interrupta;
1325*4882a593Smuzhiyun u8 interruptb;
1326*4882a593Smuzhiyun u8 status0;
1327*4882a593Smuzhiyun bool vbus_present;
1328*4882a593Smuzhiyun bool comp_result;
1329*4882a593Smuzhiyun bool intr_togdone;
1330*4882a593Smuzhiyun bool intr_bc_lvl;
1331*4882a593Smuzhiyun bool intr_comp_chng;
1332*4882a593Smuzhiyun struct pd_message pd_msg;
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun /* grab a snapshot of intr flags */
1335*4882a593Smuzhiyun intr_togdone = chip->intr_togdone;
1336*4882a593Smuzhiyun intr_bc_lvl = chip->intr_bc_lvl;
1337*4882a593Smuzhiyun intr_comp_chng = chip->intr_comp_chng;
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun if (chip->gpio_cc_int_present)
1340*4882a593Smuzhiyun if (!dm_gpio_get_value(&chip->gpio_cc_int))
1341*4882a593Smuzhiyun return;
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
1344*4882a593Smuzhiyun if (ret)
1345*4882a593Smuzhiyun return;
1346*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
1347*4882a593Smuzhiyun if (ret)
1348*4882a593Smuzhiyun return;
1349*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
1350*4882a593Smuzhiyun if (ret)
1351*4882a593Smuzhiyun return;
1352*4882a593Smuzhiyun ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1353*4882a593Smuzhiyun if (ret)
1354*4882a593Smuzhiyun return;
1355*4882a593Smuzhiyun debug("IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x\n",
1356*4882a593Smuzhiyun interrupt, interrupta, interruptb, status0);
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1359*4882a593Smuzhiyun vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1360*4882a593Smuzhiyun debug("IRQ: VBUS_OK, vbus=%s\n", vbus_present ? "On" : "Off");
1361*4882a593Smuzhiyun if (vbus_present != chip->vbus_present) {
1362*4882a593Smuzhiyun chip->vbus_present = vbus_present;
1363*4882a593Smuzhiyun tcpm_vbus_change(chip->tcpm_port);
1364*4882a593Smuzhiyun }
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1368*4882a593Smuzhiyun debug("IRQ: TOGDONE\n");
1369*4882a593Smuzhiyun ret = fusb302_handle_togdone(chip);
1370*4882a593Smuzhiyun if (ret) {
1371*4882a593Smuzhiyun printf("%s: handle togdone error(%d)\n", __func__, ret);
1372*4882a593Smuzhiyun return;
1373*4882a593Smuzhiyun }
1374*4882a593Smuzhiyun }
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1377*4882a593Smuzhiyun debug("IRQ: BC_LVL, handler pending\n");
1378*4882a593Smuzhiyun /*
1379*4882a593Smuzhiyun * as BC_LVL interrupt can be affected by PD activity,
1380*4882a593Smuzhiyun * apply delay to for the handler to wait for the PD
1381*4882a593Smuzhiyun * signaling to finish.
1382*4882a593Smuzhiyun */
1383*4882a593Smuzhiyun //msleep(T_BC_LVL_DEBOUNCE_DELAY_MS);
1384*4882a593Smuzhiyun fusb302_bc_lvl_handler(chip);
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1388*4882a593Smuzhiyun comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1389*4882a593Smuzhiyun debug("IRQ: COMP_CHNG, comp=%s\n", comp_result ? "true" : "false");
1390*4882a593Smuzhiyun if (comp_result) {
1391*4882a593Smuzhiyun /* cc level > Rd_threshold, detach */
1392*4882a593Smuzhiyun chip->cc1 = TYPEC_CC_OPEN;
1393*4882a593Smuzhiyun chip->cc2 = TYPEC_CC_OPEN;
1394*4882a593Smuzhiyun tcpm_cc_change(chip->tcpm_port);
1395*4882a593Smuzhiyun }
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1399*4882a593Smuzhiyun debug("IRQ: PD collision\n");
1400*4882a593Smuzhiyun tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun
1403*4882a593Smuzhiyun if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1404*4882a593Smuzhiyun debug("IRQ: PD retry failed\n");
1405*4882a593Smuzhiyun tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1409*4882a593Smuzhiyun debug("IRQ: PD hardreset sent\n");
1410*4882a593Smuzhiyun ret = fusb302_pd_reset(chip);
1411*4882a593Smuzhiyun if (ret) {
1412*4882a593Smuzhiyun printf("cannot PD reset, ret=%d\n", ret);
1413*4882a593Smuzhiyun return;
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1416*4882a593Smuzhiyun }
1417*4882a593Smuzhiyun
1418*4882a593Smuzhiyun if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1419*4882a593Smuzhiyun debug("IRQ: PD tx success\n");
1420*4882a593Smuzhiyun ret = fusb302_pd_read_message(chip, &pd_msg);
1421*4882a593Smuzhiyun if (ret) {
1422*4882a593Smuzhiyun printf("cannot read in PD message, ret=%d\n", ret);
1423*4882a593Smuzhiyun return;
1424*4882a593Smuzhiyun }
1425*4882a593Smuzhiyun }
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1428*4882a593Smuzhiyun debug("IRQ: PD received hardreset\n");
1429*4882a593Smuzhiyun ret = fusb302_pd_reset(chip);
1430*4882a593Smuzhiyun if (ret) {
1431*4882a593Smuzhiyun printf("cannot PD reset, ret=%d\n", ret);
1432*4882a593Smuzhiyun return;
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun tcpm_pd_hard_reset(chip->tcpm_port);
1435*4882a593Smuzhiyun }
1436*4882a593Smuzhiyun
1437*4882a593Smuzhiyun if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1438*4882a593Smuzhiyun debug("IRQ: PD sent good CRC\n");
1439*4882a593Smuzhiyun ret = fusb302_pd_read_message(chip, &pd_msg);
1440*4882a593Smuzhiyun if (ret) {
1441*4882a593Smuzhiyun printf("cannot read in PD message, ret=%d\n", ret);
1442*4882a593Smuzhiyun return;
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun }
1445*4882a593Smuzhiyun }
1446*4882a593Smuzhiyun
fusb302_probe(struct udevice * dev)1447*4882a593Smuzhiyun static int fusb302_probe(struct udevice *dev)
1448*4882a593Smuzhiyun {
1449*4882a593Smuzhiyun struct fusb302_chip *chip = dev_get_priv(dev);
1450*4882a593Smuzhiyun int ret = 0;
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun chip->udev = dev;
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun #if 0
1455*4882a593Smuzhiyun /* get vbus regulator */
1456*4882a593Smuzhiyun ret = regulator_get_by_platname("vbus5v0_typec", chip->vbus_regulator);
1457*4882a593Smuzhiyun if (ret) {
1458*4882a593Smuzhiyun printf("Can get the regulator: vbus5v0_typec (err=%d)\n", ret);
1459*4882a593Smuzhiyun chip->vbus_regulator = NULL;
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun #endif
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun chip->tcpc_dev.connector_node = dev_read_subnode(dev, "connector");
1464*4882a593Smuzhiyun if (!ofnode_valid(chip->tcpc_dev.connector_node)) {
1465*4882a593Smuzhiyun printf("%s: 'connector' node is not found\n", __func__);
1466*4882a593Smuzhiyun return -ENODEV;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun init_tcpc_dev(&chip->tcpc_dev);
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "int-n-gpios", 0,
1472*4882a593Smuzhiyun &chip->gpio_cc_int, GPIOD_IS_IN);
1473*4882a593Smuzhiyun if (ret) {
1474*4882a593Smuzhiyun printf("%s: fail to get int GPIO: ret=%d\n", __func__, ret);
1475*4882a593Smuzhiyun chip->gpio_cc_int_present = false;
1476*4882a593Smuzhiyun } else {
1477*4882a593Smuzhiyun chip->gpio_cc_int_present = true;
1478*4882a593Smuzhiyun }
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun chip->tcpm_port = tcpm_port_init(dev, &chip->tcpc_dev);
1481*4882a593Smuzhiyun if (IS_ERR(chip->tcpm_port)) {
1482*4882a593Smuzhiyun printf("%s: failed to tcpm port init\n", __func__);
1483*4882a593Smuzhiyun return PTR_ERR(chip->tcpm_port);
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun tcpm_poll_event(chip->tcpm_port);
1487*4882a593Smuzhiyun
1488*4882a593Smuzhiyun return 0;
1489*4882a593Smuzhiyun }
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun
fusb302_get_voltage(struct udevice * dev)1492*4882a593Smuzhiyun static int fusb302_get_voltage(struct udevice *dev)
1493*4882a593Smuzhiyun {
1494*4882a593Smuzhiyun struct fusb302_chip *chip = dev_get_priv(dev);
1495*4882a593Smuzhiyun
1496*4882a593Smuzhiyun return tcpm_get_voltage(chip->tcpm_port);
1497*4882a593Smuzhiyun }
1498*4882a593Smuzhiyun
fusb302_get_current(struct udevice * dev)1499*4882a593Smuzhiyun static int fusb302_get_current(struct udevice *dev)
1500*4882a593Smuzhiyun {
1501*4882a593Smuzhiyun struct fusb302_chip *chip = dev_get_priv(dev);
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun return tcpm_get_current(chip->tcpm_port);
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun
fusb302_get_online(struct udevice * dev)1506*4882a593Smuzhiyun static int fusb302_get_online(struct udevice *dev)
1507*4882a593Smuzhiyun {
1508*4882a593Smuzhiyun struct fusb302_chip *chip = dev_get_priv(dev);
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun return tcpm_get_online(chip->tcpm_port);
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun static struct dm_power_delivery_ops fusb302_ops = {
1514*4882a593Smuzhiyun .get_voltage = fusb302_get_voltage,
1515*4882a593Smuzhiyun .get_current = fusb302_get_current,
1516*4882a593Smuzhiyun .get_online = fusb302_get_online,
1517*4882a593Smuzhiyun };
1518*4882a593Smuzhiyun
1519*4882a593Smuzhiyun static const struct udevice_id fusb302_ids[] = {
1520*4882a593Smuzhiyun { .compatible = "fcs,fusb302" },
1521*4882a593Smuzhiyun { }
1522*4882a593Smuzhiyun };
1523*4882a593Smuzhiyun
1524*4882a593Smuzhiyun U_BOOT_DRIVER(fusb302) = {
1525*4882a593Smuzhiyun .name = "fusb302",
1526*4882a593Smuzhiyun .id = UCLASS_PD,
1527*4882a593Smuzhiyun .of_match = fusb302_ids,
1528*4882a593Smuzhiyun .ops = &fusb302_ops,
1529*4882a593Smuzhiyun .probe = fusb302_probe,
1530*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct fusb302_chip),
1531*4882a593Smuzhiyun };
1532