1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Google, Inc
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <fdtdec.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <i2c.h>
12*4882a593Smuzhiyun #include <power/pmic.h>
13*4882a593Smuzhiyun #include <power/regulator.h>
14*4882a593Smuzhiyun #include <power/s5m8767.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static const struct pmic_child_info pmic_children_info[] = {
19*4882a593Smuzhiyun { .prefix = "LDO", .driver = S5M8767_LDO_DRIVER },
20*4882a593Smuzhiyun { .prefix = "BUCK", .driver = S5M8767_BUCK_DRIVER },
21*4882a593Smuzhiyun { },
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
s5m8767_reg_count(struct udevice * dev)24*4882a593Smuzhiyun static int s5m8767_reg_count(struct udevice *dev)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun return S5M8767_NUM_OF_REGS;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
s5m8767_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)29*4882a593Smuzhiyun static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
30*4882a593Smuzhiyun int len)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun if (dm_i2c_write(dev, reg, buff, len)) {
33*4882a593Smuzhiyun pr_err("write error to device: %p register: %#x!", dev, reg);
34*4882a593Smuzhiyun return -EIO;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
s5m8767_read(struct udevice * dev,uint reg,uint8_t * buff,int len)40*4882a593Smuzhiyun static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun if (dm_i2c_read(dev, reg, buff, len)) {
43*4882a593Smuzhiyun pr_err("read error from device: %p register: %#x!", dev, reg);
44*4882a593Smuzhiyun return -EIO;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
s5m8767_enable_32khz_cp(struct udevice * dev)50*4882a593Smuzhiyun int s5m8767_enable_32khz_cp(struct udevice *dev)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return pmic_clrsetbits(dev, S5M8767_EN32KHZ_CP, 0, 1 << 1);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
s5m8767_bind(struct udevice * dev)55*4882a593Smuzhiyun static int s5m8767_bind(struct udevice *dev)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun int children;
58*4882a593Smuzhiyun ofnode node;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun node = dev_read_subnode(dev, "regulators");
61*4882a593Smuzhiyun if (!ofnode_valid(node)) {
62*4882a593Smuzhiyun debug("%s: %s regulators subnode not found!", __func__,
63*4882a593Smuzhiyun dev->name);
64*4882a593Smuzhiyun return -ENXIO;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun children = pmic_bind_children(dev, node, pmic_children_info);
70*4882a593Smuzhiyun if (!children)
71*4882a593Smuzhiyun debug("%s: %s - no child found\n", __func__, dev->name);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Always return success for this device */
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static struct dm_pmic_ops s5m8767_ops = {
78*4882a593Smuzhiyun .reg_count = s5m8767_reg_count,
79*4882a593Smuzhiyun .read = s5m8767_read,
80*4882a593Smuzhiyun .write = s5m8767_write,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static const struct udevice_id s5m8767_ids[] = {
84*4882a593Smuzhiyun { .compatible = "samsung,s5m8767-pmic" },
85*4882a593Smuzhiyun { }
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun U_BOOT_DRIVER(pmic_s5m8767) = {
89*4882a593Smuzhiyun .name = "s5m8767_pmic",
90*4882a593Smuzhiyun .id = UCLASS_PMIC,
91*4882a593Smuzhiyun .of_match = s5m8767_ids,
92*4882a593Smuzhiyun .bind = s5m8767_bind,
93*4882a593Smuzhiyun .ops = &s5m8767_ops,
94*4882a593Smuzhiyun };
95