1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011-2013
3*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <i2c.h>
10*4882a593Smuzhiyun #include <power/tps65910.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /*
13*4882a593Smuzhiyun * tps65910_set_i2c_control() - Set the TPS65910 to be controlled via the I2C
14*4882a593Smuzhiyun * interface.
15*4882a593Smuzhiyun * @return: 0 on success, not 0 on failure
16*4882a593Smuzhiyun */
tps65910_set_i2c_control(void)17*4882a593Smuzhiyun int tps65910_set_i2c_control(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun int ret;
20*4882a593Smuzhiyun uchar buf;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* VDD1/2 voltage selection register access by control i/f */
23*4882a593Smuzhiyun ret = i2c_read(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
24*4882a593Smuzhiyun &buf, 1);
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun if (ret)
27*4882a593Smuzhiyun return ret;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun buf |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
32*4882a593Smuzhiyun &buf, 1);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /*
36*4882a593Smuzhiyun * tps65910_voltage_update() - Voltage switching for MPU frequency switching.
37*4882a593Smuzhiyun * @module: mpu - 0, core - 1
38*4882a593Smuzhiyun * @vddx_op_vol_sel: vdd voltage to set
39*4882a593Smuzhiyun * @return: 0 on success, not 0 on failure
40*4882a593Smuzhiyun */
tps65910_voltage_update(unsigned int module,unsigned char vddx_op_vol_sel)41*4882a593Smuzhiyun int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun uchar buf;
44*4882a593Smuzhiyun unsigned int reg_offset;
45*4882a593Smuzhiyun int ret;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (module == MPU)
48*4882a593Smuzhiyun reg_offset = TPS65910_VDD1_OP_REG;
49*4882a593Smuzhiyun else
50*4882a593Smuzhiyun reg_offset = TPS65910_VDD2_OP_REG;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* Select VDDx OP */
53*4882a593Smuzhiyun ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
54*4882a593Smuzhiyun if (ret)
55*4882a593Smuzhiyun return ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun buf &= ~TPS65910_OP_REG_CMD_MASK;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
60*4882a593Smuzhiyun if (ret)
61*4882a593Smuzhiyun return ret;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Configure VDDx OP Voltage */
64*4882a593Smuzhiyun ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
65*4882a593Smuzhiyun if (ret)
66*4882a593Smuzhiyun return ret;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun buf &= ~TPS65910_OP_REG_SEL_MASK;
69*4882a593Smuzhiyun buf |= vddx_op_vol_sel;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
72*4882a593Smuzhiyun if (ret)
73*4882a593Smuzhiyun return ret;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
76*4882a593Smuzhiyun if (ret)
77*4882a593Smuzhiyun return ret;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if ((buf & TPS65910_OP_REG_SEL_MASK) != vddx_op_vol_sel)
80*4882a593Smuzhiyun return 1;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84