1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011-2013
3*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <i2c.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <power/pmic.h>
12*4882a593Smuzhiyun #include <power/tps65218.h>
13*4882a593Smuzhiyun
tps65218_reg_read(uchar dest_reg,uchar * dest_val)14*4882a593Smuzhiyun int tps65218_reg_read(uchar dest_reg, uchar *dest_val)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun uchar read_val;
17*4882a593Smuzhiyun int ret;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun ret = i2c_read(TPS65218_CHIP_PM, dest_reg, 1, &read_val, 1);
20*4882a593Smuzhiyun if (ret)
21*4882a593Smuzhiyun return ret;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun *dest_val = read_val;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun return 0;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /**
29*4882a593Smuzhiyun * tps65218_reg_write() - Generic function that can write a TPS65218 PMIC
30*4882a593Smuzhiyun * register or bit field regardless of protection
31*4882a593Smuzhiyun * level.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * @prot_level: Register password protection. Use
34*4882a593Smuzhiyun * TPS65218_PROT_LEVEL_NONE,
35*4882a593Smuzhiyun * TPS65218_PROT_LEVEL_1 or TPS65218_PROT_LEVEL_2
36*4882a593Smuzhiyun * @dest_reg: Register address to write.
37*4882a593Smuzhiyun * @dest_val: Value to write.
38*4882a593Smuzhiyun * @mask: Bit mask (8 bits) to be applied. Function will only
39*4882a593Smuzhiyun * change bits that are set in the bit mask.
40*4882a593Smuzhiyun *
41*4882a593Smuzhiyun * @return: 0 for success, not 0 on failure, as per the i2c API
42*4882a593Smuzhiyun */
tps65218_reg_write(uchar prot_level,uchar dest_reg,uchar dest_val,uchar mask)43*4882a593Smuzhiyun int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
44*4882a593Smuzhiyun uchar mask)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun uchar read_val;
47*4882a593Smuzhiyun uchar xor_reg;
48*4882a593Smuzhiyun int ret;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * If we are affecting only a bit field, read dest_reg and apply the
52*4882a593Smuzhiyun * mask
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun if (mask != TPS65218_MASK_ALL_BITS) {
55*4882a593Smuzhiyun ret = i2c_read(TPS65218_CHIP_PM, dest_reg, 1, &read_val, 1);
56*4882a593Smuzhiyun if (ret)
57*4882a593Smuzhiyun return ret;
58*4882a593Smuzhiyun read_val &= (~mask);
59*4882a593Smuzhiyun read_val |= (dest_val & mask);
60*4882a593Smuzhiyun dest_val = read_val;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if (prot_level > 0) {
64*4882a593Smuzhiyun xor_reg = dest_reg ^ TPS65218_PASSWORD_UNLOCK;
65*4882a593Smuzhiyun ret = i2c_write(TPS65218_CHIP_PM, TPS65218_PASSWORD, 1,
66*4882a593Smuzhiyun &xor_reg, 1);
67*4882a593Smuzhiyun if (ret)
68*4882a593Smuzhiyun return ret;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun ret = i2c_write(TPS65218_CHIP_PM, dest_reg, 1, &dest_val, 1);
72*4882a593Smuzhiyun if (ret)
73*4882a593Smuzhiyun return ret;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (prot_level == TPS65218_PROT_LEVEL_2) {
76*4882a593Smuzhiyun ret = i2c_write(TPS65218_CHIP_PM, TPS65218_PASSWORD, 1,
77*4882a593Smuzhiyun &xor_reg, 1);
78*4882a593Smuzhiyun if (ret)
79*4882a593Smuzhiyun return ret;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ret = i2c_write(TPS65218_CHIP_PM, dest_reg, 1, &dest_val, 1);
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /**
90*4882a593Smuzhiyun * tps65218_voltage_update() - Function to change a voltage level, as this
91*4882a593Smuzhiyun * is a multi-step process.
92*4882a593Smuzhiyun * @dc_cntrl_reg: DC voltage control register to change.
93*4882a593Smuzhiyun * @volt_sel: New value for the voltage register
94*4882a593Smuzhiyun * @return: 0 for success, not 0 on failure.
95*4882a593Smuzhiyun */
tps65218_voltage_update(uchar dc_cntrl_reg,uchar volt_sel)96*4882a593Smuzhiyun int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun if ((dc_cntrl_reg != TPS65218_DCDC1) &&
99*4882a593Smuzhiyun (dc_cntrl_reg != TPS65218_DCDC2) &&
100*4882a593Smuzhiyun (dc_cntrl_reg != TPS65218_DCDC3))
101*4882a593Smuzhiyun return 1;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* set voltage level */
104*4882a593Smuzhiyun if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
105*4882a593Smuzhiyun TPS65218_DCDC_VSEL_MASK))
106*4882a593Smuzhiyun return 1;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* set GO bit to initiate voltage transition */
109*4882a593Smuzhiyun if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_SLEW,
110*4882a593Smuzhiyun TPS65218_DCDC_GO, TPS65218_DCDC_GO))
111*4882a593Smuzhiyun return 1;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /**
117*4882a593Smuzhiyun * tps65218_toggle_fseal() - Perform the sequence that toggles the FSEAL bit.
118*4882a593Smuzhiyun *
119*4882a593Smuzhiyun * @return: 0 on success, -EBADE if the sequence was broken
120*4882a593Smuzhiyun */
tps65218_toggle_fseal(void)121*4882a593Smuzhiyun int tps65218_toggle_fseal(void)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun if (tps65218_reg_write(TPS65218_PROT_LEVEL_NONE, TPS65218_PASSWORD,
124*4882a593Smuzhiyun 0xb1, TPS65218_MASK_ALL_BITS))
125*4882a593Smuzhiyun return -EBADE;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun if (tps65218_reg_write(TPS65218_PROT_LEVEL_NONE, TPS65218_PASSWORD,
128*4882a593Smuzhiyun 0xfe, TPS65218_MASK_ALL_BITS))
129*4882a593Smuzhiyun return -EBADE;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (tps65218_reg_write(TPS65218_PROT_LEVEL_NONE, TPS65218_PASSWORD,
132*4882a593Smuzhiyun 0xa3, TPS65218_MASK_ALL_BITS))
133*4882a593Smuzhiyun return -EBADE;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /**
139*4882a593Smuzhiyun * tps65218_lock_fseal() - Perform the sequence that locks the FSEAL bit to 1.
140*4882a593Smuzhiyun *
141*4882a593Smuzhiyun * The FSEAL bit prevents the PMIC from turning off DCDC5 and DCDC6. It can be
142*4882a593Smuzhiyun * toggled at most 3 times: 0->1, 1->0, and finally 0->1. After the third switch
143*4882a593Smuzhiyun * its value is locked and can only be reset by powering off the PMIC entirely.
144*4882a593Smuzhiyun *
145*4882a593Smuzhiyun * @return: 0 on success, -EBADE if the sequence was broken
146*4882a593Smuzhiyun */
tps65218_lock_fseal(void)147*4882a593Smuzhiyun int tps65218_lock_fseal(void)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun int i;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun for (i = 0; i < 3; i++)
152*4882a593Smuzhiyun if (tps65218_toggle_fseal())
153*4882a593Smuzhiyun return -EBADE;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
power_tps65218_init(unsigned char bus)158*4882a593Smuzhiyun int power_tps65218_init(unsigned char bus)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun static const char name[] = "TPS65218_PMIC";
161*4882a593Smuzhiyun struct pmic *p = pmic_alloc();
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (!p) {
164*4882a593Smuzhiyun printf("%s: POWER allocation error!\n", __func__);
165*4882a593Smuzhiyun return -ENOMEM;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun p->name = name;
169*4882a593Smuzhiyun p->interface = PMIC_I2C;
170*4882a593Smuzhiyun p->number_of_regs = TPS65218_PMIC_NUM_OF_REGS;
171*4882a593Smuzhiyun p->hw.i2c.addr = TPS65218_CHIP_PM;
172*4882a593Smuzhiyun p->hw.i2c.tx_num = 1;
173*4882a593Smuzhiyun p->bus = bus;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177