1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011-2013
3*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <i2c.h>
10*4882a593Smuzhiyun #include <power/tps65217.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /**
13*4882a593Smuzhiyun * tps65217_reg_read() - Generic function that can read a TPS65217 register
14*4882a593Smuzhiyun * @src_reg: Source register address
15*4882a593Smuzhiyun * @src_val: Address of destination variable
16*4882a593Smuzhiyun * @return: 0 for success, not 0 on failure.
17*4882a593Smuzhiyun */
tps65217_reg_read(uchar src_reg,uchar * src_val)18*4882a593Smuzhiyun int tps65217_reg_read(uchar src_reg, uchar *src_val)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun return i2c_read(TPS65217_CHIP_PM, src_reg, 1, src_val, 1);
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun * tps65217_reg_write() - Generic function that can write a TPS65217 PMIC
25*4882a593Smuzhiyun * register or bit field regardless of protection
26*4882a593Smuzhiyun * level.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * @prot_level: Register password protection. Use
29*4882a593Smuzhiyun * TPS65217_PROT_LEVEL_NONE,
30*4882a593Smuzhiyun * TPS65217_PROT_LEVEL_1 or TPS65217_PROT_LEVEL_2
31*4882a593Smuzhiyun * @dest_reg: Register address to write.
32*4882a593Smuzhiyun * @dest_val: Value to write.
33*4882a593Smuzhiyun * @mask: Bit mask (8 bits) to be applied. Function will only
34*4882a593Smuzhiyun * change bits that are set in the bit mask.
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * @return: 0 for success, not 0 on failure, as per the i2c API
37*4882a593Smuzhiyun */
tps65217_reg_write(uchar prot_level,uchar dest_reg,uchar dest_val,uchar mask)38*4882a593Smuzhiyun int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
39*4882a593Smuzhiyun uchar mask)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun uchar read_val;
42*4882a593Smuzhiyun uchar xor_reg;
43*4882a593Smuzhiyun int ret;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun * If we are affecting only a bit field, read dest_reg and apply the
47*4882a593Smuzhiyun * mask
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun if (mask != TPS65217_MASK_ALL_BITS) {
50*4882a593Smuzhiyun ret = i2c_read(TPS65217_CHIP_PM, dest_reg, 1, &read_val, 1);
51*4882a593Smuzhiyun if (ret)
52*4882a593Smuzhiyun return ret;
53*4882a593Smuzhiyun read_val &= (~mask);
54*4882a593Smuzhiyun read_val |= (dest_val & mask);
55*4882a593Smuzhiyun dest_val = read_val;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (prot_level > 0) {
59*4882a593Smuzhiyun xor_reg = dest_reg ^ TPS65217_PASSWORD_UNLOCK;
60*4882a593Smuzhiyun ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
61*4882a593Smuzhiyun &xor_reg, 1);
62*4882a593Smuzhiyun if (ret)
63*4882a593Smuzhiyun return ret;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
67*4882a593Smuzhiyun if (ret)
68*4882a593Smuzhiyun return ret;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun if (prot_level == TPS65217_PROT_LEVEL_2) {
71*4882a593Smuzhiyun ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
72*4882a593Smuzhiyun &xor_reg, 1);
73*4882a593Smuzhiyun if (ret)
74*4882a593Smuzhiyun return ret;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
77*4882a593Smuzhiyun if (ret)
78*4882a593Smuzhiyun return ret;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /**
85*4882a593Smuzhiyun * tps65217_voltage_update() - Function to change a voltage level, as this
86*4882a593Smuzhiyun * is a multi-step process.
87*4882a593Smuzhiyun * @dc_cntrl_reg: DC voltage control register to change.
88*4882a593Smuzhiyun * @volt_sel: New value for the voltage register
89*4882a593Smuzhiyun * @return: 0 for success, not 0 on failure.
90*4882a593Smuzhiyun */
tps65217_voltage_update(uchar dc_cntrl_reg,uchar volt_sel)91*4882a593Smuzhiyun int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun if ((dc_cntrl_reg != TPS65217_DEFDCDC1) &&
94*4882a593Smuzhiyun (dc_cntrl_reg != TPS65217_DEFDCDC2) &&
95*4882a593Smuzhiyun (dc_cntrl_reg != TPS65217_DEFDCDC3))
96*4882a593Smuzhiyun return 1;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* set voltage level */
99*4882a593Smuzhiyun if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
100*4882a593Smuzhiyun TPS65217_MASK_ALL_BITS))
101*4882a593Smuzhiyun return 1;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* set GO bit to initiate voltage transition */
104*4882a593Smuzhiyun if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFSLEW,
105*4882a593Smuzhiyun TPS65217_DCDC_GO, TPS65217_DCDC_GO))
106*4882a593Smuzhiyun return 1;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110