1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Qualcomm pm8916 pmic driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <power/pmic.h>
11*4882a593Smuzhiyun #include <spmi/spmi.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define PID_SHIFT 8
16*4882a593Smuzhiyun #define PID_MASK (0xFF << PID_SHIFT)
17*4882a593Smuzhiyun #define REG_MASK 0xFF
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct pm8916_priv {
20*4882a593Smuzhiyun uint32_t usid; /* Slave ID on SPMI bus */
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
pm8916_reg_count(struct udevice * dev)23*4882a593Smuzhiyun static int pm8916_reg_count(struct udevice *dev)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun return 0xFFFF;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
pm8916_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)28*4882a593Smuzhiyun static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
29*4882a593Smuzhiyun int len)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct pm8916_priv *priv = dev_get_priv(dev);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun if (len != 1)
34*4882a593Smuzhiyun return -EINVAL;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return spmi_reg_write(dev->parent, priv->usid,
37*4882a593Smuzhiyun (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK,
38*4882a593Smuzhiyun *buff);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
pm8916_read(struct udevice * dev,uint reg,uint8_t * buff,int len)41*4882a593Smuzhiyun static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun struct pm8916_priv *priv = dev_get_priv(dev);
44*4882a593Smuzhiyun int val;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun if (len != 1)
47*4882a593Smuzhiyun return -EINVAL;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun val = spmi_reg_read(dev->parent, priv->usid,
50*4882a593Smuzhiyun (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun if (val < 0)
53*4882a593Smuzhiyun return val;
54*4882a593Smuzhiyun *buff = val;
55*4882a593Smuzhiyun return 0;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static struct dm_pmic_ops pm8916_ops = {
59*4882a593Smuzhiyun .reg_count = pm8916_reg_count,
60*4882a593Smuzhiyun .read = pm8916_read,
61*4882a593Smuzhiyun .write = pm8916_write,
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static const struct udevice_id pm8916_ids[] = {
65*4882a593Smuzhiyun { .compatible = "qcom,spmi-pmic" },
66*4882a593Smuzhiyun { }
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
pm8916_probe(struct udevice * dev)69*4882a593Smuzhiyun static int pm8916_probe(struct udevice *dev)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct pm8916_priv *priv = dev_get_priv(dev);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun priv->usid = dev_read_addr(dev);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (priv->usid == FDT_ADDR_T_NONE)
76*4882a593Smuzhiyun return -EINVAL;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun U_BOOT_DRIVER(pmic_pm8916) = {
82*4882a593Smuzhiyun .name = "pmic_pm8916",
83*4882a593Smuzhiyun .id = UCLASS_PMIC,
84*4882a593Smuzhiyun .of_match = pm8916_ids,
85*4882a593Smuzhiyun .bind = dm_scan_fdt_dev,
86*4882a593Smuzhiyun .probe = pm8916_probe,
87*4882a593Smuzhiyun .ops = &pm8916_ops,
88*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct pm8916_priv),
89*4882a593Smuzhiyun };
90