1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor, Inc
3*4882a593Smuzhiyun * Peng Fan <Peng.Fan@freescale.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <fdtdec.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <dm.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun #include <power/pmic.h>
14*4882a593Smuzhiyun #include <power/regulator.h>
15*4882a593Smuzhiyun #include <power/pfuze100_pmic.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static const struct pmic_child_info pmic_children_info[] = {
20*4882a593Smuzhiyun /* sw[x], swbst */
21*4882a593Smuzhiyun { .prefix = "s", .driver = PFUZE100_REGULATOR_DRIVER },
22*4882a593Smuzhiyun /* vgen[x], vsnvs, vcc, v33, vcc_sd */
23*4882a593Smuzhiyun { .prefix = "v", .driver = PFUZE100_REGULATOR_DRIVER },
24*4882a593Smuzhiyun { },
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
pfuze100_reg_count(struct udevice * dev)27*4882a593Smuzhiyun static int pfuze100_reg_count(struct udevice *dev)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return PFUZE100_NUM_OF_REGS;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
pfuze100_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)32*4882a593Smuzhiyun static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
33*4882a593Smuzhiyun int len)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun if (dm_i2c_write(dev, reg, buff, len)) {
36*4882a593Smuzhiyun pr_err("write error to device: %p register: %#x!", dev, reg);
37*4882a593Smuzhiyun return -EIO;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return 0;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
pfuze100_read(struct udevice * dev,uint reg,uint8_t * buff,int len)43*4882a593Smuzhiyun static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun if (dm_i2c_read(dev, reg, buff, len)) {
46*4882a593Smuzhiyun pr_err("read error from device: %p register: %#x!", dev, reg);
47*4882a593Smuzhiyun return -EIO;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
pfuze100_bind(struct udevice * dev)53*4882a593Smuzhiyun static int pfuze100_bind(struct udevice *dev)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun ofnode regulators_node;
56*4882a593Smuzhiyun int children;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun regulators_node = dev_read_subnode(dev, "regulators");
59*4882a593Smuzhiyun if (!ofnode_valid(regulators_node)) {
60*4882a593Smuzhiyun debug("%s: %s regulators subnode not found!", __func__,
61*4882a593Smuzhiyun dev->name);
62*4882a593Smuzhiyun return -ENXIO;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun children = pmic_bind_children(dev, regulators_node, pmic_children_info);
68*4882a593Smuzhiyun if (!children)
69*4882a593Smuzhiyun debug("%s: %s - no child found\n", __func__, dev->name);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Always return success for this device */
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static struct dm_pmic_ops pfuze100_ops = {
76*4882a593Smuzhiyun .reg_count = pfuze100_reg_count,
77*4882a593Smuzhiyun .read = pfuze100_read,
78*4882a593Smuzhiyun .write = pfuze100_write,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct udevice_id pfuze100_ids[] = {
82*4882a593Smuzhiyun { .compatible = "fsl,pfuze100", .data = PFUZE100, },
83*4882a593Smuzhiyun { .compatible = "fsl,pfuze200", .data = PFUZE200, },
84*4882a593Smuzhiyun { .compatible = "fsl,pfuze3000", .data = PFUZE3000, },
85*4882a593Smuzhiyun { }
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun U_BOOT_DRIVER(pmic_pfuze100) = {
89*4882a593Smuzhiyun .name = "pfuze100 pmic",
90*4882a593Smuzhiyun .id = UCLASS_PMIC,
91*4882a593Smuzhiyun .of_match = pfuze100_ids,
92*4882a593Smuzhiyun .bind = pfuze100_bind,
93*4882a593Smuzhiyun .ops = &pfuze100_ops,
94*4882a593Smuzhiyun };
95