1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2014 NVIDIA Corporation
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <asm/gpio.h>
10*4882a593Smuzhiyun #include <power/as3722.h>
11*4882a593Smuzhiyun #include <power/pmic.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define NUM_GPIOS 8
14*4882a593Smuzhiyun
as3722_gpio_configure(struct udevice * pmic,unsigned int gpio,unsigned long flags)15*4882a593Smuzhiyun int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
16*4882a593Smuzhiyun unsigned long flags)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun u8 value = 0;
19*4882a593Smuzhiyun int err;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun if (flags & AS3722_GPIO_OUTPUT_VDDH)
22*4882a593Smuzhiyun value |= AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun if (flags & AS3722_GPIO_INVERT)
25*4882a593Smuzhiyun value |= AS3722_GPIO_CONTROL_INVERT;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
28*4882a593Smuzhiyun if (err) {
29*4882a593Smuzhiyun pr_err("failed to configure GPIO#%u: %d", gpio, err);
30*4882a593Smuzhiyun return err;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return 0;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
as3722_gpio_set_value(struct udevice * dev,unsigned int gpio,int level)36*4882a593Smuzhiyun static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
37*4882a593Smuzhiyun int level)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct udevice *pmic = dev_get_parent(dev);
40*4882a593Smuzhiyun const char *l;
41*4882a593Smuzhiyun u8 value;
42*4882a593Smuzhiyun int err;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (gpio >= NUM_GPIOS)
45*4882a593Smuzhiyun return -EINVAL;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT);
48*4882a593Smuzhiyun if (err < 0) {
49*4882a593Smuzhiyun pr_err("failed to read GPIO signal out register: %d", err);
50*4882a593Smuzhiyun return err;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun value = err;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (level == 0) {
55*4882a593Smuzhiyun value &= ~(1 << gpio);
56*4882a593Smuzhiyun l = "low";
57*4882a593Smuzhiyun } else {
58*4882a593Smuzhiyun value |= 1 << gpio;
59*4882a593Smuzhiyun l = "high";
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
63*4882a593Smuzhiyun if (err) {
64*4882a593Smuzhiyun pr_err("failed to set GPIO#%u %s: %d", gpio, l, err);
65*4882a593Smuzhiyun return err;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
as3722_gpio_direction_output(struct udevice * dev,unsigned int gpio,int value)71*4882a593Smuzhiyun int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio,
72*4882a593Smuzhiyun int value)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct udevice *pmic = dev_get_parent(dev);
75*4882a593Smuzhiyun int err;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (gpio > 7)
78*4882a593Smuzhiyun return -EINVAL;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (value == 0)
81*4882a593Smuzhiyun value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL;
82*4882a593Smuzhiyun else
83*4882a593Smuzhiyun value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
86*4882a593Smuzhiyun if (err) {
87*4882a593Smuzhiyun pr_err("failed to configure GPIO#%u as output: %d", gpio, err);
88*4882a593Smuzhiyun return err;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun err = as3722_gpio_set_value(pmic, gpio, value);
92*4882a593Smuzhiyun if (err < 0) {
93*4882a593Smuzhiyun pr_err("failed to set GPIO#%u high: %d", gpio, err);
94*4882a593Smuzhiyun return err;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
as3722_gpio_probe(struct udevice * dev)100*4882a593Smuzhiyun static int as3722_gpio_probe(struct udevice *dev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun uc_priv->gpio_count = NUM_GPIOS;
105*4882a593Smuzhiyun uc_priv->bank_name = "as3722_";
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static const struct dm_gpio_ops gpio_as3722_ops = {
111*4882a593Smuzhiyun .direction_output = as3722_gpio_direction_output,
112*4882a593Smuzhiyun .set_value = as3722_gpio_set_value,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun U_BOOT_DRIVER(gpio_as3722) = {
116*4882a593Smuzhiyun .name = "gpio_as3722",
117*4882a593Smuzhiyun .id = UCLASS_GPIO,
118*4882a593Smuzhiyun .ops = &gpio_as3722_ops,
119*4882a593Smuzhiyun .probe = as3722_gpio_probe,
120*4882a593Smuzhiyun };
121