xref: /OK3568_Linux_fs/u-boot/drivers/power/pmic/as3722.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2014 NVIDIA Corporation
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #define pr_fmt(fmt) "as3722: " fmt
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <errno.h>
12*4882a593Smuzhiyun #include <fdtdec.h>
13*4882a593Smuzhiyun #include <i2c.h>
14*4882a593Smuzhiyun #include <dm/lists.h>
15*4882a593Smuzhiyun #include <power/as3722.h>
16*4882a593Smuzhiyun #include <power/pmic.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define AS3722_NUM_OF_REGS	0x92
19*4882a593Smuzhiyun 
as3722_read(struct udevice * dev,uint reg,uint8_t * buff,int len)20*4882a593Smuzhiyun static int as3722_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun 	int ret;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	ret = dm_i2c_read(dev, reg, buff, len);
25*4882a593Smuzhiyun 	if (ret < 0)
26*4882a593Smuzhiyun 		return ret;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	return 0;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun 
as3722_write(struct udevice * dev,uint reg,const uint8_t * buff,int len)31*4882a593Smuzhiyun static int as3722_write(struct udevice *dev, uint reg, const uint8_t *buff,
32*4882a593Smuzhiyun 			int len)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	int ret;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	ret = dm_i2c_write(dev, reg, buff, len);
37*4882a593Smuzhiyun 	if (ret < 0)
38*4882a593Smuzhiyun 		return ret;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	return 0;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
as3722_read_id(struct udevice * dev,uint * idp,uint * revisionp)43*4882a593Smuzhiyun static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	int ret;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	ret = pmic_reg_read(dev, AS3722_ASIC_ID1);
48*4882a593Smuzhiyun 	if (ret < 0) {
49*4882a593Smuzhiyun 		pr_err("failed to read ID1 register: %d", ret);
50*4882a593Smuzhiyun 		return ret;
51*4882a593Smuzhiyun 	}
52*4882a593Smuzhiyun 	*idp = ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	ret = pmic_reg_read(dev, AS3722_ASIC_ID2);
55*4882a593Smuzhiyun 	if (ret < 0) {
56*4882a593Smuzhiyun 		pr_err("failed to read ID2 register: %d", ret);
57*4882a593Smuzhiyun 		return ret;
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 	*revisionp = ret;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* TODO(treding@nvidia.com): Add proper regulator support to avoid this */
as3722_sd_set_voltage(struct udevice * dev,unsigned int sd,u8 value)65*4882a593Smuzhiyun int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	int ret;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	if (sd > 6)
70*4882a593Smuzhiyun 		return -EINVAL;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value);
73*4882a593Smuzhiyun 	if (ret < 0) {
74*4882a593Smuzhiyun 		pr_err("failed to write SD%u voltage register: %d", sd, ret);
75*4882a593Smuzhiyun 		return ret;
76*4882a593Smuzhiyun 	}
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
as3722_ldo_set_voltage(struct udevice * dev,unsigned int ldo,u8 value)81*4882a593Smuzhiyun int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	int ret;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	if (ldo > 11)
86*4882a593Smuzhiyun 		return -EINVAL;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value);
89*4882a593Smuzhiyun 	if (ret < 0) {
90*4882a593Smuzhiyun 		pr_err("failed to write LDO%u voltage register: %d", ldo,
91*4882a593Smuzhiyun 		      ret);
92*4882a593Smuzhiyun 		return ret;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
as3722_probe(struct udevice * dev)98*4882a593Smuzhiyun static int as3722_probe(struct udevice *dev)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	uint id, revision;
101*4882a593Smuzhiyun 	int ret;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	ret = as3722_read_id(dev, &id, &revision);
104*4882a593Smuzhiyun 	if (ret < 0) {
105*4882a593Smuzhiyun 		pr_err("failed to read ID: %d", ret);
106*4882a593Smuzhiyun 		return ret;
107*4882a593Smuzhiyun 	}
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	if (id != AS3722_DEVICE_ID) {
110*4882a593Smuzhiyun 		pr_err("unknown device");
111*4882a593Smuzhiyun 		return -ENOENT;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
120*4882a593Smuzhiyun static const struct pmic_child_info pmic_children_info[] = {
121*4882a593Smuzhiyun 	{ .prefix = "sd", .driver = "as3722_stepdown"},
122*4882a593Smuzhiyun 	{ .prefix = "ldo", .driver = "as3722_ldo"},
123*4882a593Smuzhiyun 	{ },
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
as3722_bind(struct udevice * dev)126*4882a593Smuzhiyun static int as3722_bind(struct udevice *dev)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	struct udevice *gpio_dev;
129*4882a593Smuzhiyun 	ofnode regulators_node;
130*4882a593Smuzhiyun 	int children;
131*4882a593Smuzhiyun 	int ret;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	regulators_node = dev_read_subnode(dev, "regulators");
134*4882a593Smuzhiyun 	if (!ofnode_valid(regulators_node)) {
135*4882a593Smuzhiyun 		debug("%s: %s regulators subnode not found\n", __func__,
136*4882a593Smuzhiyun 		      dev->name);
137*4882a593Smuzhiyun 		return -ENXIO;
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	children = pmic_bind_children(dev, regulators_node, pmic_children_info);
141*4882a593Smuzhiyun 	if (!children)
142*4882a593Smuzhiyun 		debug("%s: %s - no child found\n", __func__, dev->name);
143*4882a593Smuzhiyun 	ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev);
144*4882a593Smuzhiyun 	if (ret) {
145*4882a593Smuzhiyun 		debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret);
146*4882a593Smuzhiyun 		return ret;
147*4882a593Smuzhiyun 	}
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return 0;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun #endif
152*4882a593Smuzhiyun 
as3722_reg_count(struct udevice * dev)153*4882a593Smuzhiyun static int as3722_reg_count(struct udevice *dev)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	return AS3722_NUM_OF_REGS;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun static struct dm_pmic_ops as3722_ops = {
159*4882a593Smuzhiyun 	.reg_count = as3722_reg_count,
160*4882a593Smuzhiyun 	.read = as3722_read,
161*4882a593Smuzhiyun 	.write = as3722_write,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun static const struct udevice_id as3722_ids[] = {
165*4882a593Smuzhiyun 	{ .compatible = "ams,as3722" },
166*4882a593Smuzhiyun 	{ }
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun U_BOOT_DRIVER(pmic_as3722) = {
170*4882a593Smuzhiyun 	.name = "as3722_pmic",
171*4882a593Smuzhiyun 	.id = UCLASS_PMIC,
172*4882a593Smuzhiyun 	.of_match = as3722_ids,
173*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
174*4882a593Smuzhiyun 	.bind = as3722_bind,
175*4882a593Smuzhiyun #endif
176*4882a593Smuzhiyun 	.probe = as3722_probe,
177*4882a593Smuzhiyun 	.ops = &as3722_ops,
178*4882a593Smuzhiyun };
179