1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2022 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <i2c.h>
11*4882a593Smuzhiyun #include <power/fuel_gauge.h>
12*4882a593Smuzhiyun #include <power/pmic.h>
13*4882a593Smuzhiyun #include <linux/usb/phy-rockchip-usb2.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static int dbg_enable;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define CW_DBG(args...) \
20*4882a593Smuzhiyun do { \
21*4882a593Smuzhiyun if (dbg_enable) { \
22*4882a593Smuzhiyun printf(args); \
23*4882a593Smuzhiyun } \
24*4882a593Smuzhiyun } while (0)
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define REG_CHIP_ID 0x00
27*4882a593Smuzhiyun #define REG_VCELL_H 0x02
28*4882a593Smuzhiyun #define REG_VCELL_L 0x03
29*4882a593Smuzhiyun #define REG_SOC_INT 0x04
30*4882a593Smuzhiyun #define REG_SOC_DECIMAL 0x05
31*4882a593Smuzhiyun #define REG_TEMP 0x06
32*4882a593Smuzhiyun #define REG_MODE_CONFIG 0x08
33*4882a593Smuzhiyun #define REG_GPIO_CONFIG 0x0A
34*4882a593Smuzhiyun #define REG_SOC_ALERT 0x0B
35*4882a593Smuzhiyun #define REG_TEMP_MAX 0x0C
36*4882a593Smuzhiyun #define REG_TEMP_MIN 0x0D
37*4882a593Smuzhiyun #define REG_CURRENT_H 0x0E
38*4882a593Smuzhiyun #define REG_CURRENT_L 0x0F
39*4882a593Smuzhiyun #define REG_T_HOST_H 0xA0
40*4882a593Smuzhiyun #define REG_T_HOST_L 0xA1
41*4882a593Smuzhiyun #define REG_USER_CONF 0xA2
42*4882a593Smuzhiyun #define REG_CYCLE_H 0xA4
43*4882a593Smuzhiyun #define REG_CYCLE_L 0xA5
44*4882a593Smuzhiyun #define REG_SOH 0xA6
45*4882a593Smuzhiyun #define REG_IC_STATE 0xA7
46*4882a593Smuzhiyun #define REG_FW_VERSION 0xAB
47*4882a593Smuzhiyun #define REG_BAT_PROFILE 0x10
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define CONFIG_MODE_RESTART 0x30
50*4882a593Smuzhiyun #define CONFIG_MODE_ACTIVE 0x00
51*4882a593Smuzhiyun #define CONFIG_MODE_SLEEP 0xF0
52*4882a593Smuzhiyun #define CONFIG_UPDATE_FLG 0x80
53*4882a593Smuzhiyun #define IC_VCHIP_ID 0xA0
54*4882a593Smuzhiyun #define IC_READY_MARK 0x0C
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define GPIO_ENABLE_MIN_TEMP 0
57*4882a593Smuzhiyun #define GPIO_ENABLE_MAX_TEMP 0
58*4882a593Smuzhiyun #define GPIO_ENABLE_SOC_CHANGE 0
59*4882a593Smuzhiyun #define GPIO_SOC_IRQ_VALUE 0x0 /* 0x7F */
60*4882a593Smuzhiyun #define DEFINED_MAX_TEMP 45
61*4882a593Smuzhiyun #define DEFINED_MIN_TEMP 0
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define CWFG_NAME "cw221X"
64*4882a593Smuzhiyun #define SIZE_OF_PROFILE 80
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* mhom rsense * 1000 for convenience calculation */
67*4882a593Smuzhiyun #define USER_RSENSE 1500
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define queue_delayed_work_time 5000
70*4882a593Smuzhiyun #define queue_start_work_time 50
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define CW_SLEEP_20MS 20
73*4882a593Smuzhiyun #define CW_SLEEP_10MS 10
74*4882a593Smuzhiyun #define CW_UI_FULL 100
75*4882a593Smuzhiyun #define COMPLEMENT_CODE_U16 0x8000
76*4882a593Smuzhiyun #define CW_SLEEP_100MS 100
77*4882a593Smuzhiyun #define CW_SLEEP_200MS 200
78*4882a593Smuzhiyun #define CW_SLEEP_COUNTS 50
79*4882a593Smuzhiyun #define CW_TRUE 1
80*4882a593Smuzhiyun #define CW_RETRY_COUNT 3
81*4882a593Smuzhiyun #define CW_VOL_UNIT 1000
82*4882a593Smuzhiyun #define CW_LOW_VOLTAGE_REF 2500
83*4882a593Smuzhiyun #define CW_LOW_VOLTAGE 3000
84*4882a593Smuzhiyun #define CW_LOW_VOLTAGE_STEP 10
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #define CW221X_NOT_ACTIVE 1
87*4882a593Smuzhiyun #define CW221X_PROFILE_NOT_READY 2
88*4882a593Smuzhiyun #define CW221X_PROFILE_NEED_UPDATE 3
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static u8 config_profile_info[SIZE_OF_PROFILE] = {
91*4882a593Smuzhiyun 0x5A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xB2,
92*4882a593Smuzhiyun 0xC2, 0xCA, 0xC2, 0xBD, 0x9C, 0x5C, 0x38, 0xFF, 0xFF, 0xC4,
93*4882a593Smuzhiyun 0x86, 0x74, 0x60, 0x55, 0x4F, 0x4D, 0x4B, 0x80, 0xC0, 0xDB,
94*4882a593Smuzhiyun 0xCD, 0xD0, 0xCE, 0xD2, 0xD3, 0xD2, 0xD0, 0xCE, 0xC3, 0xD5,
95*4882a593Smuzhiyun 0xB9, 0xC9, 0xC5, 0xA3, 0x92, 0x8A, 0x80, 0x72, 0x63, 0x62,
96*4882a593Smuzhiyun 0x74, 0x90, 0xA6, 0x7E, 0x5F, 0x48, 0x80, 0x00, 0xAB, 0x10,
97*4882a593Smuzhiyun 0x00, 0xA1, 0xFB, 0x00, 0x00, 0x00, 0x64, 0x1E, 0xB1, 0x04,
98*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D,
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun enum charger_type {
102*4882a593Smuzhiyun CHARGER_TYPE_NO = 0,
103*4882a593Smuzhiyun CHARGER_TYPE_USB,
104*4882a593Smuzhiyun CHARGER_TYPE_AC,
105*4882a593Smuzhiyun CHARGER_TYPE_DC,
106*4882a593Smuzhiyun CHARGER_TYPE_UNDEF,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct cw221x_info {
110*4882a593Smuzhiyun struct udevice *dev;
111*4882a593Smuzhiyun int capacity;
112*4882a593Smuzhiyun u8 *bat_profile;
113*4882a593Smuzhiyun int chip_id;
114*4882a593Smuzhiyun int voltage;
115*4882a593Smuzhiyun int ic_soc_h;
116*4882a593Smuzhiyun int ic_soc_l;
117*4882a593Smuzhiyun int ui_soc;
118*4882a593Smuzhiyun int temp;
119*4882a593Smuzhiyun long cw_current;
120*4882a593Smuzhiyun int cycle;
121*4882a593Smuzhiyun int soh;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
cw221x_read(struct cw221x_info * cw221x,u8 reg,u8 * buffer)124*4882a593Smuzhiyun static u8 cw221x_read(struct cw221x_info *cw221x, u8 reg, u8 *buffer)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun u8 val;
127*4882a593Smuzhiyun int ret;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun ret = dm_i2c_read(cw221x->dev, reg, &val, 1);
130*4882a593Smuzhiyun if (ret) {
131*4882a593Smuzhiyun printf("cw221x: read reg 0x%02x failed, ret=%d\n", reg, ret);
132*4882a593Smuzhiyun return ret;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun *buffer = val;
136*4882a593Smuzhiyun return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
cw221x_write(struct cw221x_info * cw221x,u8 reg,u8 val)139*4882a593Smuzhiyun static int cw221x_write(struct cw221x_info *cw221x, u8 reg, u8 val)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int ret;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun ret = dm_i2c_write(cw221x->dev, reg, &val, 1);
144*4882a593Smuzhiyun if (ret)
145*4882a593Smuzhiyun printf("cw221x: write reg 0x%02x failed, ret=%d\n", reg, ret);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return ret;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
cw221x_read_half_word(struct cw221x_info * cw221x,int reg,u16 * buffer)150*4882a593Smuzhiyun static int cw221x_read_half_word(struct cw221x_info *cw221x,
151*4882a593Smuzhiyun int reg,
152*4882a593Smuzhiyun u16 *buffer)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun u8 vall, valh;
155*4882a593Smuzhiyun int ret;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun ret = cw221x_read(cw221x, reg, &valh);
158*4882a593Smuzhiyun if (ret)
159*4882a593Smuzhiyun return ret;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun ret = cw221x_read(cw221x, reg + 1, &vall);
162*4882a593Smuzhiyun if (ret)
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun *buffer = ((u16)valh << 8) | vall;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun return 0;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
cw221x_ofdata_to_platdata(struct udevice * dev)170*4882a593Smuzhiyun static int cw221x_ofdata_to_platdata(struct udevice *dev)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
173*4882a593Smuzhiyun int i, len, size;
174*4882a593Smuzhiyun const u8 *info;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun if (!dev_read_prop(dev, "cellwise,battery-profile", &len) ||
177*4882a593Smuzhiyun (len != SIZE_OF_PROFILE)) {
178*4882a593Smuzhiyun cw221x->bat_profile = config_profile_info;
179*4882a593Smuzhiyun return 0;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun CW_DBG("cw221x: use dts profile\n");
183*4882a593Smuzhiyun size = sizeof(*cw221x->bat_profile) * len;
184*4882a593Smuzhiyun cw221x->bat_profile = calloc(size, 1);
185*4882a593Smuzhiyun if (!cw221x->bat_profile) {
186*4882a593Smuzhiyun CW_DBG("cw221x: calloc bat_profile fail\n");
187*4882a593Smuzhiyun return -EINVAL;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
191*4882a593Smuzhiyun if (!info) {
192*4882a593Smuzhiyun CW_DBG("cw221x: fdtdec_get battery profile fail\n");
193*4882a593Smuzhiyun return -EINVAL;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun for (i = 0; i < len; i++) {
196*4882a593Smuzhiyun cw221x->bat_profile[i] = info[i];
197*4882a593Smuzhiyun CW_DBG("%#x ", cw221x->bat_profile[i]);
198*4882a593Smuzhiyun if ((i + 1) % 8 == 0)
199*4882a593Smuzhiyun CW_DBG("\n");
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
cw221x_get_vol(struct cw221x_info * cw221x)205*4882a593Smuzhiyun static int cw221x_get_vol(struct cw221x_info *cw221x)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun u16 value16, value16_1, value16_2;
208*4882a593Smuzhiyun int voltage;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun cw221x_read_half_word(cw221x, REG_VCELL_H, &value16);
211*4882a593Smuzhiyun mdelay(10);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun cw221x_read_half_word(cw221x, REG_VCELL_H, &value16_1);
214*4882a593Smuzhiyun mdelay(10);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun if (value16 != value16_1) {
217*4882a593Smuzhiyun cw221x_read_half_word(cw221x, REG_VCELL_H, &value16_2);
218*4882a593Smuzhiyun if (value16_2 < 0)
219*4882a593Smuzhiyun return -1;
220*4882a593Smuzhiyun voltage = value16_2 * 5 / 16;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun return voltage;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun voltage = value16 * 5 / 16;
226*4882a593Smuzhiyun CW_DBG("cw221x: voltage:%d\n", voltage);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return voltage;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
cw221x_dwc_otg_check_dpdm(void)231*4882a593Smuzhiyun static int cw221x_dwc_otg_check_dpdm(void)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun #if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
234*4882a593Smuzhiyun return rockchip_chg_get_type();
235*4882a593Smuzhiyun #else
236*4882a593Smuzhiyun CW_DBG("cw221x: rockchip_chg_get_type() is not implement\n");
237*4882a593Smuzhiyun return CHARGER_TYPE_NO;
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
cw221x_get_usb_state(struct cw221x_info * cw221x)241*4882a593Smuzhiyun static int cw221x_get_usb_state(struct cw221x_info *cw221x)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun int charger_type;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun switch (cw221x_dwc_otg_check_dpdm()) {
246*4882a593Smuzhiyun case 0:
247*4882a593Smuzhiyun charger_type = CHARGER_TYPE_NO;
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun case 1:
250*4882a593Smuzhiyun case 3:
251*4882a593Smuzhiyun charger_type = CHARGER_TYPE_USB;
252*4882a593Smuzhiyun break;
253*4882a593Smuzhiyun case 2:
254*4882a593Smuzhiyun charger_type = CHARGER_TYPE_AC;
255*4882a593Smuzhiyun break;
256*4882a593Smuzhiyun default:
257*4882a593Smuzhiyun charger_type = CHARGER_TYPE_NO;
258*4882a593Smuzhiyun break;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return charger_type;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
cw221x_check_charge(struct cw221x_info * cw221x)264*4882a593Smuzhiyun static bool cw221x_check_charge(struct cw221x_info *cw221x)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun if (cw221x_get_usb_state(cw221x) != CHARGER_TYPE_NO)
267*4882a593Smuzhiyun return true;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun return false;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
cw221x_get_soc(struct cw221x_info * cw221x)272*4882a593Smuzhiyun static int cw221x_get_soc(struct cw221x_info *cw221x)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun int ui_100 = CW_UI_FULL;
275*4882a593Smuzhiyun int ui_soc;
276*4882a593Smuzhiyun u16 value16, value16_1, value16_2;
277*4882a593Smuzhiyun int ret;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16);
280*4882a593Smuzhiyun if (ret) {
281*4882a593Smuzhiyun printf("cw221x: get soc error!!!");
282*4882a593Smuzhiyun return ret;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun mdelay(10);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16_1);
287*4882a593Smuzhiyun if (ret) {
288*4882a593Smuzhiyun printf("cw221x: get soc error!!!");
289*4882a593Smuzhiyun return ret;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun mdelay(10);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (value16 != value16_1) {
294*4882a593Smuzhiyun ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16_2);
295*4882a593Smuzhiyun if (ret) {
296*4882a593Smuzhiyun printf("cw221x: get soc error!!!");
297*4882a593Smuzhiyun return ret;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (value16_2 < 0)
301*4882a593Smuzhiyun return -1;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun value16 = value16_2;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun ui_soc = value16 * 100 / (ui_100 * 256);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun if (ui_soc >= 100)
309*4882a593Smuzhiyun ui_soc = 100;
310*4882a593Smuzhiyun CW_DBG("soc: %d\n", ui_soc);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun return ui_soc;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
cw221x_update_get_soc(struct udevice * dev)315*4882a593Smuzhiyun static int cw221x_update_get_soc(struct udevice *dev)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun return cw221x_get_soc(cw221x);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /*
323*4882a593Smuzhiyun * The 0x00 register is an UNSIGNED 8bit read-only register. Its value is
324*4882a593Smuzhiyun * fixed to 0xA0 in shutdown mode and active mode.
325*4882a593Smuzhiyun */
cw221X_get_chip_id(struct cw221x_info * cw221x)326*4882a593Smuzhiyun static void cw221X_get_chip_id(struct cw221x_info *cw221x)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun u8 chip_id;
329*4882a593Smuzhiyun int ret;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun ret = cw221x_read(cw221x, REG_CHIP_ID, &chip_id);
332*4882a593Smuzhiyun if (ret) {
333*4882a593Smuzhiyun printf("cw221x: get chip id error!!!");
334*4882a593Smuzhiyun return;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun cw221x->chip_id = chip_id;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
cw221X_active(struct cw221x_info * cw221x)340*4882a593Smuzhiyun static int cw221X_active(struct cw221x_info *cw221x)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun unsigned char reg_val = CONFIG_MODE_RESTART;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
345*4882a593Smuzhiyun mdelay(20);
346*4882a593Smuzhiyun reg_val = CONFIG_MODE_ACTIVE;
347*4882a593Smuzhiyun cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
348*4882a593Smuzhiyun mdelay(20);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun return 0;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
cw221X_sleep(struct cw221x_info * cw221x)353*4882a593Smuzhiyun static int cw221X_sleep(struct cw221x_info *cw221x)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun unsigned char reg_val = CONFIG_MODE_RESTART;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
358*4882a593Smuzhiyun mdelay(20);
359*4882a593Smuzhiyun reg_val = CONFIG_MODE_SLEEP;
360*4882a593Smuzhiyun cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
361*4882a593Smuzhiyun mdelay(20);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun return 0;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
cw_write_profile(struct cw221x_info * cw221x,u8 buf[])366*4882a593Smuzhiyun static int cw_write_profile(struct cw221x_info *cw221x, u8 buf[])
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun int ret;
369*4882a593Smuzhiyun int i;
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun for (i = 0; i < SIZE_OF_PROFILE; i++) {
372*4882a593Smuzhiyun ret = cw221x_write(cw221x, REG_BAT_PROFILE + i, buf[i]);
373*4882a593Smuzhiyun if (ret < 0) {
374*4882a593Smuzhiyun printf("cw221x: write profile error\n");
375*4882a593Smuzhiyun return ret;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return ret;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /*
383*4882a593Smuzhiyun * Get the cw221X running state
384*4882a593Smuzhiyun * Determine whether the profile needs to be updated
385*4882a593Smuzhiyun */
cw221X_get_state(struct cw221x_info * cw221x)386*4882a593Smuzhiyun static int cw221X_get_state(struct cw221x_info *cw221x)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun unsigned char reg_val;
389*4882a593Smuzhiyun int ret;
390*4882a593Smuzhiyun int i;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun ret = cw221x_read(cw221x, REG_MODE_CONFIG, ®_val);
393*4882a593Smuzhiyun if (ret) {
394*4882a593Smuzhiyun printf("cw221x: get mode config error!!!");
395*4882a593Smuzhiyun return ret;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (reg_val != CONFIG_MODE_ACTIVE)
399*4882a593Smuzhiyun return CW221X_NOT_ACTIVE;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun ret = cw221x_read(cw221x, REG_SOC_ALERT, ®_val);
402*4882a593Smuzhiyun if (ret) {
403*4882a593Smuzhiyun printf("cw221x: get soc alert error!!!");
404*4882a593Smuzhiyun return ret;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun if (0x00 == (reg_val & CONFIG_UPDATE_FLG))
408*4882a593Smuzhiyun return CW221X_PROFILE_NOT_READY;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun for (i = 0; i < SIZE_OF_PROFILE; i++) {
411*4882a593Smuzhiyun ret = cw221x_read(cw221x, (REG_BAT_PROFILE + i), ®_val);
412*4882a593Smuzhiyun if (ret) {
413*4882a593Smuzhiyun printf("cw221x: get battery profile error!!!");
414*4882a593Smuzhiyun return ret;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun if (cw221x->bat_profile[i] != reg_val)
418*4882a593Smuzhiyun break;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun if (i != SIZE_OF_PROFILE)
422*4882a593Smuzhiyun return CW221X_PROFILE_NEED_UPDATE;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun return 0;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
cw_config_start_ic(struct cw221x_info * cw221x)427*4882a593Smuzhiyun static int cw_config_start_ic(struct cw221x_info *cw221x)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun int count = 0;
430*4882a593Smuzhiyun u8 reg_val;
431*4882a593Smuzhiyun int ret;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun cw221X_sleep(cw221x);
434*4882a593Smuzhiyun cw_write_profile(cw221x, cw221x->bat_profile);
435*4882a593Smuzhiyun cw221X_active(cw221x);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* set UPDATE_FLAG AND SOC INTTERRUP VALUE */
438*4882a593Smuzhiyun reg_val = CONFIG_UPDATE_FLG | GPIO_SOC_IRQ_VALUE;
439*4882a593Smuzhiyun ret = cw221x_write(cw221x, REG_SOC_ALERT, reg_val);
440*4882a593Smuzhiyun if (ret < 0)
441*4882a593Smuzhiyun return ret;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun /* close all interruptes */
444*4882a593Smuzhiyun reg_val = 0;
445*4882a593Smuzhiyun ret = cw221x_write(cw221x, REG_GPIO_CONFIG, reg_val);
446*4882a593Smuzhiyun if (ret < 0)
447*4882a593Smuzhiyun return ret;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun while (CW_TRUE) {
450*4882a593Smuzhiyun mdelay(CW_SLEEP_100MS);
451*4882a593Smuzhiyun ret = cw221x_read(cw221x, REG_IC_STATE, ®_val);
452*4882a593Smuzhiyun if (ret) {
453*4882a593Smuzhiyun printf("cw221x: get ic state error!!!");
454*4882a593Smuzhiyun return ret;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (IC_READY_MARK == (reg_val & IC_READY_MARK))
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun count++;
460*4882a593Smuzhiyun if (count >= CW_SLEEP_COUNTS) {
461*4882a593Smuzhiyun cw221X_sleep(cw221x);
462*4882a593Smuzhiyun return -1;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun return 0;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun
cw221X_init(struct cw221x_info * cw221x)468*4882a593Smuzhiyun static int cw221X_init(struct cw221x_info *cw221x)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun int ret;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun cw221X_get_chip_id(cw221x);
473*4882a593Smuzhiyun if (cw221x->chip_id != IC_VCHIP_ID) {
474*4882a593Smuzhiyun printf("not cw221X\n");
475*4882a593Smuzhiyun return -EINVAL;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun CW_DBG("cw221X:\n");
479*4882a593Smuzhiyun ret = cw221X_get_state(cw221x);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun if (ret != 0) {
482*4882a593Smuzhiyun CW_DBG("cw221x: need update profile; %d\n", ret);
483*4882a593Smuzhiyun ret = cw_config_start_ic(cw221x);
484*4882a593Smuzhiyun if (ret < 0)
485*4882a593Smuzhiyun return ret;
486*4882a593Smuzhiyun } else {
487*4882a593Smuzhiyun CW_DBG("cw221x: not need update profile\n");
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun CW_DBG("cw221X: init success!\n");
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun return 0;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun /* get complement code function, unsigned short must be U16 */
get_complement_code(unsigned short raw_code)496*4882a593Smuzhiyun static long get_complement_code(unsigned short raw_code)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun long complement_code;
499*4882a593Smuzhiyun int dir;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if (0 != (raw_code & COMPLEMENT_CODE_U16)) {
502*4882a593Smuzhiyun dir = -1;
503*4882a593Smuzhiyun raw_code = (0xFFFF - raw_code) + 1;
504*4882a593Smuzhiyun } else {
505*4882a593Smuzhiyun dir = 1;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun complement_code = (long)raw_code * dir;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun return complement_code;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
cw221x_get_current(struct cw221x_info * cw221x)513*4882a593Smuzhiyun static int cw221x_get_current(struct cw221x_info *cw221x)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun long long cw_current;
516*4882a593Smuzhiyun u16 value16;
517*4882a593Smuzhiyun int ret;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun ret = cw221x_read_half_word(cw221x, REG_CURRENT_H, &value16);
520*4882a593Smuzhiyun if (ret) {
521*4882a593Smuzhiyun printf("cw221x: get current error!!!");
522*4882a593Smuzhiyun return ret;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun cw_current = get_complement_code(value16);
526*4882a593Smuzhiyun cw_current = cw_current * 1600 / USER_RSENSE;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun CW_DBG("cw221x: current: %lld\n", cw_current);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun return cw_current;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun
cw221x_update_get_current(struct udevice * dev)533*4882a593Smuzhiyun static int cw221x_update_get_current(struct udevice *dev)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return cw221x_get_current(cw221x);
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
cw221x_get_temperature(struct udevice * dev,int * temp)540*4882a593Smuzhiyun static int cw221x_get_temperature(struct udevice *dev, int *temp)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
543*4882a593Smuzhiyun u8 reg_val;
544*4882a593Smuzhiyun int bat_temp;
545*4882a593Smuzhiyun int ret;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun ret = cw221x_read(cw221x, REG_TEMP, ®_val);
548*4882a593Smuzhiyun if (ret)
549*4882a593Smuzhiyun return ret;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun bat_temp = (int)reg_val * 10 / 2 - 400;
552*4882a593Smuzhiyun CW_DBG("cw221x: temperature: %d\n", bat_temp);
553*4882a593Smuzhiyun *temp = bat_temp;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun return 0;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
cw221x_update_get_chrg_online(struct udevice * dev)558*4882a593Smuzhiyun static bool cw221x_update_get_chrg_online(struct udevice *dev)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun return cw221x_check_charge(cw221x);
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
cw221x_update_get_voltage(struct udevice * dev)565*4882a593Smuzhiyun static int cw221x_update_get_voltage(struct udevice *dev)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
568*4882a593Smuzhiyun int temperture;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun cw221x_get_current(cw221x);
571*4882a593Smuzhiyun cw221x_get_temperature(dev, &temperture);
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun return cw221x_get_vol(cw221x);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
cw221x_capability(struct udevice * dev)576*4882a593Smuzhiyun static int cw221x_capability(struct udevice *dev)
577*4882a593Smuzhiyun {
578*4882a593Smuzhiyun return FG_CAP_FUEL_GAUGE;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun static struct dm_fuel_gauge_ops cw221x_fg_ops = {
582*4882a593Smuzhiyun .capability = cw221x_capability,
583*4882a593Smuzhiyun .get_soc = cw221x_update_get_soc,
584*4882a593Smuzhiyun .get_voltage = cw221x_update_get_voltage,
585*4882a593Smuzhiyun .get_current = cw221x_update_get_current,
586*4882a593Smuzhiyun .get_temperature = cw221x_get_temperature,
587*4882a593Smuzhiyun .get_chrg_online = cw221x_update_get_chrg_online,
588*4882a593Smuzhiyun };
589*4882a593Smuzhiyun
cw221x_fg_probe(struct udevice * dev)590*4882a593Smuzhiyun static int cw221x_fg_probe(struct udevice *dev)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun struct cw221x_info *cw221x = dev_get_priv(dev);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun cw221x->dev = dev;
595*4882a593Smuzhiyun printf("cw221x driver version-20220903");
596*4882a593Smuzhiyun cw221X_init(cw221x);
597*4882a593Smuzhiyun printf("cw221x vol: %d, soc: %d\n",
598*4882a593Smuzhiyun cw221x_get_vol(cw221x), cw221x_get_soc(cw221x));
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun return 0;
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun static const struct udevice_id cw221x_ids[] = {
604*4882a593Smuzhiyun { .compatible = "cellwise,cw221X" },
605*4882a593Smuzhiyun { }
606*4882a593Smuzhiyun };
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun U_BOOT_DRIVER(cw221x_fg) = {
609*4882a593Smuzhiyun .name = "cw221x_fg",
610*4882a593Smuzhiyun .id = UCLASS_FG,
611*4882a593Smuzhiyun .of_match = cw221x_ids,
612*4882a593Smuzhiyun .probe = cw221x_fg_probe,
613*4882a593Smuzhiyun .ofdata_to_platdata = cw221x_ofdata_to_platdata,
614*4882a593Smuzhiyun .ops = &cw221x_fg_ops,
615*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct cw221x_info),
616*4882a593Smuzhiyun };
617