1 /*
2 * (C) Copyright 2022 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <i2c.h>
11 #include <power/fuel_gauge.h>
12 #include <power/pmic.h>
13 #include <linux/usb/phy-rockchip-usb2.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 static int dbg_enable;
18
19 #define CW_DBG(args...) \
20 do { \
21 if (dbg_enable) { \
22 printf(args); \
23 } \
24 } while (0)
25
26 #define REG_CHIP_ID 0x00
27 #define REG_VCELL_H 0x02
28 #define REG_VCELL_L 0x03
29 #define REG_SOC_INT 0x04
30 #define REG_SOC_DECIMAL 0x05
31 #define REG_TEMP 0x06
32 #define REG_MODE_CONFIG 0x08
33 #define REG_GPIO_CONFIG 0x0A
34 #define REG_SOC_ALERT 0x0B
35 #define REG_TEMP_MAX 0x0C
36 #define REG_TEMP_MIN 0x0D
37 #define REG_CURRENT_H 0x0E
38 #define REG_CURRENT_L 0x0F
39 #define REG_T_HOST_H 0xA0
40 #define REG_T_HOST_L 0xA1
41 #define REG_USER_CONF 0xA2
42 #define REG_CYCLE_H 0xA4
43 #define REG_CYCLE_L 0xA5
44 #define REG_SOH 0xA6
45 #define REG_IC_STATE 0xA7
46 #define REG_FW_VERSION 0xAB
47 #define REG_BAT_PROFILE 0x10
48
49 #define CONFIG_MODE_RESTART 0x30
50 #define CONFIG_MODE_ACTIVE 0x00
51 #define CONFIG_MODE_SLEEP 0xF0
52 #define CONFIG_UPDATE_FLG 0x80
53 #define IC_VCHIP_ID 0xA0
54 #define IC_READY_MARK 0x0C
55
56 #define GPIO_ENABLE_MIN_TEMP 0
57 #define GPIO_ENABLE_MAX_TEMP 0
58 #define GPIO_ENABLE_SOC_CHANGE 0
59 #define GPIO_SOC_IRQ_VALUE 0x0 /* 0x7F */
60 #define DEFINED_MAX_TEMP 45
61 #define DEFINED_MIN_TEMP 0
62
63 #define CWFG_NAME "cw221X"
64 #define SIZE_OF_PROFILE 80
65
66 /* mhom rsense * 1000 for convenience calculation */
67 #define USER_RSENSE 1500
68
69 #define queue_delayed_work_time 5000
70 #define queue_start_work_time 50
71
72 #define CW_SLEEP_20MS 20
73 #define CW_SLEEP_10MS 10
74 #define CW_UI_FULL 100
75 #define COMPLEMENT_CODE_U16 0x8000
76 #define CW_SLEEP_100MS 100
77 #define CW_SLEEP_200MS 200
78 #define CW_SLEEP_COUNTS 50
79 #define CW_TRUE 1
80 #define CW_RETRY_COUNT 3
81 #define CW_VOL_UNIT 1000
82 #define CW_LOW_VOLTAGE_REF 2500
83 #define CW_LOW_VOLTAGE 3000
84 #define CW_LOW_VOLTAGE_STEP 10
85
86 #define CW221X_NOT_ACTIVE 1
87 #define CW221X_PROFILE_NOT_READY 2
88 #define CW221X_PROFILE_NEED_UPDATE 3
89
90 static u8 config_profile_info[SIZE_OF_PROFILE] = {
91 0x5A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xB2,
92 0xC2, 0xCA, 0xC2, 0xBD, 0x9C, 0x5C, 0x38, 0xFF, 0xFF, 0xC4,
93 0x86, 0x74, 0x60, 0x55, 0x4F, 0x4D, 0x4B, 0x80, 0xC0, 0xDB,
94 0xCD, 0xD0, 0xCE, 0xD2, 0xD3, 0xD2, 0xD0, 0xCE, 0xC3, 0xD5,
95 0xB9, 0xC9, 0xC5, 0xA3, 0x92, 0x8A, 0x80, 0x72, 0x63, 0x62,
96 0x74, 0x90, 0xA6, 0x7E, 0x5F, 0x48, 0x80, 0x00, 0xAB, 0x10,
97 0x00, 0xA1, 0xFB, 0x00, 0x00, 0x00, 0x64, 0x1E, 0xB1, 0x04,
98 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4D,
99 };
100
101 enum charger_type {
102 CHARGER_TYPE_NO = 0,
103 CHARGER_TYPE_USB,
104 CHARGER_TYPE_AC,
105 CHARGER_TYPE_DC,
106 CHARGER_TYPE_UNDEF,
107 };
108
109 struct cw221x_info {
110 struct udevice *dev;
111 int capacity;
112 u8 *bat_profile;
113 int chip_id;
114 int voltage;
115 int ic_soc_h;
116 int ic_soc_l;
117 int ui_soc;
118 int temp;
119 long cw_current;
120 int cycle;
121 int soh;
122 };
123
cw221x_read(struct cw221x_info * cw221x,u8 reg,u8 * buffer)124 static u8 cw221x_read(struct cw221x_info *cw221x, u8 reg, u8 *buffer)
125 {
126 u8 val;
127 int ret;
128
129 ret = dm_i2c_read(cw221x->dev, reg, &val, 1);
130 if (ret) {
131 printf("cw221x: read reg 0x%02x failed, ret=%d\n", reg, ret);
132 return ret;
133 }
134
135 *buffer = val;
136 return 0;
137 }
138
cw221x_write(struct cw221x_info * cw221x,u8 reg,u8 val)139 static int cw221x_write(struct cw221x_info *cw221x, u8 reg, u8 val)
140 {
141 int ret;
142
143 ret = dm_i2c_write(cw221x->dev, reg, &val, 1);
144 if (ret)
145 printf("cw221x: write reg 0x%02x failed, ret=%d\n", reg, ret);
146
147 return ret;
148 }
149
cw221x_read_half_word(struct cw221x_info * cw221x,int reg,u16 * buffer)150 static int cw221x_read_half_word(struct cw221x_info *cw221x,
151 int reg,
152 u16 *buffer)
153 {
154 u8 vall, valh;
155 int ret;
156
157 ret = cw221x_read(cw221x, reg, &valh);
158 if (ret)
159 return ret;
160
161 ret = cw221x_read(cw221x, reg + 1, &vall);
162 if (ret)
163 return ret;
164
165 *buffer = ((u16)valh << 8) | vall;
166
167 return 0;
168 }
169
cw221x_ofdata_to_platdata(struct udevice * dev)170 static int cw221x_ofdata_to_platdata(struct udevice *dev)
171 {
172 struct cw221x_info *cw221x = dev_get_priv(dev);
173 int i, len, size;
174 const u8 *info;
175
176 if (!dev_read_prop(dev, "cellwise,battery-profile", &len) ||
177 (len != SIZE_OF_PROFILE)) {
178 cw221x->bat_profile = config_profile_info;
179 return 0;
180 }
181
182 CW_DBG("cw221x: use dts profile\n");
183 size = sizeof(*cw221x->bat_profile) * len;
184 cw221x->bat_profile = calloc(size, 1);
185 if (!cw221x->bat_profile) {
186 CW_DBG("cw221x: calloc bat_profile fail\n");
187 return -EINVAL;
188 }
189
190 info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
191 if (!info) {
192 CW_DBG("cw221x: fdtdec_get battery profile fail\n");
193 return -EINVAL;
194 }
195 for (i = 0; i < len; i++) {
196 cw221x->bat_profile[i] = info[i];
197 CW_DBG("%#x ", cw221x->bat_profile[i]);
198 if ((i + 1) % 8 == 0)
199 CW_DBG("\n");
200 }
201
202 return 0;
203 }
204
cw221x_get_vol(struct cw221x_info * cw221x)205 static int cw221x_get_vol(struct cw221x_info *cw221x)
206 {
207 u16 value16, value16_1, value16_2;
208 int voltage;
209
210 cw221x_read_half_word(cw221x, REG_VCELL_H, &value16);
211 mdelay(10);
212
213 cw221x_read_half_word(cw221x, REG_VCELL_H, &value16_1);
214 mdelay(10);
215
216 if (value16 != value16_1) {
217 cw221x_read_half_word(cw221x, REG_VCELL_H, &value16_2);
218 if (value16_2 < 0)
219 return -1;
220 voltage = value16_2 * 5 / 16;
221
222 return voltage;
223 }
224
225 voltage = value16 * 5 / 16;
226 CW_DBG("cw221x: voltage:%d\n", voltage);
227
228 return voltage;
229 }
230
cw221x_dwc_otg_check_dpdm(void)231 static int cw221x_dwc_otg_check_dpdm(void)
232 {
233 #if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
234 return rockchip_chg_get_type();
235 #else
236 CW_DBG("cw221x: rockchip_chg_get_type() is not implement\n");
237 return CHARGER_TYPE_NO;
238 #endif
239 }
240
cw221x_get_usb_state(struct cw221x_info * cw221x)241 static int cw221x_get_usb_state(struct cw221x_info *cw221x)
242 {
243 int charger_type;
244
245 switch (cw221x_dwc_otg_check_dpdm()) {
246 case 0:
247 charger_type = CHARGER_TYPE_NO;
248 break;
249 case 1:
250 case 3:
251 charger_type = CHARGER_TYPE_USB;
252 break;
253 case 2:
254 charger_type = CHARGER_TYPE_AC;
255 break;
256 default:
257 charger_type = CHARGER_TYPE_NO;
258 break;
259 }
260
261 return charger_type;
262 }
263
cw221x_check_charge(struct cw221x_info * cw221x)264 static bool cw221x_check_charge(struct cw221x_info *cw221x)
265 {
266 if (cw221x_get_usb_state(cw221x) != CHARGER_TYPE_NO)
267 return true;
268
269 return false;
270 }
271
cw221x_get_soc(struct cw221x_info * cw221x)272 static int cw221x_get_soc(struct cw221x_info *cw221x)
273 {
274 int ui_100 = CW_UI_FULL;
275 int ui_soc;
276 u16 value16, value16_1, value16_2;
277 int ret;
278
279 ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16);
280 if (ret) {
281 printf("cw221x: get soc error!!!");
282 return ret;
283 }
284 mdelay(10);
285
286 ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16_1);
287 if (ret) {
288 printf("cw221x: get soc error!!!");
289 return ret;
290 }
291 mdelay(10);
292
293 if (value16 != value16_1) {
294 ret = cw221x_read_half_word(cw221x, REG_SOC_INT, &value16_2);
295 if (ret) {
296 printf("cw221x: get soc error!!!");
297 return ret;
298 }
299
300 if (value16_2 < 0)
301 return -1;
302
303 value16 = value16_2;
304 }
305
306 ui_soc = value16 * 100 / (ui_100 * 256);
307
308 if (ui_soc >= 100)
309 ui_soc = 100;
310 CW_DBG("soc: %d\n", ui_soc);
311
312 return ui_soc;
313 }
314
cw221x_update_get_soc(struct udevice * dev)315 static int cw221x_update_get_soc(struct udevice *dev)
316 {
317 struct cw221x_info *cw221x = dev_get_priv(dev);
318
319 return cw221x_get_soc(cw221x);
320 }
321
322 /*
323 * The 0x00 register is an UNSIGNED 8bit read-only register. Its value is
324 * fixed to 0xA0 in shutdown mode and active mode.
325 */
cw221X_get_chip_id(struct cw221x_info * cw221x)326 static void cw221X_get_chip_id(struct cw221x_info *cw221x)
327 {
328 u8 chip_id;
329 int ret;
330
331 ret = cw221x_read(cw221x, REG_CHIP_ID, &chip_id);
332 if (ret) {
333 printf("cw221x: get chip id error!!!");
334 return;
335 }
336
337 cw221x->chip_id = chip_id;
338 }
339
cw221X_active(struct cw221x_info * cw221x)340 static int cw221X_active(struct cw221x_info *cw221x)
341 {
342 unsigned char reg_val = CONFIG_MODE_RESTART;
343
344 cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
345 mdelay(20);
346 reg_val = CONFIG_MODE_ACTIVE;
347 cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
348 mdelay(20);
349
350 return 0;
351 }
352
cw221X_sleep(struct cw221x_info * cw221x)353 static int cw221X_sleep(struct cw221x_info *cw221x)
354 {
355 unsigned char reg_val = CONFIG_MODE_RESTART;
356
357 cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
358 mdelay(20);
359 reg_val = CONFIG_MODE_SLEEP;
360 cw221x_write(cw221x, REG_MODE_CONFIG, reg_val);
361 mdelay(20);
362
363 return 0;
364 }
365
cw_write_profile(struct cw221x_info * cw221x,u8 buf[])366 static int cw_write_profile(struct cw221x_info *cw221x, u8 buf[])
367 {
368 int ret;
369 int i;
370
371 for (i = 0; i < SIZE_OF_PROFILE; i++) {
372 ret = cw221x_write(cw221x, REG_BAT_PROFILE + i, buf[i]);
373 if (ret < 0) {
374 printf("cw221x: write profile error\n");
375 return ret;
376 }
377 }
378
379 return ret;
380 }
381
382 /*
383 * Get the cw221X running state
384 * Determine whether the profile needs to be updated
385 */
cw221X_get_state(struct cw221x_info * cw221x)386 static int cw221X_get_state(struct cw221x_info *cw221x)
387 {
388 unsigned char reg_val;
389 int ret;
390 int i;
391
392 ret = cw221x_read(cw221x, REG_MODE_CONFIG, ®_val);
393 if (ret) {
394 printf("cw221x: get mode config error!!!");
395 return ret;
396 }
397
398 if (reg_val != CONFIG_MODE_ACTIVE)
399 return CW221X_NOT_ACTIVE;
400
401 ret = cw221x_read(cw221x, REG_SOC_ALERT, ®_val);
402 if (ret) {
403 printf("cw221x: get soc alert error!!!");
404 return ret;
405 }
406
407 if (0x00 == (reg_val & CONFIG_UPDATE_FLG))
408 return CW221X_PROFILE_NOT_READY;
409
410 for (i = 0; i < SIZE_OF_PROFILE; i++) {
411 ret = cw221x_read(cw221x, (REG_BAT_PROFILE + i), ®_val);
412 if (ret) {
413 printf("cw221x: get battery profile error!!!");
414 return ret;
415 }
416
417 if (cw221x->bat_profile[i] != reg_val)
418 break;
419 }
420
421 if (i != SIZE_OF_PROFILE)
422 return CW221X_PROFILE_NEED_UPDATE;
423
424 return 0;
425 }
426
cw_config_start_ic(struct cw221x_info * cw221x)427 static int cw_config_start_ic(struct cw221x_info *cw221x)
428 {
429 int count = 0;
430 u8 reg_val;
431 int ret;
432
433 cw221X_sleep(cw221x);
434 cw_write_profile(cw221x, cw221x->bat_profile);
435 cw221X_active(cw221x);
436
437 /* set UPDATE_FLAG AND SOC INTTERRUP VALUE */
438 reg_val = CONFIG_UPDATE_FLG | GPIO_SOC_IRQ_VALUE;
439 ret = cw221x_write(cw221x, REG_SOC_ALERT, reg_val);
440 if (ret < 0)
441 return ret;
442
443 /* close all interruptes */
444 reg_val = 0;
445 ret = cw221x_write(cw221x, REG_GPIO_CONFIG, reg_val);
446 if (ret < 0)
447 return ret;
448
449 while (CW_TRUE) {
450 mdelay(CW_SLEEP_100MS);
451 ret = cw221x_read(cw221x, REG_IC_STATE, ®_val);
452 if (ret) {
453 printf("cw221x: get ic state error!!!");
454 return ret;
455 }
456
457 if (IC_READY_MARK == (reg_val & IC_READY_MARK))
458 break;
459 count++;
460 if (count >= CW_SLEEP_COUNTS) {
461 cw221X_sleep(cw221x);
462 return -1;
463 }
464 }
465 return 0;
466 }
467
cw221X_init(struct cw221x_info * cw221x)468 static int cw221X_init(struct cw221x_info *cw221x)
469 {
470 int ret;
471
472 cw221X_get_chip_id(cw221x);
473 if (cw221x->chip_id != IC_VCHIP_ID) {
474 printf("not cw221X\n");
475 return -EINVAL;
476 }
477
478 CW_DBG("cw221X:\n");
479 ret = cw221X_get_state(cw221x);
480
481 if (ret != 0) {
482 CW_DBG("cw221x: need update profile; %d\n", ret);
483 ret = cw_config_start_ic(cw221x);
484 if (ret < 0)
485 return ret;
486 } else {
487 CW_DBG("cw221x: not need update profile\n");
488 }
489
490 CW_DBG("cw221X: init success!\n");
491
492 return 0;
493 }
494
495 /* get complement code function, unsigned short must be U16 */
get_complement_code(unsigned short raw_code)496 static long get_complement_code(unsigned short raw_code)
497 {
498 long complement_code;
499 int dir;
500
501 if (0 != (raw_code & COMPLEMENT_CODE_U16)) {
502 dir = -1;
503 raw_code = (0xFFFF - raw_code) + 1;
504 } else {
505 dir = 1;
506 }
507
508 complement_code = (long)raw_code * dir;
509
510 return complement_code;
511 }
512
cw221x_get_current(struct cw221x_info * cw221x)513 static int cw221x_get_current(struct cw221x_info *cw221x)
514 {
515 long long cw_current;
516 u16 value16;
517 int ret;
518
519 ret = cw221x_read_half_word(cw221x, REG_CURRENT_H, &value16);
520 if (ret) {
521 printf("cw221x: get current error!!!");
522 return ret;
523 }
524
525 cw_current = get_complement_code(value16);
526 cw_current = cw_current * 1600 / USER_RSENSE;
527
528 CW_DBG("cw221x: current: %lld\n", cw_current);
529
530 return cw_current;
531 }
532
cw221x_update_get_current(struct udevice * dev)533 static int cw221x_update_get_current(struct udevice *dev)
534 {
535 struct cw221x_info *cw221x = dev_get_priv(dev);
536
537 return cw221x_get_current(cw221x);
538 }
539
cw221x_get_temperature(struct udevice * dev,int * temp)540 static int cw221x_get_temperature(struct udevice *dev, int *temp)
541 {
542 struct cw221x_info *cw221x = dev_get_priv(dev);
543 u8 reg_val;
544 int bat_temp;
545 int ret;
546
547 ret = cw221x_read(cw221x, REG_TEMP, ®_val);
548 if (ret)
549 return ret;
550
551 bat_temp = (int)reg_val * 10 / 2 - 400;
552 CW_DBG("cw221x: temperature: %d\n", bat_temp);
553 *temp = bat_temp;
554
555 return 0;
556 }
557
cw221x_update_get_chrg_online(struct udevice * dev)558 static bool cw221x_update_get_chrg_online(struct udevice *dev)
559 {
560 struct cw221x_info *cw221x = dev_get_priv(dev);
561
562 return cw221x_check_charge(cw221x);
563 }
564
cw221x_update_get_voltage(struct udevice * dev)565 static int cw221x_update_get_voltage(struct udevice *dev)
566 {
567 struct cw221x_info *cw221x = dev_get_priv(dev);
568 int temperture;
569
570 cw221x_get_current(cw221x);
571 cw221x_get_temperature(dev, &temperture);
572
573 return cw221x_get_vol(cw221x);
574 }
575
cw221x_capability(struct udevice * dev)576 static int cw221x_capability(struct udevice *dev)
577 {
578 return FG_CAP_FUEL_GAUGE;
579 }
580
581 static struct dm_fuel_gauge_ops cw221x_fg_ops = {
582 .capability = cw221x_capability,
583 .get_soc = cw221x_update_get_soc,
584 .get_voltage = cw221x_update_get_voltage,
585 .get_current = cw221x_update_get_current,
586 .get_temperature = cw221x_get_temperature,
587 .get_chrg_online = cw221x_update_get_chrg_online,
588 };
589
cw221x_fg_probe(struct udevice * dev)590 static int cw221x_fg_probe(struct udevice *dev)
591 {
592 struct cw221x_info *cw221x = dev_get_priv(dev);
593
594 cw221x->dev = dev;
595 printf("cw221x driver version-20220903");
596 cw221X_init(cw221x);
597 printf("cw221x vol: %d, soc: %d\n",
598 cw221x_get_vol(cw221x), cw221x_get_soc(cw221x));
599
600 return 0;
601 }
602
603 static const struct udevice_id cw221x_ids[] = {
604 { .compatible = "cellwise,cw221X" },
605 { }
606 };
607
608 U_BOOT_DRIVER(cw221x_fg) = {
609 .name = "cw221x_fg",
610 .id = UCLASS_FG,
611 .of_match = cw221x_ids,
612 .probe = cw221x_fg_probe,
613 .ofdata_to_platdata = cw221x_ofdata_to_platdata,
614 .ops = &cw221x_fg_ops,
615 .priv_auto_alloc_size = sizeof(struct cw221x_info),
616 };
617