1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun #include <common.h>
7*4882a593Smuzhiyun #include <asm/gpio.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <dm/device.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <fdtdec.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun #include <linux/usb/phy-rockchip-usb2.h>
14*4882a593Smuzhiyun #include <malloc.h>
15*4882a593Smuzhiyun #include <power/battery.h>
16*4882a593Smuzhiyun #include <power/fuel_gauge.h>
17*4882a593Smuzhiyun #include <power/pmic.h>
18*4882a593Smuzhiyun #include "fg_regs.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define COMPAT_ROCKCHIP_CW201X "cw201x"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define REG_VERSION 0x0
25*4882a593Smuzhiyun #define REG_VCELL 0x2
26*4882a593Smuzhiyun #define REG_SOC 0x4
27*4882a593Smuzhiyun #define REG_RRT_ALERT 0x6
28*4882a593Smuzhiyun #define REG_CONFIG 0x8
29*4882a593Smuzhiyun #define REG_MODE 0xA
30*4882a593Smuzhiyun #define REG_BATINFO 0x10
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define MODE_SLEEP_MASK (0x3 << 6)
33*4882a593Smuzhiyun #define MODE_SLEEP (0x3 << 6)
34*4882a593Smuzhiyun #define MODE_NORMAL (0x0 << 6)
35*4882a593Smuzhiyun #define MODE_QUICK_START (0x3 << 4)
36*4882a593Smuzhiyun #define MODE_RESTART (0xf << 0)
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define CONFIG_UPDATE_FLG (0x1 << 1)
39*4882a593Smuzhiyun #define ATHD (0x0 << 3)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun enum charger_type {
42*4882a593Smuzhiyun CHARGER_TYPE_NO = 0,
43*4882a593Smuzhiyun CHARGER_TYPE_USB,
44*4882a593Smuzhiyun CHARGER_TYPE_AC,
45*4882a593Smuzhiyun CHARGER_TYPE_DC,
46*4882a593Smuzhiyun CHARGER_TYPE_UNDEF,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun struct cw201x_info {
50*4882a593Smuzhiyun struct udevice *dev;
51*4882a593Smuzhiyun int capacity;
52*4882a593Smuzhiyun u32 *cw_bat_config_info;
53*4882a593Smuzhiyun int divider_res1;
54*4882a593Smuzhiyun int divider_res2;
55*4882a593Smuzhiyun int hw_id_check;
56*4882a593Smuzhiyun struct gpio_desc hw_id0;
57*4882a593Smuzhiyun struct gpio_desc hw_id1;
58*4882a593Smuzhiyun int support_dc_adp;
59*4882a593Smuzhiyun struct gpio_desc dc_det_gpio;
60*4882a593Smuzhiyun int dc_det_flag;
61*4882a593Smuzhiyun bool dual_cell;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
cw201x_read(struct cw201x_info * cw201x,u8 reg)64*4882a593Smuzhiyun static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun u8 val;
67*4882a593Smuzhiyun int ret;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
70*4882a593Smuzhiyun if (ret) {
71*4882a593Smuzhiyun debug("write error to device: %p register: %#x!",
72*4882a593Smuzhiyun cw201x->dev, reg);
73*4882a593Smuzhiyun return ret;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun return val;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
cw201x_write(struct cw201x_info * cw201x,u8 reg,u8 val)79*4882a593Smuzhiyun static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun int ret;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
84*4882a593Smuzhiyun if (ret) {
85*4882a593Smuzhiyun debug("write error to device: %p register: %#x!",
86*4882a593Smuzhiyun cw201x->dev, reg);
87*4882a593Smuzhiyun return ret;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
cw201x_read_half_word(struct cw201x_info * cw201x,int reg)93*4882a593Smuzhiyun static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun u8 vall, valh;
96*4882a593Smuzhiyun u16 val;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun valh = cw201x_read(cw201x, reg);
99*4882a593Smuzhiyun vall = cw201x_read(cw201x, reg + 1);
100*4882a593Smuzhiyun val = ((u16)valh << 8) | vall;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return val;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
cw201x_parse_config_info(struct cw201x_info * cw201x)105*4882a593Smuzhiyun static int cw201x_parse_config_info(struct cw201x_info *cw201x)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun int ret;
108*4882a593Smuzhiyun int i, len, size;
109*4882a593Smuzhiyun const u8 *info;
110*4882a593Smuzhiyun struct udevice *dev = cw201x->dev;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (dev_read_prop(dev, "bat_config_info", &len)) {
113*4882a593Smuzhiyun len /= sizeof(u32);
114*4882a593Smuzhiyun size = sizeof(*cw201x->cw_bat_config_info) * len;
115*4882a593Smuzhiyun cw201x->cw_bat_config_info = calloc(size, 1);
116*4882a593Smuzhiyun if (!cw201x->cw_bat_config_info) {
117*4882a593Smuzhiyun debug("calloc cw_bat_config_info fail\n");
118*4882a593Smuzhiyun return -EINVAL;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun ret = dev_read_u32_array(dev, "bat_config_info",
121*4882a593Smuzhiyun cw201x->cw_bat_config_info, len);
122*4882a593Smuzhiyun if (ret) {
123*4882a593Smuzhiyun debug("fdtdec_get cw_bat_config_info fail\n");
124*4882a593Smuzhiyun return -EINVAL;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (!dev_read_prop(dev, "cellwise,battery-profile", &len))
131*4882a593Smuzhiyun return -EINVAL;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun size = sizeof(*cw201x->cw_bat_config_info) * len;
134*4882a593Smuzhiyun cw201x->cw_bat_config_info = calloc(size, 1);
135*4882a593Smuzhiyun if (!cw201x->cw_bat_config_info) {
136*4882a593Smuzhiyun debug("calloc cw_bat_config_info fail\n");
137*4882a593Smuzhiyun return -EINVAL;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun info = dev_read_u8_array_ptr(dev, "cellwise,battery-profile", len);
141*4882a593Smuzhiyun if (!info) {
142*4882a593Smuzhiyun debug("fdtdec_get battery profile fail\n");
143*4882a593Smuzhiyun return -EINVAL;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun for (i = 0; i < len; i++) {
146*4882a593Smuzhiyun cw201x->cw_bat_config_info[i] = info[i];
147*4882a593Smuzhiyun debug("%#x ", cw201x->cw_bat_config_info[i]);
148*4882a593Smuzhiyun if ((i+1) % 8 == 0)
149*4882a593Smuzhiyun debug("\n");
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return 0;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
cw201x_ofdata_to_platdata(struct udevice * dev)155*4882a593Smuzhiyun static int cw201x_ofdata_to_platdata(struct udevice *dev)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun struct cw201x_info *cw201x = dev_get_priv(dev);
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun int hw_id0_val, hw_id1_val;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun cw201x->dev = dev;
162*4882a593Smuzhiyun ret = cw201x_parse_config_info(cw201x);
163*4882a593Smuzhiyun if (ret)
164*4882a593Smuzhiyun return ret;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun cw201x->dual_cell = dev_read_bool(dev, "cellwise,dual-cell");
167*4882a593Smuzhiyun ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
168*4882a593Smuzhiyun 0, &cw201x->dc_det_gpio, GPIOD_IS_IN);
169*4882a593Smuzhiyun if (!ret) {
170*4882a593Smuzhiyun cw201x->support_dc_adp = 1;
171*4882a593Smuzhiyun debug("DC is valid\n");
172*4882a593Smuzhiyun } else {
173*4882a593Smuzhiyun debug("DC is invalid, ret=%d\n", ret);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun cw201x->hw_id_check = dev_read_u32_default(dev, "hw_id_check", 0);
177*4882a593Smuzhiyun if (cw201x->hw_id_check) {
178*4882a593Smuzhiyun ret = gpio_request_by_name_nodev(dev_ofnode(dev),
179*4882a593Smuzhiyun "hw_id0_gpio", 0,
180*4882a593Smuzhiyun &cw201x->hw_id0, GPIOD_IS_IN);
181*4882a593Smuzhiyun if (ret)
182*4882a593Smuzhiyun return -EINVAL;
183*4882a593Smuzhiyun hw_id0_val = dm_gpio_get_value(&cw201x->hw_id0);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ret = gpio_request_by_name_nodev(dev_ofnode(dev),
186*4882a593Smuzhiyun "hw_id1_gpio", 0,
187*4882a593Smuzhiyun &cw201x->hw_id1, GPIOD_IS_IN);
188*4882a593Smuzhiyun if (ret)
189*4882a593Smuzhiyun return -EINVAL;
190*4882a593Smuzhiyun hw_id1_val = dm_gpio_get_value(&cw201x->hw_id1);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* ID1 = 0, ID0 = 1 : Battery */
193*4882a593Smuzhiyun if (!hw_id0_val || hw_id1_val)
194*4882a593Smuzhiyun return -EINVAL;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun cw201x->divider_res1 = dev_read_u32_default(dev, "divider_res1", 0);
198*4882a593Smuzhiyun cw201x->divider_res2 = dev_read_u32_default(dev, "divider_res2", 0);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
cw201x_get_vol(struct cw201x_info * cw201x)203*4882a593Smuzhiyun static int cw201x_get_vol(struct cw201x_info *cw201x)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun u16 value16, value16_1, value16_2, value16_3;
206*4882a593Smuzhiyun int voltage;
207*4882a593Smuzhiyun int res1, res2;
208*4882a593Smuzhiyun int retry = 0;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun __retry:
211*4882a593Smuzhiyun value16 = cw201x_read_half_word(cw201x, REG_VCELL);
212*4882a593Smuzhiyun if (value16 < 0)
213*4882a593Smuzhiyun return -1;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
216*4882a593Smuzhiyun if (value16_1 < 0)
217*4882a593Smuzhiyun return -1;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
220*4882a593Smuzhiyun if (value16_2 < 0)
221*4882a593Smuzhiyun return -1;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun if (value16 > value16_1) {
224*4882a593Smuzhiyun value16_3 = value16;
225*4882a593Smuzhiyun value16 = value16_1;
226*4882a593Smuzhiyun value16_1 = value16_3;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (value16_1 > value16_2) {
230*4882a593Smuzhiyun value16_3 = value16_1;
231*4882a593Smuzhiyun value16_1 = value16_2;
232*4882a593Smuzhiyun value16_2 = value16_3;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (value16 > value16_1) {
236*4882a593Smuzhiyun value16_3 = value16;
237*4882a593Smuzhiyun value16 = value16_1;
238*4882a593Smuzhiyun value16_1 = value16_3;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun voltage = value16_1 * 312 / 1024;
242*4882a593Smuzhiyun if (voltage <= 0 && retry < 10) {
243*4882a593Smuzhiyun retry++;
244*4882a593Smuzhiyun mdelay(20);
245*4882a593Smuzhiyun goto __retry;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun if (cw201x->divider_res1 &&
249*4882a593Smuzhiyun cw201x->divider_res2) {
250*4882a593Smuzhiyun res1 = cw201x->divider_res1;
251*4882a593Smuzhiyun res2 = cw201x->divider_res2;
252*4882a593Smuzhiyun voltage = voltage * (res1 + res2) / res2;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (cw201x->dual_cell)
256*4882a593Smuzhiyun voltage *= 2;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun debug("the cw201x voltage=%d\n", voltage);
259*4882a593Smuzhiyun return voltage;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
cw201x_dwc_otg_check_dpdm(void)262*4882a593Smuzhiyun static int cw201x_dwc_otg_check_dpdm(void)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun #if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) && !defined(CONFIG_SPL_BUILD)
265*4882a593Smuzhiyun return rockchip_chg_get_type();
266*4882a593Smuzhiyun #else
267*4882a593Smuzhiyun debug("rockchip_chg_get_type() is not implement\n");
268*4882a593Smuzhiyun return CHARGER_TYPE_NO;
269*4882a593Smuzhiyun #endif
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
cw201x_get_usb_state(struct cw201x_info * cw201x)272*4882a593Smuzhiyun static int cw201x_get_usb_state(struct cw201x_info *cw201x)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun int charger_type;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun switch (cw201x_dwc_otg_check_dpdm()) {
277*4882a593Smuzhiyun case 0:
278*4882a593Smuzhiyun charger_type = CHARGER_TYPE_NO;
279*4882a593Smuzhiyun break;
280*4882a593Smuzhiyun case 1:
281*4882a593Smuzhiyun case 3:
282*4882a593Smuzhiyun charger_type = CHARGER_TYPE_USB;
283*4882a593Smuzhiyun break;
284*4882a593Smuzhiyun case 2:
285*4882a593Smuzhiyun charger_type = CHARGER_TYPE_AC;
286*4882a593Smuzhiyun break;
287*4882a593Smuzhiyun default:
288*4882a593Smuzhiyun charger_type = CHARGER_TYPE_NO;
289*4882a593Smuzhiyun break;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun return charger_type;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
cw201x_get_dc_state(struct cw201x_info * cw201x)295*4882a593Smuzhiyun static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun if (dm_gpio_get_value(&cw201x->dc_det_gpio))
298*4882a593Smuzhiyun return true;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun return false;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
cw201x_check_charge(struct cw201x_info * cw201x)303*4882a593Smuzhiyun static bool cw201x_check_charge(struct cw201x_info *cw201x)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
306*4882a593Smuzhiyun return true;
307*4882a593Smuzhiyun if (cw201x_get_dc_state(cw201x))
308*4882a593Smuzhiyun return true;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return false;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
cw201x_get_soc(struct cw201x_info * cw201x)313*4882a593Smuzhiyun static int cw201x_get_soc(struct cw201x_info *cw201x)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun int cap, i = 0;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun while (i < 10) {
318*4882a593Smuzhiyun cap = cw201x_read(cw201x, REG_SOC);
319*4882a593Smuzhiyun if ((cap < 0) || (cap > 100))
320*4882a593Smuzhiyun cap = cw201x->capacity;
321*4882a593Smuzhiyun i++;
322*4882a593Smuzhiyun if (cap)
323*4882a593Smuzhiyun break;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun cw201x->capacity = cap;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return cw201x->capacity;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
cw201x_update_get_soc(struct udevice * dev)330*4882a593Smuzhiyun static int cw201x_update_get_soc(struct udevice *dev)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun struct cw201x_info *cw201x = dev_get_priv(dev);
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun return cw201x_get_soc(cw201x);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
cw201x_update_get_voltage(struct udevice * dev)337*4882a593Smuzhiyun static int cw201x_update_get_voltage(struct udevice *dev)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun struct cw201x_info *cw201x = dev_get_priv(dev);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun return cw201x_get_vol(cw201x);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
cw201x_update_get_current(struct udevice * dev)344*4882a593Smuzhiyun static int cw201x_update_get_current(struct udevice *dev)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
cw201x_update_get_chrg_online(struct udevice * dev)349*4882a593Smuzhiyun static bool cw201x_update_get_chrg_online(struct udevice *dev)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct cw201x_info *cw201x = dev_get_priv(dev);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun return cw201x_check_charge(cw201x);
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
cw201x_capability(struct udevice * dev)356*4882a593Smuzhiyun static int cw201x_capability(struct udevice *dev)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun return FG_CAP_FUEL_GAUGE;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun static struct dm_fuel_gauge_ops cw201x_fg_ops = {
362*4882a593Smuzhiyun .capability = cw201x_capability,
363*4882a593Smuzhiyun .get_soc = cw201x_update_get_soc,
364*4882a593Smuzhiyun .get_voltage = cw201x_update_get_voltage,
365*4882a593Smuzhiyun .get_current = cw201x_update_get_current,
366*4882a593Smuzhiyun .get_chrg_online = cw201x_update_get_chrg_online,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
cw201x_fg_cfg(struct cw201x_info * cw201x)369*4882a593Smuzhiyun static int cw201x_fg_cfg(struct cw201x_info *cw201x)
370*4882a593Smuzhiyun {
371*4882a593Smuzhiyun u8 val = MODE_SLEEP;
372*4882a593Smuzhiyun int i;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
375*4882a593Smuzhiyun val = MODE_NORMAL;
376*4882a593Smuzhiyun cw201x_write(cw201x, REG_MODE, val);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun for (i = 0; i < 64; i++) {
380*4882a593Smuzhiyun cw201x_write(cw201x, REG_BATINFO + i,
381*4882a593Smuzhiyun (u8)cw201x->cw_bat_config_info[i]);
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return 0;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
cw201x_fg_probe(struct udevice * dev)387*4882a593Smuzhiyun static int cw201x_fg_probe(struct udevice *dev)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun struct cw201x_info *cw201x = dev_get_priv(dev);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun cw201x->dev = dev;
392*4882a593Smuzhiyun cw201x_fg_cfg(cw201x);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun debug("vol: %d, soc: %d\n",
395*4882a593Smuzhiyun cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun return 0;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun static const struct udevice_id cw201x_ids[] = {
401*4882a593Smuzhiyun { .compatible = "cw201x" },
402*4882a593Smuzhiyun { .compatible = "cellwise,cw2015" },
403*4882a593Smuzhiyun { }
404*4882a593Smuzhiyun };
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun U_BOOT_DRIVER(cw201x_fg) = {
407*4882a593Smuzhiyun .name = "cw201x_fg",
408*4882a593Smuzhiyun .id = UCLASS_FG,
409*4882a593Smuzhiyun .of_match = cw201x_ids,
410*4882a593Smuzhiyun .probe = cw201x_fg_probe,
411*4882a593Smuzhiyun .ofdata_to_platdata = cw201x_ofdata_to_platdata,
412*4882a593Smuzhiyun .ops = &cw201x_fg_ops,
413*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct cw201x_info),
414*4882a593Smuzhiyun };
415